oota-llvm.git
11 years agoMips specific inline asm operand modifier 'D'
Jack Carter [Tue, 9 Apr 2013 23:19:50 +0000 (23:19 +0000)]
Mips specific inline asm operand modifier 'D'

Modifier 'D' is to use the second word of a double integer.

We had previously implemented the pure register varient of
the modifier and this patch implements the memory reference.

#include "stdio.h"

int b[8] = {0,1,2,3,4,5,6,7};
void main()
{
    int i;

    // The first word. Notice, no 'D'
    {asm (
    "lw    %0,%1;"
    : "=r" (i)
    : "m" (*(b+4))
    );}

    printf("%d\n",i);

    // The second word
    {asm (
    "lw    %0,%D1;"
    : "=r" (i)
    : "m" (*(b+4))
    );}

    printf("%d\n",i);
}

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179135 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAllow PPC B and BLR to be if-converted into some predicated forms
Hal Finkel [Tue, 9 Apr 2013 22:58:37 +0000 (22:58 +0000)]
Allow PPC B and BLR to be if-converted into some predicated forms

This enables us to form predicated branches (which are the same conditional
branches we had before) and also a larger set of predicated returns (including
instructions like bdnzlr which is a conditional return and loop-counter
decrement all in one).

At the moment, if conversion does not capture all possible opportunities. A
simple example is provided in early-ret2.ll, where if conversion forms one
predicated return, and then the PPCEarlyReturn pass picks up the other one. So,
at least for now, we'll keep both mechanisms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179134 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix some comment typos.
Bob Wilson [Tue, 9 Apr 2013 22:15:51 +0000 (22:15 +0000)]
Fix some comment typos.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179132 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCleanup. No functional change intended.
Chad Rosier [Tue, 9 Apr 2013 20:58:48 +0000 (20:58 +0000)]
Cleanup. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179129 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCleanup. No functional change intended.
Chad Rosier [Tue, 9 Apr 2013 20:44:09 +0000 (20:44 +0000)]
Cleanup. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179125 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove unused method and default values.
Rafael Espindola [Tue, 9 Apr 2013 20:35:08 +0000 (20:35 +0000)]
Remove unused method and default values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179124 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUpdate the version of dwarf we say we're emitting to at least 3.
Eric Christopher [Tue, 9 Apr 2013 20:22:47 +0000 (20:22 +0000)]
Update the version of dwarf we say we're emitting to at least 3.

Deals with a dwarf2 -> dwarf3 DW_FORM_ref_addr change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179122 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert r179115 as it looks to have killed the ASan tests.
Chad Rosier [Tue, 9 Apr 2013 19:59:12 +0000 (19:59 +0000)]
Revert r179115 as it looks to have killed the ASan tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179120 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRationalize the formatting of these case labels. Having two sorted
Chandler Carruth [Tue, 9 Apr 2013 19:46:46 +0000 (19:46 +0000)]
Rationalize the formatting of these case labels. Having two sorted
columns is essentially impossible to edit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179119 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoThis patch enables llvm to switch between compiling for mips32/mips64
Reed Kotler [Tue, 9 Apr 2013 19:46:01 +0000 (19:46 +0000)]
This patch enables llvm to switch between compiling for mips32/mips64
and mips16 on a per function basis.

Because this patch is somewhat involved I have provide an overview of the
key pieces of it.

The patch is written so as to not change the behavior of the non mixed
mode. We have tested this a lot but it is something new to switch subtargets
so we don't want any chance of regression in the mainline compiler until
we have more confidence in this.

Mips32/64 are very different from Mip16 as is the case of ARM vs Thumb1.
For that reason there are derived versions of the register info, frame info,
instruction info and instruction selection classes.

Now we register three separate passes for instruction selection.
One which is used to switch subtargets (MipsModuleISelDAGToDAG.cpp) and then
one for each of the current subtargets (Mips16ISelDAGToDAG.cpp and
MipsSEISelDAGToDAG.cpp).

When the ModuleISel pass runs, it determines if there is a need to switch
subtargets and if so, the owning pointers in MipsTargetMachine are
appropriately changed.

When 16Isel or SEIsel is run, they will return immediately without doing
any work if the current subtarget mode does not apply to them.

In addition, MipsAsmPrinter needs to be reset on a function basis.

The pass BasicTargetTransformInfo is substituted with a null pass since the
pass is immutable and really needs to be a function pass for it to be
used with changing subtargets. This will be fixed in a follow on patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179118 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd support for bottom-up SLP vectorization infrastructure.
Nadav Rotem [Tue, 9 Apr 2013 19:44:35 +0000 (19:44 +0000)]
Add support for bottom-up SLP vectorization infrastructure.

This commit adds the infrastructure for performing bottom-up SLP vectorization (and other optimizations) on parallel computations.
The infrastructure has three potential users:

  1. The loop vectorizer needs to be able to vectorize AOS data structures such as (sum += A[i] + A[i+1]).

  2. The BB-vectorizer needs this infrastructure for bottom-up SLP vectorization, because bottom-up vectorization is faster to compute.

  3. A loop-roller needs to be able to analyze consecutive chains and roll them into a loop, in order to reduce code size. A loop roller does not need to create vector instructions, and this infrastructure separates the chain analysis from the vectorization.

This patch also includes a simple (100 LOC) bottom up SLP vectorizer that uses the infrastructure, and can vectorize this code:

void SAXPY(int *x, int *y, int a, int i) {
  x[i]   = a * x[i]   + y[i];
  x[i+1] = a * x[i+1] + y[i+1];
  x[i+2] = a * x[i+2] + y[i+2];
  x[i+3] = a * x[i+3] + y[i+3];
}

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179117 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake check depend on all.
Eric Christopher [Tue, 9 Apr 2013 19:42:12 +0000 (19:42 +0000)]
Make check depend on all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179116 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[ms-inline asm] Use parsePrimaryExpr in lieu of parseExpression if we need to
Chad Rosier [Tue, 9 Apr 2013 19:34:59 +0000 (19:34 +0000)]
[ms-inline asm] Use parsePrimaryExpr in lieu of parseExpression if we need to
parse an identifier.  Otherwise, parseExpression may parse multiple tokens,
which makes it impossible to properly compute an immediate displacement.
An example of such a case is the source operand (i.e., [Symbol + ImmDisp]) in
the below example:

 __asm mov eax, [Symbol + ImmDisp]

The existing test cases exercise this patch.
rdar://13611297

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179115 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoThe .dwo section shouldn't contain the unrelocated values (and
Eric Christopher [Tue, 9 Apr 2013 19:23:15 +0000 (19:23 +0000)]
The .dwo section shouldn't contain the unrelocated values (and
therefore not at all) of the pc or statement list. We also don't
need to emit the compilation dir so save so space and time
and don't bother.

Fix up the testcase accordingly and verify that we don't emit
the attributes or the items that they use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179114 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCleanup PPCEarlyReturn
Hal Finkel [Tue, 9 Apr 2013 18:25:18 +0000 (18:25 +0000)]
Cleanup PPCEarlyReturn

Some general cleanup and only scan the end of a BB for branches (once we're
done with the terminators and debug values, then there should not be any other
branches). These address post-commit review suggestions by Bill Schmidt.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179112 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert r176408 and r176407 to address PR15540.
Nadav Rotem [Tue, 9 Apr 2013 18:16:05 +0000 (18:16 +0000)]
Revert r176408 and r176407 to address PR15540.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179111 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[ms-inline asm] Maintain a StringRef to reference a symbol in a parsed operand,
Chad Rosier [Tue, 9 Apr 2013 17:53:49 +0000 (17:53 +0000)]
[ms-inline asm] Maintain a StringRef to reference a symbol in a parsed operand,
rather than deriving the StringRef from the Start and End SMLocs.

Using the Start and End SMLocs works fine for operands such as [Symbol], but
not for operands such as [Symbol + ImmDisp].  All existing test cases that
reference a variable exercise this patch.
rdar://13602265

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179109 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDAGCombiner: Fold a shuffle on CONCAT_VECTORS into a new CONCAT_VECTORS if possible.
Benjamin Kramer [Tue, 9 Apr 2013 17:41:43 +0000 (17:41 +0000)]
DAGCombiner: Fold a shuffle on CONCAT_VECTORS into a new CONCAT_VECTORS if possible.

This pattern occurs in SROA output due to the way vector arguments are lowered
on ARM.

The testcase from PR15525 now compiles into this, which is better than the code
we got with the old scalarrepl:
_Store:
ldr.w r9, [sp]
vmov d17, r3, r9
vmov d16, r1, r2
vst1.8 {d16, d17}, [r0]
bx lr

Differential Revision: http://llvm-reviews.chandlerc.com/D647

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179106 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse virtual base registers on PPC
Hal Finkel [Tue, 9 Apr 2013 17:27:09 +0000 (17:27 +0000)]
Use virtual base registers on PPC

On PowerPC, non-vector loads and stores have r+i forms; however, in functions
with large stack frames these were not being used to access slots far from the
stack pointer because such slots were out of range for the signed 16-bit
immediate offset field. This increases register pressure because we need a
separate register for each offset (when the r+r form is used). By enabling
virtual base registers, we can deal with large stack frames without unduly
increasing register pressure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179105 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoConvert test PowerPC/2007-09-07-LoadStoreIdxForms to FileCheck
Hal Finkel [Tue, 9 Apr 2013 17:26:55 +0000 (17:26 +0000)]
Convert test PowerPC/2007-09-07-LoadStoreIdxForms to FileCheck

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179104 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRewrite test/Linker tests to use FileCheck instead of grep.
Eli Bendersky [Tue, 9 Apr 2013 16:51:13 +0000 (16:51 +0000)]
Rewrite test/Linker tests to use FileCheck instead of grep.

Some translations here are not 1x1 because there are grep|grep
chains that are non-trivial to implement in terms of FileCheck features. I
made an effort for the tests to remain as similar as possible; do let me know
if you notice anything fishy. The good news are that some buggy tests were
fixed (grep | not grep - a bug waiting to happen).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179102 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoConvert MachOObjectFile to a template.
Rafael Espindola [Tue, 9 Apr 2013 14:49:08 +0000 (14:49 +0000)]
Convert MachOObjectFile to a template.

For now it is templated only on being 64 or 32 bits. I will add little/big
endian next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179097 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDWARF parser: Fix DWARF-2/3 incompatibility: size of DW_FORM_ref_addr is the same...
Alexey Samsonov [Tue, 9 Apr 2013 14:09:42 +0000 (14:09 +0000)]
DWARF parser: Fix DWARF-2/3 incompatibility: size of DW_FORM_ref_addr is the same as DW_FORM_addr in DWARF2, and is 4/8 bytes on 32/64-bit DWARF starting from DWARF3. Adding a test for this is a huge pain - generating and uploading pre-built binary with DWARF3 debug info is way too ugly, and writing fine-grained unittests for DebugInfo is impossible, as it doesn't expose any headers in include/llvm. That said, I'm going to choose the second approach and submit the patch exposing DebugInfo headers for review soon enough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179095 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoConverted 8x tests of SimplifyCFG to use FileCheck instead of grep.
Michael Gottesman [Tue, 9 Apr 2013 05:18:53 +0000 (05:18 +0000)]
Converted 8x tests of SimplifyCFG to use FileCheck instead of grep.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179087 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoExtract a function.
Jakob Stoklund Olesen [Tue, 9 Apr 2013 05:11:52 +0000 (05:11 +0000)]
Extract a function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179086 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove the confusing sentence.
Nadav Rotem [Tue, 9 Apr 2013 04:48:40 +0000 (04:48 +0000)]
Remove the confusing sentence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179085 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert 179071 because it is not the right way to support non standard new/new[] opera...
Nadav Rotem [Tue, 9 Apr 2013 04:43:46 +0000 (04:43 +0000)]
Revert 179071 because it is not the right way to support non standard new/new[] operators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179084 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCompute correct frame sizes for SPARC v9 64-bit frames.
Jakob Stoklund Olesen [Tue, 9 Apr 2013 04:37:47 +0000 (04:37 +0000)]
Compute correct frame sizes for SPARC v9 64-bit frames.

The save area is twice as big and there is no struct return slot. The
stack pointer is always 16-byte aligned (after adding the bias).

Also eliminate the stack adjustment instructions around calls when the
function has a reserved stack frame.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179083 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMore uses for SymbolTableEntryBase.
Rafael Espindola [Tue, 9 Apr 2013 01:04:06 +0000 (01:04 +0000)]
More uses for SymbolTableEntryBase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179076 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a SymbolTableEntryBase.
Rafael Espindola [Tue, 9 Apr 2013 00:22:58 +0000 (00:22 +0000)]
Add a SymbolTableEntryBase.

Use it when we don't need to know if we have a 32 or 64 bit SymbolTableEntry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179074 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix PointerIntPair to be enum class compatible.
Joe Groff [Tue, 9 Apr 2013 00:01:51 +0000 (00:01 +0000)]
Fix PointerIntPair to be enum class compatible.

Some parts of PointerIntPair assumed that the IntType of the pair was implicitly
convertible to intptr_t, which is not the case for enum class values. Add a
static_cast<intptr_t> to make these conversions explicit and allow
PointerIntPair to be used with an enum class IntType. While we're here, rename
some of the argument values so we don't have variables named "Int" floating
around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179073 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a SectionBase struct.
Rafael Espindola [Mon, 8 Apr 2013 23:57:13 +0000 (23:57 +0000)]
Add a SectionBase struct.

Use it to share code and when we don't need to know if we have a 32 or 64
bit Section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179072 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoc++ new operators are not malloc-like functions because they do not return uninitiali...
Nadav Rotem [Mon, 8 Apr 2013 23:40:47 +0000 (23:40 +0000)]
c++ new operators are not malloc-like functions because they do not return uninitialized memory.
Users may overide new-operators and implement any function that they like.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179071 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoInstructionSimplify.cpp: Fix a ligature, "fi", to get rid of utf8 in comment.
NAKAMURA Takumi [Mon, 8 Apr 2013 23:05:21 +0000 (23:05 +0000)]
InstructionSimplify.cpp: Fix a ligature, "fi", to get rid of utf8 in comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179066 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRedo the fix Benjamin Kramer committed in r178793 about iterator invalidation in...
Shuxin Yang [Mon, 8 Apr 2013 22:00:43 +0000 (22:00 +0000)]
Redo the fix Benjamin Kramer committed in r178793 about iterator invalidation in Reassociate.

I brazenly think this change is slightly simpler than r178793 because:
  - no "state" in functor
  - "OpndPtrs[i]" looks simpler than "&Opnds[OpndIndices[i]]"

  While I can reproduce the probelm in Valgrind, it is rather difficult to come up
a standalone testing case. The reason is that when an iterator is invalidated,
the stale invalidated elements are not yet clobbered by nonsense data, so the
optimizer can still proceed successfully.

  Thank Benjamin for fixing this bug and generously providing the test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179062 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUpdate the docs about the fact that the loop vectorizer is enabled by default for...
Nadav Rotem [Mon, 8 Apr 2013 21:34:49 +0000 (21:34 +0000)]
Update the docs about the fact that the loop vectorizer is enabled by default for -O3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179060 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTemplate the MachO types over the word size.
Rafael Espindola [Mon, 8 Apr 2013 20:45:01 +0000 (20:45 +0000)]
Template the MachO types over the word size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179051 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove is64BitLoadCommand.
Rafael Espindola [Mon, 8 Apr 2013 20:18:53 +0000 (20:18 +0000)]
Remove is64BitLoadCommand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179048 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRewrite test/Integer tests to use FileCheck instead of grep
Eli Bendersky [Mon, 8 Apr 2013 20:18:15 +0000 (20:18 +0000)]
Rewrite test/Integer tests to use FileCheck instead of grep

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179047 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRewrite test/ExecutionEngine tests to use FileCheck instead of grep
Eli Bendersky [Mon, 8 Apr 2013 19:51:36 +0000 (19:51 +0000)]
Rewrite test/ExecutionEngine tests to use FileCheck instead of grep

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179043 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUpdate documentation.
Matt Arsenault [Mon, 8 Apr 2013 18:52:58 +0000 (18:52 +0000)]
Update documentation.

First feature is not CPU subtype anymore since r134127

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179038 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRewrite test/Verifier tests to use FileCheck instead of grep
Eli Bendersky [Mon, 8 Apr 2013 18:33:51 +0000 (18:33 +0000)]
Rewrite test/Verifier tests to use FileCheck instead of grep

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179036 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoX86 cost model: Model cost for uitofp and sitofp on SSE2
Arnold Schwaighofer [Mon, 8 Apr 2013 18:05:48 +0000 (18:05 +0000)]
X86 cost model: Model cost for uitofp and sitofp on SSE2

The costs are overfitted so that I can still use the legalization factor.

For example the following kernel has about half the throughput vectorized than
unvectorized when compiled with SSE2. Before this patch we would vectorize it.

unsigned short A[1024];
double B[1024];
void f() {
  int i;
  for (i = 0; i < 1024; ++i) {
    B[i] = (double) A[i];
  }
}

radar://13599001

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179033 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[ms-inline asm] Add support for ImmDisp [ Symbol ] memory operands.
Chad Rosier [Mon, 8 Apr 2013 17:43:47 +0000 (17:43 +0000)]
[ms-inline asm] Add support for ImmDisp [ Symbol ] memory operands.
rdar://13521249

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179030 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoGenerate PPC early conditional returns
Hal Finkel [Mon, 8 Apr 2013 16:24:03 +0000 (16:24 +0000)]
Generate PPC early conditional returns

PowerPC has a conditional branch to the link register (return) instruction: BCLR.
This should be used any time when we'd otherwise have a conditional branch to a
return. This adds a small pass, PPCEarlyReturn, which runs just prior to the
branch selection pass (and, importantly, after block placement) to generate
these conditional returns when possible. It will also eliminate unconditional
branches to returns (these happen rarely; most of the time these have already
been tail duplicated by the time PPCEarlyReturn is invoked). This is a nice
optimization for small functions that do not maintain a stack frame.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179026 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDWARF parser: remove duplicated code and fix code style in DIE extractors.
Alexey Samsonov [Mon, 8 Apr 2013 14:37:16 +0000 (14:37 +0000)]
DWARF parser: remove duplicated code and fix code style in DIE extractors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179023 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd all 4 MachO object types. Use the stored type to implement is64Bits().
Rafael Espindola [Mon, 8 Apr 2013 13:25:33 +0000 (13:25 +0000)]
Add all 4 MachO object types. Use the stored type to implement is64Bits().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179021 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Control Flow support for pre EG gen
Vincent Lejeune [Mon, 8 Apr 2013 13:05:49 +0000 (13:05 +0000)]
R600: Control Flow support for pre EG gen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179020 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSimplify the quoting here. Our lit emulator doesn't deal well with the
Chandler Carruth [Mon, 8 Apr 2013 10:07:50 +0000 (10:07 +0000)]
Simplify the quoting here. Our lit emulator doesn't deal well with the
nested quoting schemes, and they're not important here...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179014 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove a global 'endl' variable from the other file as well.
Chandler Carruth [Mon, 8 Apr 2013 08:55:18 +0000 (08:55 +0000)]
Remove a global 'endl' variable from the other file as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179010 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoClean up namespaces in obj2yaml.cpp.
Chandler Carruth [Mon, 8 Apr 2013 08:55:14 +0000 (08:55 +0000)]
Clean up namespaces in obj2yaml.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179009 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd ACLE link to ARM documentation sections
Tim Northover [Mon, 8 Apr 2013 08:42:24 +0000 (08:42 +0000)]
Add ACLE link to ARM documentation sections

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179006 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAArch64: remove barriers from AArch64 atomic operations.
Tim Northover [Mon, 8 Apr 2013 08:40:41 +0000 (08:40 +0000)]
AArch64: remove barriers from AArch64 atomic operations.

I've managed to convince myself that AArch64's acquire/release
instructions are sufficient to guarantee C++11's required semantics,
even in the sequentially-consistent case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179005 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCleanup the formatting of obj2yaml.cpp.
Chandler Carruth [Mon, 8 Apr 2013 08:39:59 +0000 (08:39 +0000)]
Cleanup the formatting of obj2yaml.cpp.

I couldn't touch this file and not clean it up some. These reformattings
brought to you by clang-format, with some minor adjustments by me. More
spring cleaning to follow here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179004 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't define our own global 'endl' variable. While technically it had
Chandler Carruth [Mon, 8 Apr 2013 08:30:47 +0000 (08:30 +0000)]
Don't define our own global 'endl' variable. While technically it had
internal linkage and so wasn't a patent bug, it doesn't make any sense
here. We can avoid even calling operator<< by just embedding the newline
in the string literals that were already being streamed out. It also
gives the impression of some line-ending agnosticisms which is not
present, and that flushing happens when it doesn't.

If we want to use std::endl, we could do that, but honestly it doesn't
seem remotely worth it. Using '\n' directly is much more clear when
working with raw_ostream.

It also happens to fix builds with old crufty GCC STL implementations
that include std::endl into the global namespace (or headers written to
be compatible with such atrocities).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179003 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: Remove unused variable.
Benjamin Kramer [Mon, 8 Apr 2013 08:07:35 +0000 (08:07 +0000)]
ARM: Remove unused variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179001 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCleanup and improve PPC fsel generation
Hal Finkel [Sun, 7 Apr 2013 22:11:09 +0000 (22:11 +0000)]
Cleanup and improve PPC fsel generation

First, we should not cheat: fsel-based lowering of select_cc is a
finite-math-only optimization (the ISA manual, section F.3 of v2.06, makes
this clear, as does a note in our own README).

This also adds fsel-based lowering of EQ and NE condition codes. As it turned
out, fsel generation was covered by a grand total of zero regression test
cases. I've added some test cases to cover the existing behavior (which is now
finite-math only), as well as the new EQ cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179000 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTargetLowering: Fix getTypeConversion handling of extended vector types
Arnold Schwaighofer [Sun, 7 Apr 2013 20:22:56 +0000 (20:22 +0000)]
TargetLowering: Fix getTypeConversion handling of extended vector types

The code in getTypeConversion attempts to promote the element vector type
before it trys to split or widen the vector.
After it failed finding a legal vector type by promoting it would continue using
the promoted vector element type. Thereby missing legal splitted vector types.
For example the type v32i32 that has a legal split of 4 x v3i32 on x86/sse2
would be transformed to: v32i256 and from there on successively split to:
v16i256, v8i256, v1i256 and then finally ends up as an i64 type.
By resetting the vector element type to the original vector element type that
existed before the promotion the code will attempt to split the vector type to
smaller vector widths of the same type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178999 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake MachOObjectFile independent from MachOObject.
Rafael Espindola [Sun, 7 Apr 2013 20:01:29 +0000 (20:01 +0000)]
Make MachOObjectFile independent from MachOObject.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178998 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoImplement MachOObjectFile::getData directly.
Rafael Espindola [Sun, 7 Apr 2013 19:42:15 +0000 (19:42 +0000)]
Implement MachOObjectFile::getData directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178997 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoImplement MachOObjectFile::is64Bit directly.
Rafael Espindola [Sun, 7 Apr 2013 19:38:15 +0000 (19:38 +0000)]
Implement MachOObjectFile::is64Bit directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178996 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoImplement MachOObjectFile::getHeaderSize directly.
Rafael Espindola [Sun, 7 Apr 2013 19:31:49 +0000 (19:31 +0000)]
Implement MachOObjectFile::getHeaderSize directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178995 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoImplement MachOObjectFile::getHeader directly.
Rafael Espindola [Sun, 7 Apr 2013 19:26:57 +0000 (19:26 +0000)]
Implement MachOObjectFile::getHeader directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178994 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoImplement LowerCall_64 for the SPARC v9 64-bit ABI.
Jakob Stoklund Olesen [Sun, 7 Apr 2013 19:10:57 +0000 (19:10 +0000)]
Implement LowerCall_64 for the SPARC v9 64-bit ABI.

There is still no support for byval arguments (which I don't think are
needed) and varargs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178993 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoImplement MachOObjectFile::getHeaderSize and MachOObjectFile::getData.
Rafael Espindola [Sun, 7 Apr 2013 19:05:30 +0000 (19:05 +0000)]
Implement MachOObjectFile::getHeaderSize and MachOObjectFile::getData.

These were the last missing forwarding functions. Also consistently use
the forwarding functions instead of using MachOObj directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178992 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove LoadCommandInfo now that we always have a pointer to the command.
Rafael Espindola [Sun, 7 Apr 2013 18:42:06 +0000 (18:42 +0000)]
Remove LoadCommandInfo now that we always have a pointer to the command.

LoadCommandInfo was needed to keep a command and its offset in the file. Now
that we always have a pointer to the command, we don't need the offset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178991 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd MachOObjectFile::LoadCommandInfo.
Rafael Espindola [Sun, 7 Apr 2013 18:08:12 +0000 (18:08 +0000)]
Add MachOObjectFile::LoadCommandInfo.

This avoids using MachOObject::getLoadCommandInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178990 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse getLoadCommandInfo instead of MachOObj->getLoadCommandInfo.
Rafael Espindola [Sun, 7 Apr 2013 17:41:59 +0000 (17:41 +0000)]
Use getLoadCommandInfo instead of MachOObj->getLoadCommandInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178989 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoConstruct MachOObject in MachOObjectFile's constructor.
Rafael Espindola [Sun, 7 Apr 2013 16:58:48 +0000 (16:58 +0000)]
Construct MachOObject in MachOObjectFile's constructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178988 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove unused argument.
Rafael Espindola [Sun, 7 Apr 2013 16:40:00 +0000 (16:40 +0000)]
Remove unused argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178987 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove MachOObjectFile::getObject.
Rafael Espindola [Sun, 7 Apr 2013 16:07:35 +0000 (16:07 +0000)]
Remove MachOObjectFile::getObject.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178986 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove two uses of getObject.
Rafael Espindola [Sun, 7 Apr 2013 15:46:05 +0000 (15:46 +0000)]
Remove two uses of getObject.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178985 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove usage of InMemoryStruct in getSymbol.
Rafael Espindola [Sun, 7 Apr 2013 15:35:18 +0000 (15:35 +0000)]
Remove usage of InMemoryStruct in getSymbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178984 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC Altivec load/store intrinsics can be marked IntrRead[Write]ArgMem
Hal Finkel [Sun, 7 Apr 2013 15:32:40 +0000 (15:32 +0000)]
PPC Altivec load/store intrinsics can be marked IntrRead[Write]ArgMem

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178983 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC rotate instructions don't have unmodeled side effcts
Hal Finkel [Sun, 7 Apr 2013 15:06:53 +0000 (15:06 +0000)]
PPC rotate instructions don't have unmodeled side effcts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178982 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove a use of InMemoryStruct in llvm-readobj.
Rafael Espindola [Sun, 7 Apr 2013 15:05:12 +0000 (15:05 +0000)]
Remove a use of InMemoryStruct in llvm-readobj.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178981 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake getObject const. Remove a const_cast.
Rafael Espindola [Sun, 7 Apr 2013 14:50:40 +0000 (14:50 +0000)]
Make getObject const. Remove a const_cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178980 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove last use of InMemoryStruct in llvm-objdump.
Rafael Espindola [Sun, 7 Apr 2013 14:40:18 +0000 (14:40 +0000)]
Remove last use of InMemoryStruct in llvm-objdump.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178979 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMost PPC M[TF]CR instructions do not have side effects
Hal Finkel [Sun, 7 Apr 2013 14:33:13 +0000 (14:33 +0000)]
Most PPC M[TF]CR instructions do not have side effects

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178978 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove dead code.
Rafael Espindola [Sun, 7 Apr 2013 14:30:21 +0000 (14:30 +0000)]
Remove dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178977 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove unused argument.
Rafael Espindola [Sun, 7 Apr 2013 14:25:39 +0000 (14:25 +0000)]
Remove unused argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178976 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix PR15674 (and PR15603): a SROA think-o.
Chandler Carruth [Sun, 7 Apr 2013 11:47:54 +0000 (11:47 +0000)]
Fix PR15674 (and PR15603): a SROA think-o.

The fix for PR14972 in r177055 introduced a real think-o in the *store*
side, likely because I was much more focused on the load side. While we
can arbitrarily widen (or narrow) a loaded value, we can't arbitrarily
widen a value to be stored, as that changes the width of memory access!
Lock down the code path in the store rewriting which would do this to
only handle the intended circumstance.

All of the existing tests continue to pass, and I've added a test from
the PR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178974 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC pre-increment load instructions do not have side effects
Hal Finkel [Sun, 7 Apr 2013 06:30:47 +0000 (06:30 +0000)]
PPC pre-increment load instructions do not have side effects

A few were missed in r178972.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178973 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC pre-increment load instructions do not have side effects
Hal Finkel [Sun, 7 Apr 2013 05:46:58 +0000 (05:46 +0000)]
PPC pre-increment load instructions do not have side effects

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178972 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC MCRF instruction does not have side effects
Hal Finkel [Sun, 7 Apr 2013 05:16:57 +0000 (05:16 +0000)]
PPC MCRF instruction does not have side effects

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178971 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC FMR instruction does not have side effects
Hal Finkel [Sun, 7 Apr 2013 04:56:16 +0000 (04:56 +0000)]
PPC FMR instruction does not have side effects

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178970 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDW_FORM_sec_offset should be a relocation on platforms that use
Eric Christopher [Sun, 7 Apr 2013 03:43:09 +0000 (03:43 +0000)]
DW_FORM_sec_offset should be a relocation on platforms that use
a relocation across sections. Do this for DW_AT_stmt list in the
skeleton CU and check the relocations in the debug_info section.

Add a FIXME for multiple CUs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178969 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[cmake] Avoid rel+asserts warnings when passing -UNDEBUG
Reid Kleckner [Sun, 7 Apr 2013 01:45:01 +0000 (01:45 +0000)]
[cmake] Avoid rel+asserts warnings when passing -UNDEBUG

MSVC 2012 gives warning D9025, "overriding /D NDEBUG with -UNDEBUG".
Removing the original definition of NDEBUG silences this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178967 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoImplement LowerReturn_64 for SPARC v9.
Jakob Stoklund Olesen [Sat, 6 Apr 2013 23:57:33 +0000 (23:57 +0000)]
Implement LowerReturn_64 for SPARC v9.

Integer return values are sign or zero extended by the callee, and
structs up to 32 bytes in size can be returned in registers.

The CC_Sparc64 CallingConv definition is shared between
LowerFormalArguments_64 and LowerReturn_64. Function arguments and
return values are passed in the same registers.

The inreg flag is also used for return values. This is required to handle
C functions returning structs containing floats and ints:

  struct ifp {
    int i;
    float f;
  };

  struct ifp f(void);

LLVM IR:

  define inreg { i32, float } @f() {
     ...
     ret { i32, float } %retval
  }

The ABI requires that %retval.i is returned in the high bits of %i0
while %retval.f goes in %f1.

Without the inreg return value attribute, %retval.i would go in %i0 and
%retval.f would go in %f3 which is a more efficient way of returning
%multiple values, but it is not ABI compliant for returning C structs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178966 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSPARC v9 stack pointer bias.
Jakob Stoklund Olesen [Sat, 6 Apr 2013 21:38:57 +0000 (21:38 +0000)]
SPARC v9 stack pointer bias.

64-bit SPARC v9 processes use biased stack and frame pointers, so the
current function's stack frame is located at %sp+BIAS .. %fp+BIAS where
BIAS = 2047.

This makes more local variables directly accessible via [%fp+simm13]
addressing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178965 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoImplement PPCInstrInfo::FoldImmediate
Hal Finkel [Sat, 6 Apr 2013 19:30:30 +0000 (19:30 +0000)]
Implement PPCInstrInfo::FoldImmediate

There are certain PPC instructions into which we can fold a zero immediate
operand. We can detect such cases by looking at the register class required
by the using operand (so long as it is not otherwise constrained).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178961 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC ISEL is a select and never has side effects
Hal Finkel [Sat, 6 Apr 2013 19:30:28 +0000 (19:30 +0000)]
PPC ISEL is a select and never has side effects

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178960 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a comment to TargetInstrInfo about FoldImmediate
Hal Finkel [Sat, 6 Apr 2013 19:30:20 +0000 (19:30 +0000)]
Add a comment to TargetInstrInfo about FoldImmediate

This comment documents the current behavior of the ARM implementation of this
callback, and also the soon-to-be-committed PPC version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178959 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoComplete formal arguments for the SPARC v9 64-bit ABI.
Jakob Stoklund Olesen [Sat, 6 Apr 2013 18:32:12 +0000 (18:32 +0000)]
Complete formal arguments for the SPARC v9 64-bit ABI.

All arguments are formally assigned to stack positions and then promoted
to floating point and integer registers. Since there are more floating
point registers than integer registers, this can cause situations where
floating point arguments are assigned to registers after integer
arguments that where assigned to the stack.

Use the inreg flag to indicate 32-bit fragments of structs containing
both float and int members.

The three-way shadowing between stack, integer, and floating point
registers requires custom argument lowering. The good news is that
return values are passed in the exact same way, and we can share the
code.

Still missing:

 - Update LowerReturn to handle structs returned in registers.
 - LowerCall.
 - Variadic functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178958 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agotypo
Nadav Rotem [Sat, 6 Apr 2013 04:24:12 +0000 (04:24 +0000)]
typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178949 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove last use of InMemoryStruct from MachOObjectFile.cpp.
Rafael Espindola [Sat, 6 Apr 2013 03:50:05 +0000 (03:50 +0000)]
Remove last use of InMemoryStruct from MachOObjectFile.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178948 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't use InMemoryStruct<macho::SymtabLoadCommand>.
Rafael Espindola [Sat, 6 Apr 2013 03:31:08 +0000 (03:31 +0000)]
Don't use InMemoryStruct<macho::SymtabLoadCommand>.

This also required not using the RegisterStringTable API, which is also a
good thing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178947 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't use InMemoryStruct in getSymbol64TableEntry.
Rafael Espindola [Sat, 6 Apr 2013 02:15:44 +0000 (02:15 +0000)]
Don't use InMemoryStruct in getSymbol64TableEntry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178946 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't use InMemoryStruct in getSymbolTableEntry.
Rafael Espindola [Sat, 6 Apr 2013 01:59:05 +0000 (01:59 +0000)]
Don't use InMemoryStruct in getSymbolTableEntry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178945 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't use InMemoryStruct in getRelocation.
Rafael Espindola [Sat, 6 Apr 2013 01:24:11 +0000 (01:24 +0000)]
Don't use InMemoryStruct in getRelocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178943 91177308-0d34-0410-b5e6-96231b3b80d8