Craig Topper [Fri, 18 May 2012 06:42:06 +0000 (06:42 +0000)]
Simplify handling of v16i8 shuffles and fix a missed optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157043
91177308-0d34-0410-b5e6-
96231b3b80d8
Evan Cheng [Fri, 18 May 2012 01:33:51 +0000 (01:33 +0000)]
Teach two-address pass to update the "source" map so it doesn't perform a
non-profitable commute using outdated info. The test case would still fail
because of poor pre-RA schedule. That will be fixed by MI scheduler.
rdar://
11472010
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157038
91177308-0d34-0410-b5e6-
96231b3b80d8
Danil Malyshev [Fri, 18 May 2012 00:30:58 +0000 (00:30 +0000)]
Temporarily disabled the MCJIT tests for Darwin, because the RuntimeDyldMachO has a problems with relocations for 32bit x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157035
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Fri, 18 May 2012 00:16:22 +0000 (00:16 +0000)]
Clarify comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157033
91177308-0d34-0410-b5e6-
96231b3b80d8
Nuno Lopes [Fri, 18 May 2012 00:14:36 +0000 (00:14 +0000)]
fix corner case in ConstantRange::intersectWith().
this fixes the missed optimization I was seeing in the CorrelatedValuePropagation pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157032
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Fri, 18 May 2012 00:13:56 +0000 (00:13 +0000)]
Fixed a bug in llvm-objdump when disassembling using -macho option for a binary
containing no symbols. Fixed the crash and fixed it not disassembling anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157031
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Fri, 18 May 2012 00:07:14 +0000 (00:07 +0000)]
Remove a test that was only testing for physreg joining.
This is the same as the other tests: Clever tricks are required to make
the arguments and return value line up in a single-instruction function.
It rarely happens in real life.
We have plenty other examples of this behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157030
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Thu, 17 May 2012 23:44:19 +0000 (23:44 +0000)]
Remove -join-physregs from the test suite.
This option has been disabled for a while, and it is going away so I can
clean up the coalescer code.
The tests that required physreg joining to be enabled were almost all of
the form "tiny function with interference between arguments and return
value". Such functions are usually inlined in the real world.
The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly
rare.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157027
91177308-0d34-0410-b5e6-
96231b3b80d8
Nuno Lopes [Thu, 17 May 2012 23:04:08 +0000 (23:04 +0000)]
minor simplification in the call to ConstantRange constructor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157024
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 17 May 2012 22:37:09 +0000 (22:37 +0000)]
comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157020
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Thu, 17 May 2012 22:18:01 +0000 (22:18 +0000)]
Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missing
the 0b10 mask encoding bits. Make MSR APSR writes without a _<bits> qualifier
an alias for MSR APSR_nzcvq even though ARM as deprecated it use. Also add
support for suffixes (_nzcvq, _g, _nzcvqg) for APSR versions. Some FIXMEs in
the code for better error checking when versions shouldn't be used.
rdar://
11457025
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157019
91177308-0d34-0410-b5e6-
96231b3b80d8
Danil Malyshev [Thu, 17 May 2012 21:07:47 +0000 (21:07 +0000)]
- Added ExecutionEngine/MCJIT tests
- Added HOST_ARCH to Makefile.config.in
The HOST_ARCH will be used by MCJIT tests filter, because MCJIT supported only x86 and ARM architectures now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157015
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Thu, 17 May 2012 20:27:58 +0000 (20:27 +0000)]
Remove extraneous ';'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157011
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 17 May 2012 18:35:13 +0000 (18:35 +0000)]
misched: trace ReadyQ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157007
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 17 May 2012 18:35:10 +0000 (18:35 +0000)]
misched: Added 3-level regpressure back-off.
Introduce the basic strategy for register pressure scheduling.
1) Respect target limits at all times.
2) Indentify critical register classes (pressure sets).
Track pressure within the scheduled region.
Avoid increasing scheduled pressure for critical registers.
3) Avoid exceeding the max pressure of the region prior to scheduling.
Added logic for picking between the top and bottom ready Q's based on
regpressure heuristics.
Status: functional but needs to be asjusted to achieve good results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157006
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 17 May 2012 18:35:07 +0000 (18:35 +0000)]
comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157005
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 17 May 2012 18:35:05 +0000 (18:35 +0000)]
regpressure: Fix getMaxUpwardPressureDelta.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157004
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 17 May 2012 18:35:03 +0000 (18:35 +0000)]
misched: fix liveness iterators
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157003
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Thu, 17 May 2012 18:35:00 +0000 (18:35 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157002
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Thu, 17 May 2012 18:32:42 +0000 (18:32 +0000)]
Never clear <undef> flags on already joined copies.
RegisterCoalescer set <undef> flags on all operands of copy instructions
that are scheduled to be removed. This is so they won't affect
shrinkToUses() by introducing false register reads.
Make sure those <undef> flags are never cleared, or shrinkToUses() could
cause live intervals to end at instructions about to be deleted.
This would be a lot simpler if RegisterCoalescer could just erase joined
copies immediately instead of keeping all the to-be-deleted instructions
around.
This fixes PR12862. Unfortunately, bugpoint can't create a sane test
case for this. Like many other coalescer problems, this failure depends
of a very fragile series of events.
<rdar://problem/
11474428>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157001
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Thu, 17 May 2012 18:32:40 +0000 (18:32 +0000)]
Fix a verifier bug.
Make sure useless (def-only) intervals also get verified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157000
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Thu, 17 May 2012 17:59:51 +0000 (17:59 +0000)]
Relax the requirement that the exception object must be an instruction. During
bugpoint-ing, it may turn into something else.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156998
91177308-0d34-0410-b5e6-
96231b3b80d8
Evandro Menezes [Thu, 17 May 2012 16:46:46 +0000 (16:46 +0000)]
[Hexagon] Clean up Hexagon ELF definition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156996
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Thu, 17 May 2012 15:55:41 +0000 (15:55 +0000)]
enhance the intrinsic info stuff to emit encodings that don't fit in 32-bits into a
separate side table, using the handy SequenceToOffsetTable class. This encodes all
these weird things into another 256 bytes, allowing all intrinsics to be encoded this way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156995
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Thu, 17 May 2012 13:12:13 +0000 (13:12 +0000)]
Remove incorrect pattern for ARM SMML instruction.
Patch by Meador Inge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156989
91177308-0d34-0410-b5e6-
96231b3b80d8
Manuel Klimek [Thu, 17 May 2012 09:32:05 +0000 (09:32 +0000)]
Fix compile error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156986
91177308-0d34-0410-b5e6-
96231b3b80d8
Stepan Dyatkovskiy [Thu, 17 May 2012 08:56:30 +0000 (08:56 +0000)]
SelectionDAGBuilder: CaseBlock, CaseRanges and CaseCmp changed representation of Low and High from signed to unsigned. Since unsigned ints usually simpler, faster and allows to reduce some extra signed bit checks needed before <,>,<=,>= comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156985
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Thu, 17 May 2012 05:13:57 +0000 (05:13 +0000)]
Genericize the intrinsics descriptor decoding a bit to make room
for future expansion, no functionality change yet though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156979
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Thu, 17 May 2012 05:03:24 +0000 (05:03 +0000)]
finish encoding all of the interesting details of intrinsics. Now intrinsics
are only rejected because they can't be encoded into a 32-bit unit, not because
they contain an unencodable feature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156978
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Thu, 17 May 2012 04:30:58 +0000 (04:30 +0000)]
strengthen the intrinsic descriptor stuff to be able to handle sin, cos and other
intrinsics that use passed-in arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156977
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Thu, 17 May 2012 04:07:48 +0000 (04:07 +0000)]
simplify code generated by tblgen that is not necessary since we dropped
compatibility with LLVM 2.x bitcode files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156976
91177308-0d34-0410-b5e6-
96231b3b80d8
Francois Pichet [Thu, 17 May 2012 04:00:03 +0000 (04:00 +0000)]
I forgot the #ifdef _MSC_VER guard in my last commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156975
91177308-0d34-0410-b5e6-
96231b3b80d8
Francois Pichet [Thu, 17 May 2012 03:38:19 +0000 (03:38 +0000)]
Fix the MSVC 2010 build: disable the optimizer for a problematic function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156973
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Wed, 16 May 2012 23:03:04 +0000 (23:03 +0000)]
Use RegUnits to compute overlapping registers.
TableGen already computes register units as the basic unit of
interference. We can use that to compute the set of overlapping
registers.
This means that we can easily compute overlap sets for one register at a
time. There is no benefit to computing all registers at once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156960
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Wed, 16 May 2012 22:19:56 +0000 (22:19 +0000)]
This patch adds the register class for MIPS16 as well as the ability for
llc to recognize MIPS16 as a MIPS ASE extension. -mips16 will mean the
mips16 ASE for mips32 by default.
As part of fixing of adding this we discovered some small changes that
need to be made to MipsInstrInfo::storeRegToStackSLot and
MipsInstrInfo::loadRegFromStackSlot. We were using some "==" equality tests
where in fact we should have been using Mips::<regclas>.hasSubClassEQ instead,
per suggestion of Jakob Stoklund Olesen.
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156958
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Wed, 16 May 2012 22:08:58 +0000 (22:08 +0000)]
Grammar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156955
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Wed, 16 May 2012 21:22:35 +0000 (21:22 +0000)]
Set sub-register <undef> flags more accurately.
When widening an existing <def,reads-undef> operand to a super-register,
it may be necessary to clear the <undef> flag because the wider register
is now read-modify-write through the instruction.
Conversely, it may be necessary to add an <undef> flag when the
coalescer turns a full-register def into a sub-register def, but the
larger register wasn't live before the instruction.
This happens in test/CodeGen/ARM/coalesce-subregs.ll, but the test
is too small for the <undef> flags to affect the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156951
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Atanasyan [Wed, 16 May 2012 19:07:55 +0000 (19:07 +0000)]
Disable JITTest.FunctionIsRecompiledAndRelinked and JITTest.NoStubs
on MIPS where they are not implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156935
91177308-0d34-0410-b5e6-
96231b3b80d8
Danil Malyshev [Wed, 16 May 2012 18:50:11 +0000 (18:50 +0000)]
Added LLIMCJITMemoryManager to the lli. This manager will be used for MCJIT instead of DefaultJIMMemoryManager.
It's more flexible for MCJIT tasks, in addition it's provides a invalidation instruction cache for code sections which will be used before JIT code will be executed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156933
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Wed, 16 May 2012 15:03:55 +0000 (15:03 +0000)]
Hexagon: Remove unused command line option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156917
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan Sands [Wed, 16 May 2012 12:25:43 +0000 (12:25 +0000)]
I noticed that named metadata doesn't provide a direct way of getting at the
named metadata list, unlike all the other global objects (global variables,
functions, aliases), so add that for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156915
91177308-0d34-0410-b5e6-
96231b3b80d8
Chandler Carruth [Wed, 16 May 2012 08:32:49 +0000 (08:32 +0000)]
Teach the 'opt' tool about '-Os' and '-Oz', corresponding to the Clang
options, to enable easier testing of the innards of LLVM that are
enabled by such optimization strategies.
Note that this doesn't provide the (much needed) function attribute
support for -Oz (as opposed to -Os), but still seems like a positive
step to better test the logic that Clang currently relies on.
Patch by Patrik Hägglund.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156913
91177308-0d34-0410-b5e6-
96231b3b80d8
Duncan Sands [Wed, 16 May 2012 07:57:18 +0000 (07:57 +0000)]
Fix a thinko in DisintegrateMERGE_VALUES. Patch by Xiaoyi Guo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156909
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Wed, 16 May 2012 06:34:44 +0000 (06:34 +0000)]
Significantly reduce the compiled size of Functions.cpp by turning a big blob of tblgen
generated code (for Intrinsic::getType) into a table. This handles common cases right now,
but I plan to extend it to handle all cases and merge in type verification logic as well
in follow-on patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156905
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Wed, 16 May 2012 04:51:09 +0000 (04:51 +0000)]
have tblgen emit cast<> instead of dyn_cast<> when we know it must succeed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156902
91177308-0d34-0410-b5e6-
96231b3b80d8
Evan Cheng [Wed, 16 May 2012 01:54:27 +0000 (01:54 +0000)]
Avoid creating a cycle when folding load / op with flag / store. PR11451474. rdar://
11451474
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156896
91177308-0d34-0410-b5e6-
96231b3b80d8
John Criswell [Wed, 16 May 2012 00:26:51 +0000 (00:26 +0000)]
Fixed grammar for the llvm.trap intrinsic description.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156881
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 15 May 2012 23:31:35 +0000 (23:31 +0000)]
Enable sub-sub-register copy coalescing.
It is now possible to coalesce weird skewed sub-register copies by
picking a super-register class larger than both original registers. The
included test case produces code like this:
vld2.32 {d16, d17, d18, d19}, [r0]!
vst2.32 {d18, d19, d20, d21}, [r0]
We still perform interference checking as if it were a normal full copy
join, so this is still quite conservative. In particular, the f1 and f2
functions in the included test case still have remaining copies because
of false interference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156878
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 15 May 2012 22:26:28 +0000 (22:26 +0000)]
Teach RegisterCoalescer to handle symmetric sub-register copies.
It is possible to coalesce two overlapping registers to a common
super-register that it larger than both of the original registers.
The important difference is that it may be necessary to rewrite DstReg
operands as well as SrcReg operands because the sub-register index has
changed.
This behavior is still disabled by CoalescerPair.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156869
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 15 May 2012 22:20:27 +0000 (22:20 +0000)]
Handle NewReg==OldReg in renameRegister().
This can happen when widening a virtual register to a super-register
class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156867
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 15 May 2012 22:18:49 +0000 (22:18 +0000)]
We never call adjustCopiesBackFrom() for partial copies.
There is no need to look at an always null SrcIdx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156866
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Dunbar [Tue, 15 May 2012 22:07:18 +0000 (22:07 +0000)]
llvm-config: Use sys::fs::equivalent instead of string comparison.
- Hopefully fixes PR11600 (untested).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156865
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Dunbar [Tue, 15 May 2012 22:07:14 +0000 (22:07 +0000)]
[Support] Add a version of sys::fs::equivalent() that treats errors as false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156864
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Dunbar [Tue, 15 May 2012 21:32:27 +0000 (21:32 +0000)]
[docs] Remove unsupported references to ExtraSource variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156857
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Tue, 15 May 2012 20:47:23 +0000 (20:47 +0000)]
Add blurb for Crack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156852
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Tue, 15 May 2012 20:20:50 +0000 (20:20 +0000)]
Add a test case for r156840, a fix to llvm-objdump when disassembling using
-macho to disassemble the last symbol to the end of the section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156850
91177308-0d34-0410-b5e6-
96231b3b80d8
Nuno Lopes [Tue, 15 May 2012 20:20:14 +0000 (20:20 +0000)]
reuse the result of some expensive computations in getSignExtendExpr() and getZeroExtendExpr()
this gives a speedup of > 80 in a debug build in the test case of PR12825 (php_sha512_crypt_r)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156849
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 15 May 2012 20:09:43 +0000 (20:09 +0000)]
Extend the CoalescerPair interface to handle symmetric sub-register copies.
Now both SrcReg and DstReg can be sub-registers of the final coalesced
register.
CoalescerPair::setRegisters still rejects such copies because
RegisterCoalescer doesn't yet handle them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156848
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Tue, 15 May 2012 20:06:41 +0000 (20:06 +0000)]
Update MIPS' section in the release notes. Patch by Simon Atanasyan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156847
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Tue, 15 May 2012 18:59:41 +0000 (18:59 +0000)]
Add -enable-aa-sched-mi, off by default, for AliasAnalysis inside MachineScheduler.
This feature avoids creating edges in the scheduler's dependence graph
for non-aliasing memory operations according to whichever alias
analysis is available. It has been fully tested in Hexagon. Before
making this default, it needs to be extended to handle multiple
MachineMemOperands, compile time needs more evaluation, and
benchmarking on X86 and ARM is needed.
Patch by Sergei Larin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156842
91177308-0d34-0410-b5e6-
96231b3b80d8
Kevin Enderby [Tue, 15 May 2012 18:57:14 +0000 (18:57 +0000)]
Fixed a bug in llvm-objdump when disassembling using -macho option for a binary
that has more than one symbol. The last symbol was not being disassembled to
the end of the section.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156840
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Dunbar [Tue, 15 May 2012 18:44:17 +0000 (18:44 +0000)]
llvm-build: Add support for non-installed libraries (e.g., gtest).
- These libraries are only reported by llvm-config when run from a development
tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156838
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Dunbar [Tue, 15 May 2012 18:44:12 +0000 (18:44 +0000)]
llvm-build: Don't emit library information for disabled targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156837
91177308-0d34-0410-b5e6-
96231b3b80d8
Daniel Dunbar [Tue, 15 May 2012 18:44:09 +0000 (18:44 +0000)]
[utils] Fix Get{RepositoryPath,SourceVersion} to have a more robust is-git-svn
check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156836
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Tue, 15 May 2012 17:35:57 +0000 (17:35 +0000)]
TableGen'erate mapping physical registers to encoding values.
Many targets always use the same bitwise encoding value for physical
registers in all (or most) instructions. Add this mapping to the
.td files and TableGen'erate the information and expose an accessor
in MCRegisterInfo.
patch by Tom Stellard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156829
91177308-0d34-0410-b5e6-
96231b3b80d8
Jim Grosbach [Tue, 15 May 2012 17:35:52 +0000 (17:35 +0000)]
Allow MCCodeEmitter access to the target MCRegisterInfo.
Add the MCRegisterInfo to the factories and constructors.
Patch by Tom Stellard <Tom.Stellard@amd.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156828
91177308-0d34-0410-b5e6-
96231b3b80d8
Sirish Pande [Tue, 15 May 2012 16:13:12 +0000 (16:13 +0000)]
Enable all Hexagon tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156824
91177308-0d34-0410-b5e6-
96231b3b80d8
Nuno Lopes [Tue, 15 May 2012 15:44:38 +0000 (15:44 +0000)]
minor simplification to code: Ty is already a SCEV type; don't need to run getEffectiveSCEVType() twice
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156823
91177308-0d34-0410-b5e6-
96231b3b80d8
David Chisnall [Tue, 15 May 2012 13:06:46 +0000 (13:06 +0000)]
Add some release notes about compiler-rt and libc++
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156819
91177308-0d34-0410-b5e6-
96231b3b80d8
David Majnemer [Tue, 15 May 2012 11:46:21 +0000 (11:46 +0000)]
Teach SimplifyLibCalls about stpcpy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156815
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Tue, 15 May 2012 09:59:13 +0000 (09:59 +0000)]
Remove warning about testing unsigned int with int.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156812
91177308-0d34-0410-b5e6-
96231b3b80d8
Stepan Dyatkovskiy [Tue, 15 May 2012 09:21:39 +0000 (09:21 +0000)]
Fixed one small stupid, but critical bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156810
91177308-0d34-0410-b5e6-
96231b3b80d8
Stepan Dyatkovskiy [Tue, 15 May 2012 06:50:18 +0000 (06:50 +0000)]
Rejected r156804 due to buildbots failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156808
91177308-0d34-0410-b5e6-
96231b3b80d8
Stepan Dyatkovskiy [Tue, 15 May 2012 05:09:41 +0000 (05:09 +0000)]
SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156804
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Tue, 15 May 2012 03:14:52 +0000 (03:14 +0000)]
Temporarily disable anti-dependence breaking for Mips until bug 12829 is
resolved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156801
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Tue, 15 May 2012 00:50:23 +0000 (00:50 +0000)]
Create a struct representing register units in TableGen.
Besides the weight, we also want to store up to two root registers per
unit. Most units will have a single root, the leaf register they
represent. Units created for ad hoc aliasing get two roots: The two
aliasing registers.
The root registers can be used to compute the set of overlapping
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156792
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Tue, 15 May 2012 00:41:56 +0000 (00:41 +0000)]
Remove extraneous ';'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156791
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Mon, 14 May 2012 23:59:17 +0000 (23:59 +0000)]
Add a command line option to skip the delay slot filler pass entirely for Mips.
The purpose of this option is to silence error messages issued by machine
verifier passes and enable them to run to the end. If this option is not
provided, -verify-machineinstrs complains when it discovers there is a
non-terminator instruction (an instruction that is in a delay slot) after the
first terminator in a basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156790
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael J. Spencer [Mon, 14 May 2012 22:43:34 +0000 (22:43 +0000)]
[Support/YAMLParser] Use rtrim on plain scalars.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156787
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael J. Spencer [Mon, 14 May 2012 22:43:21 +0000 (22:43 +0000)]
[Support/COFF] Make the order of members in symbol match the standard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156785
91177308-0d34-0410-b5e6-
96231b3b80d8
David Blaikie [Mon, 14 May 2012 21:48:19 +0000 (21:48 +0000)]
Fix use of uninitialized variable.
Found by GCC's maybe-uninitialized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156780
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 14 May 2012 21:30:58 +0000 (21:30 +0000)]
Don't access MO reference after invalidating operand list.
This should unbreak llvm-x86_64-linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156778
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 14 May 2012 21:10:25 +0000 (21:10 +0000)]
Fix PR12821.
RAFast must add an <imp-def> operand when it is rewriting a sub-register
def that isn't a read-modify-write.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156777
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Mon, 14 May 2012 20:35:04 +0000 (20:35 +0000)]
Move the capture analysis from MemoryDependencyAnalysis to a more general place
so that it can be reused in MemCpyOptimizer. This analysis is needed to remove
an unnecessary memcpy when returning a struct into a local variable.
rdar://
11341081
PR12686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156776
91177308-0d34-0410-b5e6-
96231b3b80d8
Brendon Cahoon [Mon, 14 May 2012 19:35:42 +0000 (19:35 +0000)]
Revert 156634 upon request until code improvement changes are made.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156775
91177308-0d34-0410-b5e6-
96231b3b80d8
Dan Gohman [Mon, 14 May 2012 18:58:10 +0000 (18:58 +0000)]
Rename @llvm.debugger to @llvm.debugtrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156774
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Mon, 14 May 2012 18:40:07 +0000 (18:40 +0000)]
Release notes for MIPS backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156772
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Mon, 14 May 2012 18:03:19 +0000 (18:03 +0000)]
Remove a stale forward declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156770
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 14 May 2012 15:46:27 +0000 (15:46 +0000)]
Remove the expensive BitVector::operator~().
Returning a temporary BitVector is very expensive. If you must, create
the temporary explicitly: Use BitVector(A).flip() instead of ~A.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156768
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 14 May 2012 15:37:25 +0000 (15:37 +0000)]
Remove BitVector binops.
These operators were crazy slow, calling malloc to return a temporary
result. At the same time, they look very innocent when used in code.
If you need temporary BitVectors to compute your thing, create them
explicitly, and use the inplace logical operators. This makes the high
cost explicit in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156767
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 14 May 2012 15:20:39 +0000 (15:20 +0000)]
Consider ad hoc aliasing when building RegUnits.
Register units can be used to compute if two registers overlap:
A overlaps B iff units(A) intersects units(B).
With this change, the above holds true even on targets that use ad hoc
aliasing (currently only ARM). This means that register units can be
used to implement regsOverlap() more efficiently, and the register
allocator can use the concept to model interference.
When there is no ad hoc aliasing, the register units correspond to the
maximal cliques in the register overlap graph. This is optimal, no other
register unit assignment can have fewer units.
With ad hoc aliasing, weird things are possible, and we don't try too
hard to compute the maximal cliques. The current approach is always
correct, and it works very well (probably optimally) as long as the ad
hoc aliasing doesn't have cliques larger than pairs. It seems unlikely
that any target would need more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156763
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 14 May 2012 15:12:37 +0000 (15:12 +0000)]
Record the ad hoc aliasing graph in CodeGenRegister.
The ad hoc aliasing specified in the 'Aliases' list in .td files is
currently only used by computeOverlaps(). It will soon be needed to
build accurate register units as well, so build the undirected graph in
CodeGenRegister::buildObjectGraph() instead.
Aliasing is a symmetric relationship with only one direction specified
in the .td files. Make sure both directions are represented in
getExplicitAliases().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156762
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 14 May 2012 15:10:07 +0000 (15:10 +0000)]
Compute topological signatures of registers.
TableGen creates new register classes and sub-register indices based on
the sub-register structure present in the register bank. So far, it has
been doing that on a per-register basis, but that is not very efficient.
This patch teaches TableGen to compute topological signatures for
registers, and use that to reduce the amount of redundant computation.
Registers get the same TopoSig if they have identical sub-register
structure.
TopoSigs are not currently exposed outside TableGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156761
91177308-0d34-0410-b5e6-
96231b3b80d8
Jakob Stoklund Olesen [Mon, 14 May 2012 15:01:19 +0000 (15:01 +0000)]
Add BitVector::anyCommon().
The existing operation (A & B).any() is very slow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156760
91177308-0d34-0410-b5e6-
96231b3b80d8
Stepan Dyatkovskiy [Mon, 14 May 2012 08:26:31 +0000 (08:26 +0000)]
SwitchInst cosmetics: renamed "Hash" method to "hash"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156757
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Mon, 14 May 2012 08:11:53 +0000 (08:11 +0000)]
Formatting changes. Remove the '...' placeholders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156756
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Mon, 14 May 2012 07:53:40 +0000 (07:53 +0000)]
Use ArrayRef instead of an explicit vector type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156755
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Mon, 14 May 2012 06:23:51 +0000 (06:23 +0000)]
Add blurb about Julia.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156754
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Holewinski [Sun, 13 May 2012 17:32:35 +0000 (17:32 +0000)]
ReleaseNotes: Add info on PTX back-end
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156745
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sun, 13 May 2012 15:13:22 +0000 (15:13 +0000)]
Hexagon: Initialize TBB to 0.
Found by valgrind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156744
91177308-0d34-0410-b5e6-
96231b3b80d8