Chris Lattner [Thu, 16 Jun 2011 21:27:52 +0000 (21:27 +0000)]
prune #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133194
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Chris Lattner [Thu, 16 Jun 2011 21:17:17 +0000 (21:17 +0000)]
move the address space into the subclass data field, saving a word on PointerType.
This limits the # address spaces to 2^23, which should be good enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133192
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Chris Lattner [Thu, 16 Jun 2011 21:08:21 +0000 (21:08 +0000)]
tidy up some comments, store the 'isvararg' bit for FunctionType in
the SubclassData field, saving a word.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133191
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Chris Lattner [Thu, 16 Jun 2011 21:00:43 +0000 (21:00 +0000)]
remove Type::getVAArgsPromotedType, which is dead, and tidy up a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133190
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Nick Lewycky [Thu, 16 Jun 2011 21:00:00 +0000 (21:00 +0000)]
There's no need to be so picky about the particular register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133189
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Dan Gohman [Thu, 16 Jun 2011 20:57:14 +0000 (20:57 +0000)]
Fix ARCOpt to insert releases on both successors of an invoke rather
than trying to insert them immediately after the invoke.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133188
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Jakob Stoklund Olesen [Thu, 16 Jun 2011 20:37:45 +0000 (20:37 +0000)]
Move PBQP off allocation_order_begin. No functional change intended.
I think PBQP could use RegisterClassInfo, but it didn't fit neatly with
the external interfaces that PBQP uses, so I'll leave that to Lang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133186
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Jakub Staszak [Thu, 16 Jun 2011 20:22:37 +0000 (20:22 +0000)]
Introduce MachineBranchProbabilityInfo class, which has similar API to
BranchProbabilityInfo (expect setEdgeWeight which is not available here).
Branch Weights are kept in MachineBasicBlocks. To turn off this analysis
set -use-mbpi=false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133184
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Owen Anderson [Thu, 16 Jun 2011 18:17:13 +0000 (18:17 +0000)]
Change the REG_SEQUENCE SDNode to take an explict register class ID as its first operand. This operand is lowered away by the time we reach MachineInstrs, so the actual register-allocation handling of them doesn't need to change.
This is intended to support using REG_SEQUENCE SDNode's with type MVT::untyped, and is part of the long road to eliminating some of the hacks we currently use to support register pairs and other strange constraints, particularly on ARM NEON.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133178
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Jakob Stoklund Olesen [Thu, 16 Jun 2011 18:17:00 +0000 (18:17 +0000)]
Switch linear scan to using RegisterClassInfo.
This avoids the manual filtering of reserved registers and removes the
dependency on allocation_order_begin().
Palliative care...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133177
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Galina Kistanova [Thu, 16 Jun 2011 18:13:57 +0000 (18:13 +0000)]
Move test for appropriate directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133176
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Bruno Cardoso Lopes [Thu, 16 Jun 2011 18:11:32 +0000 (18:11 +0000)]
Mark ldrexd/strexd w/ volatile memory by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133175
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Jakub Staszak [Thu, 16 Jun 2011 18:01:17 +0000 (18:01 +0000)]
Test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133174
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Justin Holewinski [Thu, 16 Jun 2011 17:50:00 +0000 (17:50 +0000)]
PTX: Finish new calling convention implementation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133172
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Justin Holewinski [Thu, 16 Jun 2011 17:49:58 +0000 (17:49 +0000)]
PTX: Rename register classes for readability and combine int and fp registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133171
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Jakob Stoklund Olesen [Thu, 16 Jun 2011 17:42:25 +0000 (17:42 +0000)]
Add TargetRegisterInfo::getRawAllocationOrder().
This virtual function will replace allocation_order_begin/end as the one
to override when implementing custom allocation orders. It is simpler to
have one function return an ArrayRef than having two virtual functions
computing different ends of the same array.
Use getRawAllocationOrder() in place of allocation_order_begin() where
it makes sense, but leave some clients that look like they really want
the filtered allocation orders from RegisterClassInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133170
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Nick Lewycky [Thu, 16 Jun 2011 17:14:38 +0000 (17:14 +0000)]
Add testcase for r133050 which added support for printing and parsing escaped
names for named metadata nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133166
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Owen Anderson [Thu, 16 Jun 2011 16:52:24 +0000 (16:52 +0000)]
Fix formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133164
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Dan Gohman [Thu, 16 Jun 2011 16:03:13 +0000 (16:03 +0000)]
Document nonlazybind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133160
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Dan Gohman [Thu, 16 Jun 2011 15:55:48 +0000 (15:55 +0000)]
Add a comment describing why transforming (shl x, 1) to (add x, x) is to be
considered safe enough in this context.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133159
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Justin Holewinski [Thu, 16 Jun 2011 15:17:11 +0000 (15:17 +0000)]
PTX: Fix whitespace errors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133158
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Bruno Cardoso Lopes [Thu, 16 Jun 2011 07:03:21 +0000 (07:03 +0000)]
Add AVX suport for fpextend.
Original patch by Syoyo Fujita with more comments by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133153
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Jakob Stoklund Olesen [Thu, 16 Jun 2011 03:07:40 +0000 (03:07 +0000)]
Prempt some obnoxious compiler from complaing about signed/unsigned
compares.
2^30 is actually the limit on the number of physical registers per
TargetRegisterInfo.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133142
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Jakob Stoklund Olesen [Thu, 16 Jun 2011 02:55:56 +0000 (02:55 +0000)]
Make sure to pass an unsigned to a printf format that is always %u.
This should unbreak the native ARM testers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133141
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Eli Friedman [Thu, 16 Jun 2011 02:36:32 +0000 (02:36 +0000)]
FileCheck-ize test, and make it work on EABI hosts, like clang-native-arm-cortex-a9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133139
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Eli Friedman [Thu, 16 Jun 2011 01:49:31 +0000 (01:49 +0000)]
Force a triple here so this test doesn't fail on EABI hosts (like clang-native-arm-cortex-a9).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133134
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Nick Lewycky [Thu, 16 Jun 2011 01:35:45 +0000 (01:35 +0000)]
Commit the right set of tests for r133124. Sorry 'bout that!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133133
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Andrew Trick [Thu, 16 Jun 2011 01:34:41 +0000 (01:34 +0000)]
Reenabling this test with REQUIRES: Asserts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133132
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Andrew Trick [Thu, 16 Jun 2011 01:33:35 +0000 (01:33 +0000)]
Add support to lit for build mode requirements. e.g.
REQUIRES: Asserts
REQUIRES: Debug
This required chaining test configuration properties. It seems like a
generally good thing to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133131
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Chad Rosier [Thu, 16 Jun 2011 01:24:24 +0000 (01:24 +0000)]
Typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133128
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Chad Rosier [Thu, 16 Jun 2011 01:21:54 +0000 (01:21 +0000)]
Revision r128665 added an optimization to make use of NEON multiplier
accumulator forwarding. Specifically (from SVN log entry):
Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier
accumulator forwarding:
vadd d3, d0, d1
vmul d3, d3, d2
=>
vmul d3, d0, d2
vmla d3, d1, d2
Make sure it catches cases where operand 1 is add/fadd/sub/fsub, which was
intended in the original revision.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133127
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Nick Lewycky [Thu, 16 Jun 2011 01:15:49 +0000 (01:15 +0000)]
Add a DAGCombine for (ext (binop (load x), cst)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133124
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Bruno Cardoso Lopes [Thu, 16 Jun 2011 00:40:02 +0000 (00:40 +0000)]
Silence warnings in non assert builds. Patch by David Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133118
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Anna Zaks [Thu, 16 Jun 2011 00:34:10 +0000 (00:34 +0000)]
Rename the test. Thanks Cameron! Use shorter/generic names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133115
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Anna Zaks [Thu, 16 Jun 2011 00:03:21 +0000 (00:03 +0000)]
Function::getNumBlockIDs() should be used instead of Function::size() to set the upper limit on the block IDs since basic blocks might get removed (simplified away) after being initially numbered. Plus the test case, in which SelectionDAGBuilder::visitBr() calls llvm::MachineFunction::removeFromMBBNumbering(), which introduces the hole in numbering leading to an assert in llc (prior to the fix).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133113
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Eli Friedman [Wed, 15 Jun 2011 23:59:25 +0000 (23:59 +0000)]
Add a limit to the number of instructions memdep will scan in a single block. This prevents (at least in some cases) O(N^2) runtime in passes like DSE.
The limit in this patch is probably too high, but it is enough to stop DSE from going completely insane on a testcase I have (which has a single block with around 50,000 non-aliasing stores in it).
rdar://
9471075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133111
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John McCall [Wed, 15 Jun 2011 23:37:01 +0000 (23:37 +0000)]
The ARC language-specific optimizer. Credit to Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133108
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Dylan Noblesmith [Wed, 15 Jun 2011 23:36:34 +0000 (23:36 +0000)]
unittests: add test for APInt::toString()
Follow up to r133032.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133107
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Owen Anderson [Wed, 15 Jun 2011 23:35:18 +0000 (23:35 +0000)]
Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133106
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Jakob Stoklund Olesen [Wed, 15 Jun 2011 23:28:14 +0000 (23:28 +0000)]
Use set operations instead of plain lists to enumerate register classes.
This simplifies many of the target description files since it is common
for register classes to be related or contain sequences of numbered
registers.
I have verified that this doesn't change the files generated by TableGen
for ARM and X86. It alters the allocation order of MBlaze GPR and Mips
FGR32 registers, but I believe the change is benign.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133105
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John McCall [Wed, 15 Jun 2011 21:43:52 +0000 (21:43 +0000)]
Update the Clang diagnostic emitter to emit IDs for diagnostic categories.
Patch by Argyrios Kyrtzidis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133093
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Rafael Espindola [Wed, 15 Jun 2011 21:18:51 +0000 (21:18 +0000)]
Testcase for previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133089
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Eli Friedman [Wed, 15 Jun 2011 21:08:25 +0000 (21:08 +0000)]
Simplify; no significant functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133086
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Rafael Espindola [Wed, 15 Jun 2011 21:03:04 +0000 (21:03 +0000)]
Fix cmake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133085
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Rafael Espindola [Wed, 15 Jun 2011 21:00:28 +0000 (21:00 +0000)]
Handle jump tables. Test to follow soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133083
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Argyrios Kyrtzidis [Wed, 15 Jun 2011 20:39:05 +0000 (20:39 +0000)]
Try fixing google1.osuosl.org:8011/builders/clang-i686-freebsd/builds/3548
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133081
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John McCall [Wed, 15 Jun 2011 20:36:13 +0000 (20:36 +0000)]
Add a new function attribute, nonlazybind, which inhibits lazy-loading
optimizations when emitting calls to the function; instead those calls may
use faster relocations which require the function to be immediately resolved
upon loading the dynamic object featuring the call. This is useful when it
is known that the function will be called frequently and pervasively and
therefore there is no merit in delaying binding of the function.
Currently only implemented for x86-64, where it turns into a call through
the global offset table.
Patch by Dan Gohman, who assures me that he's going to add LangRef documentation
for this once it's committed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133080
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Eli Friedman [Wed, 15 Jun 2011 19:58:09 +0000 (19:58 +0000)]
Remove unused code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133078
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Argyrios Kyrtzidis [Wed, 15 Jun 2011 19:56:01 +0000 (19:56 +0000)]
Document ADT/PackedVector.h in "Programmer's Manual" doc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133077
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Argyrios Kyrtzidis [Wed, 15 Jun 2011 19:19:09 +0000 (19:19 +0000)]
Add unit tests for ADT/PackedVector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133075
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Argyrios Kyrtzidis [Wed, 15 Jun 2011 19:18:13 +0000 (19:18 +0000)]
Constify PackedVector::reference::operator T().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133074
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Jim Grosbach [Wed, 15 Jun 2011 18:33:28 +0000 (18:33 +0000)]
Diagnostic for undefined assembler local symbols.
Re-apply 133010, with fixes for inline assembler.
Original commit message:
"When an assembler local symbol is used but not defined in a module, a
Darwin assembler wants to issue a diagnostic to that effect."
Added fix to only perform the check when finalizing, as otherwise we're not
done and undefined symbols may simply not have been encountered yet.
Passes "make check" and a self-host check on Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133071
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Andrew Trick [Wed, 15 Jun 2011 18:25:38 +0000 (18:25 +0000)]
Disabling this test until I can figure out the right lit flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133068
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Jakob Stoklund Olesen [Wed, 15 Jun 2011 18:02:56 +0000 (18:02 +0000)]
Remove custom allocation orders in SystemZ.
Note that this actually changes code generation, and someone who
understands this target better should check the changes.
- R12Q is now allocatable. I think it was omitted from the allocation
order by mistake since it isn't reserved. It as apparently used as a
GOT pointer sometimes, and it should probably be reserved if that is
the case.
- The GR64 registers are allocated in a different order now. The
register allocator will automatically put the CSRs last. There were
other changes to the order that may have been significant.
The test fix is because r0 and r1 swapped places in the allocation order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133067
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Evan Cheng [Wed, 15 Jun 2011 17:17:48 +0000 (17:17 +0000)]
Another revsh pattern. rdar://
9609059
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133064
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Andrew Trick [Wed, 15 Jun 2011 17:16:12 +0000 (17:16 +0000)]
Added -stress-sched flag in the Asserts build.
Added a test case for handling physreg aliases during pre-RA-sched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133063
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Chad Rosier [Wed, 15 Jun 2011 16:48:02 +0000 (16:48 +0000)]
TargetLoweringOpt is a struct used by DAGCombine, not a pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133062
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Roman Divacky [Wed, 15 Jun 2011 15:29:47 +0000 (15:29 +0000)]
Make PPC64CompilationCallback compilable no non-darwin platforms.
Patch by Nathan Whitehorn!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133059
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Nadav Rotem [Wed, 15 Jun 2011 14:37:18 +0000 (14:37 +0000)]
getZeroExtendInReg needs to get a scalar type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133057
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Nadav Rotem [Wed, 15 Jun 2011 12:26:53 +0000 (12:26 +0000)]
This test was failing on X86 machines which do not have SSE4. Fixed the test by
specifying that the target CPU is corei7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133053
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Nadav Rotem [Wed, 15 Jun 2011 11:19:12 +0000 (11:19 +0000)]
Enable the simplification of truncating-store after fixing the usage of
GetDemandBits (which must operate on the vector element type).
Fix the a usage of getZeroExtendInReg which must also be done on scalar types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133052
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Owen Anderson [Wed, 15 Jun 2011 06:53:50 +0000 (06:53 +0000)]
Replace the statically generated hashtables for checking register relationships with just scanning the (typically tiny) static lists.
At the time I wrote this code (circa 2007), TargetRegisterInfo was using a std::set to perform these queries. Switching to the static hashtables was an obvious improvement, but in reality there's no reason to do anything other than scan.
With this change, total LLC time on a whole-program 403.gcc is reduced by approximately 1.5%, almost all of which comes from a 15% reduction in LiveVariables time. It also reduces the binary size of LLC by 86KB, thanks to eliminating a bunch of very large static tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133051
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Nick Lewycky [Wed, 15 Jun 2011 06:37:58 +0000 (06:37 +0000)]
Teach the .ll parser to handle named metadata with non-simple names.
Unfortunately we can't follow what the rest of the language does (wrapping it
in double-quotes) because that would cause an ambiguity with metadata strings,
so instead we escape any unusual characters with \xx escaping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133050
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Bob Wilson [Wed, 15 Jun 2011 06:04:34 +0000 (06:04 +0000)]
A minor simplification: no functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133047
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Jakob Stoklund Olesen [Wed, 15 Jun 2011 05:09:20 +0000 (05:09 +0000)]
Use a SetTheory instance to expand register lists in register classes.
This prepares tablegen to compute register lists from set theoretic dag
expressions. This doesn't really make any difference as long as
Target.td still declares RegisterClass::MemberList as [Register].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133043
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Bill Wendling [Wed, 15 Jun 2011 04:56:13 +0000 (04:56 +0000)]
Remove the LTO stuff from the profile_rt library's Makefile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133042
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Jakob Stoklund Olesen [Wed, 15 Jun 2011 04:50:36 +0000 (04:50 +0000)]
Give CodeGenRegisterClass a real sorted member set.
Make the Elements vector private and expose an ArrayRef through
getOrder() instead. getOrder will eventually provide multiple
user-specified allocation orders.
Use the sorted member set for member and subclass tests. Clean up a lot
of ad hoc searches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133040
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Bill Wendling [Wed, 15 Jun 2011 04:31:19 +0000 (04:31 +0000)]
Improve the heuristic to emit the alias if the number of hard-coded registers
are also greater than the alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133038
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Eli Friedman [Wed, 15 Jun 2011 01:25:56 +0000 (01:25 +0000)]
Stop using memdep for a check that didn't really make sense with memdep. In terms of specific issues, using memdep here checks irrelevant instructions and won't work properly once we start returning "unknown" more aggressively from memdep.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133035
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Evan Cheng [Wed, 15 Jun 2011 01:12:31 +0000 (01:12 +0000)]
PerformBFICombine - (bfi A, (and B, Mask1), Mask2) -> (bfi A, B, Mask2) iff
the bits being cleared by the AND are not demanded by the BFI.
The previous BFI dag combine rule was actually incorrect (or used to be
correct until BFI representation changed).
rdar://
9609030
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133034
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Ted Kremenek [Wed, 15 Jun 2011 00:51:55 +0000 (00:51 +0000)]
add option for literal formatting to APInt::toString()
toString() now takes an optional bool argument that,
depending on the radix, adds the appropriate prefix
to the integer's string representation that makes it into a
meaningful C literal, e.g.:
hexademical: '-f' becomes '-0xf'
octal: '77' becomes '077'
binary: '110' becomes '0b110'
Patch by nobled@dreamwidth.org!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133032
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Eli Friedman [Wed, 15 Jun 2011 00:47:34 +0000 (00:47 +0000)]
Add "unknown" results for memdep, which mean "I don't know whether a dependence for the given instruction exists in the given block". This cleans up all the existing hacks in memdep which represent this concept by returning clobber with various unrelated instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133031
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Jakob Stoklund Olesen [Wed, 15 Jun 2011 00:20:40 +0000 (00:20 +0000)]
Move the list of register classes into CodeGenRegBank as well.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133029
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Tanya Lattner [Tue, 14 Jun 2011 23:48:48 +0000 (23:48 +0000)]
Add an optimization that looks for a specific pair-wise add pattern and generates a vpaddl instruction instead of scalarizing the add.
Includes a test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133027
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Rafael Espindola [Tue, 14 Jun 2011 23:47:36 +0000 (23:47 +0000)]
Add triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133026
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Anna Zaks [Tue, 14 Jun 2011 22:40:29 +0000 (22:40 +0000)]
Anna's test commit (#2).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133023
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Chad Rosier [Tue, 14 Jun 2011 22:29:10 +0000 (22:29 +0000)]
When pattern matching during instruction selection make sure shl x,1 is not
converted to add x,x if x is a undef. add undef, undef does not guarantee
that the resulting low order bit is zero.
Fixes <rdar://problem/
9453156> and <rdar://problem/
9487392>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133022
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Rafael Espindola [Tue, 14 Jun 2011 22:24:32 +0000 (22:24 +0000)]
Check the llc output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133021
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Eli Friedman [Tue, 14 Jun 2011 22:16:20 +0000 (22:16 +0000)]
PR10136: fix PPCTargetLowering::LowerCall_SVR4 so that a necessary CopyToReg doesn't appear to be dead.
Roman, since you're writing tests for other PPC-SVR4 vararg-related stuff, would you mind writing a test for this?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133018
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Anna Zaks [Tue, 14 Jun 2011 22:10:12 +0000 (22:10 +0000)]
Anna's test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133017
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Stuart Hastings [Tue, 14 Jun 2011 21:51:38 +0000 (21:51 +0000)]
Test case for x86 MMX inline asm. rdar://problem/
8886707
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133014
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Jim Grosbach [Tue, 14 Jun 2011 21:51:20 +0000 (21:51 +0000)]
Revert 133010. Self-hosted buildbot unhappy.
Apparently llvm itself generates undefined assembler local labels, causing
self-hosting problems with this patch. Reverting until that's sorted out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133013
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Jim Grosbach [Tue, 14 Jun 2011 21:13:25 +0000 (21:13 +0000)]
Diagnostic for undefined assembler local symbols.
When an assembler local symbol is used but not defined in a module, a
Darwin assembler wants to issue a diagnostic to that effect.
rdar://
9559714
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133010
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Rafael Espindola [Tue, 14 Jun 2011 20:38:50 +0000 (20:38 +0000)]
Add a test for the recent regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133009
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Eli Friedman [Tue, 14 Jun 2011 19:30:33 +0000 (19:30 +0000)]
Revert r133004 ; it's breaking nightly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133007
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Rafael Espindola [Tue, 14 Jun 2011 18:12:31 +0000 (18:12 +0000)]
Partial revert of 132882.
Dan noted that this would work on the case shown on the commit message. I think
the case that was failing was a bb ending with a redundant conditional jump:
...
jne foo
foo:
...
I was unable to find any such case in the tests or in a debug build of clang,
so I will revert this part of the patch and watch the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133004
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Evan Cheng [Tue, 14 Jun 2011 18:08:33 +0000 (18:08 +0000)]
Also recognize ARM v4t and v5e variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133002
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Dan Gohman [Tue, 14 Jun 2011 18:07:36 +0000 (18:07 +0000)]
This test is still failing. Delete the rest of it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133001
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Dan Gohman [Tue, 14 Jun 2011 18:03:11 +0000 (18:03 +0000)]
Revert r132991. This test is failing on the
llvm-gcc-x86_64-linux-selfhost buildbot and others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133000
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Jakob Stoklund Olesen [Tue, 14 Jun 2011 16:58:16 +0000 (16:58 +0000)]
Fix a compile time regression caused by too small hash tables.
Measure the worst case number of probes for a miss instead of the less
conservative number of probes required for an insertion.
Lower the limit to < 6 probes worst case.
This doubles the size of the ARM and X86 hash tables, other targets are
unaffected. LiveVariables runs 12% faster with this change.
<rdar://problem/
9598545>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132999
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Rafael Espindola [Tue, 14 Jun 2011 15:31:54 +0000 (15:31 +0000)]
Add 132986 back, but avoid non-determinism if a bb address gets reused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132995
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Nadav Rotem [Tue, 14 Jun 2011 13:23:10 +0000 (13:23 +0000)]
Add a testcase for #9623
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132991
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Rafael Espindola [Tue, 14 Jun 2011 12:48:26 +0000 (12:48 +0000)]
revert 132986 to see if the bots go green.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132988
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Nadav Rotem [Tue, 14 Jun 2011 09:10:37 +0000 (09:10 +0000)]
This testcase cause a failure on some bots. Remove the failing test until
further investigation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132986
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Nadav Rotem [Tue, 14 Jun 2011 08:11:52 +0000 (08:11 +0000)]
Add a testcase for checking the integer-promotion of many different vector
types (with power of two types such as 8,16,32 .. 512).
Fix a bug in the integer promotion of bitcast nodes. Enable integer expanding
only if the target of the conversion is an integer (when the type action is
scalarize).
Add handling to the legalization of vector load/store in cases where the saved
vector is integer-promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132985
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Nadav Rotem [Tue, 14 Jun 2011 07:18:26 +0000 (07:18 +0000)]
Disable trunc-store simplification on vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132984
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Cameron Zwarich [Tue, 14 Jun 2011 06:33:51 +0000 (06:33 +0000)]
Be more obvious about what is being tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132982
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Rafael Espindola [Tue, 14 Jun 2011 06:08:32 +0000 (06:08 +0000)]
Implement Jakob's suggestion on how to detect fall thought without calling
AnalyzeBranch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132981
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Bruno Cardoso Lopes [Tue, 14 Jun 2011 05:11:46 +0000 (05:11 +0000)]
Since ARM's prefetch implementation predicted the presence of a instruction
cache prefetch and now that the info from "prefetch" to "ARMPreload" is present,
only add a testcase for PLI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132978
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Bruno Cardoso Lopes [Tue, 14 Jun 2011 04:58:37 +0000 (04:58 +0000)]
Add one more argument to the prefetch intrinsic to indicate whether it's a data
or instruction cache access. Update the targets to match it and also teach
autoupgrade.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132976
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