arm64: dts: rockchip: add saradc and key for 3399 VR board

Change-Id: I8f331ffc30fe900afbe669c504b96350dd4de79e
Signed-off-by: jerry.zhang <jerry.zhang@rock-chips.com>

thermal: rockchip: rk3399: enhance the tsadc's bandgap feature

Due to the voltage ripple, the sensing data of the tsadc is not accurate.
And in this patch, the bandgap feature is enhanced to remove the voltage
ripple, and then the tsadc can sense the temperature more precisely.

Obsolete codes are removed as well.

Change-Id: Ifdd98def63212bc13306e7d5befee5eb32dbbc2f
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

CHROMIUM: drm: rockchip/dw_hdmi: introduce werid audio tmds_n table

There are some rates that would be ranged for better clock jitter at
Chrome OS tree, like 25.175Mhz would range to 25.170732Mhz.

But due to the clock is aglined to KHz in struct drm_display_mode,
this would bring some inaccurate error if we still run the compute_n
math, so let's just code an const table for it until we can actually
get the right clock rate.

Change-Id: Ief14b7c9bffa95ff3b173925f3e1bd795625320d
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/316280
Commit-Ready: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>

CHROMIUM: drm: bridge/dw_hdmi: improved the hdmi audio N/CTS cacluate math

The original math would bring some inaccurate to N/CTS that would
caused those magic number won't fit the HDMI 1.4 Spec request:
128 * SampleRate = Tmds * N / CTS;

So this time we try to improved to math of N that would find the
minimal inaccurate with the HDMI 1.4 Spec.

Change-Id: Ied3cde3c352d955ae6f15d5e7fb172e92316c2a5
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/315424
Reviewed-by: Douglas Anderson <dianders@chromium.org>

CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Fixup the clock to be what we expect

We allow some amount of slop in dw_hdmi_rockchip_mode_valid().  That's
a good thing since allowing a little bit of slop lets us support a
bunch of extra resolutions.

Originally, we also made a change to the VOP code to add the concept
of slop in there.  That was reasonable, but there was a problem: it
would tend to request clock rates that weren't _exactly_ clock rates
that we thought about.  It's possible that the common clock framework
would map these to PLL rates that we haven't thought about and we
haven't tested for jitter.

Instead of changing VOP, we should probably adjust the clock ourselves
in the mode_fixup function.  That way we'll request the exact clock we
tested and we'll know how the common clock framework will map it.

Change-Id: I56c2b046f76d554aab5eaed7a6b171ea074d6a62
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/284376
Reviewed-by: Alexandru Stan <amstan@chromium.org>

CHROMIUM: drm: rockchip/dw_hdmi-rockchip: Protect against > 2GHz pixel clocks

Add a check just to make sure that someone doesn't try to give us a
pixel clock that is > 2GHz.  If they did that, some of our math might
overflow, so it's good to make sure we don't do it.

Change-Id: I451602f0d771bb16b399b43e376e1054b7ee060f
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/284642
Reviewed-by: Alexandru Stan <amstan@chromium.org>

CHROMIUM: drm: rockchip/dw_hdmi-rockchip: refactor the mode table

This cleanup will allow the following patch to implement slop easier.

25175000-40000000 and a few other ranges use the same settings.
And the rest of the driver already snaps to the next highest
frequency when it gets the settings. So this patch removes
a lot of the duplicates. It should be a noop change.

And frequencies within 0.1% should be close enough, let's redo
rockchip hdmi to allow slop.

Change-Id: Ic4865b2825de9b6c3b3e8d029066a8964e8ede6b
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

media: rockchip-vpu: fix compiled warning about uninitialized 'ret'

rockchip_vpu_hw.c:251:5: warning: 'ret' may be used uninitialized in this function [-Wuninitialized]

Change-Id: Ia5564c2da345c5922341b818961b18d2b1419013
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

ARM64: dts: rk3399: modify i2s node in rk3399-evb.dtsi

Change-Id: I2c96c537792d5981afcbdc88d8d5dcf57155b977
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

phy: rockchip-emmc: enable internal pull-down for strobe line

We enable it by default as we could see the usage of PCB layout
will not stuff this registor. For currently boards which soldered
it already, there should be no harmful.

Change-Id: Idc05c244dbaeebb1028e4828aa7a7d655899beb8
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

UPSTREAM: ASoC: rt5616: add missing mute control for HPVOL

Add missing kcontrol for HPVOL mute control.

Signed-off-by: John Lin <john.lin@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Bug: 25923642

(cherry picked from git.kernel.org broonie/sound.git for-next
 commit d7fcd13663fe43ad938fec1acd46ff196dddf914)
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I75951c4b67474951e6c033e0dece5134c51dc233
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

UPSTREAM: ASoC: rt5616: Add support sample rate to 192KHz

Reference the TRM, the ALC5616 support one 24bit/8KHz ~ 192KHz
I2S/PCM Interface for stereo DAC and stereo ADC.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Bug: 27307957
Patchset: fetch the upstream ASoC for rk3036 kylin board.

(cherry picked from git.kernel.org broonie/sound.git for-next
 commit 4e26ad80cbd3a6b0d606201892e81a9a9c6864ce)
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: I1751e2c663689d4a45cd94d609c0b61d1ac9237b
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

UPSTREAM: ASoC: rt5616: add the mclk for the codec driver

This patch adds the code to enable the clock to the CODEC driver
if it needs the clock enabled.

In some case, We need to claim the clock which is driving the codec
so that when we enable clock gating, we continue to clock the codec
when needed.

if mclk provided, to enable and disable the clock source.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Bug: 27307957
Patchset: fetch the upstream ASoC for rk3036 kylin board.

(cherry picked from git.kernel.org broonie/sound.git for-next
 commit 76d3204eaa9364a662f0fe0f075dfe61e6bd14fe)
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Iaa1b07a1ff729f3b84c1e32cd0fdd0f36d9a8889
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

UPSTREAM: ASoC: rt5616: trivial: fix the typo

This patch try to fix the trivial typo.

Run "scripts/checkpatch.pl -f --subjective xxx"
The enable more subjective tests.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Bug: 27307957
Patchset: fetch the upstream ASoC for rk3036 kylin board.
(Note: match the Kconfig for rt5616)

(cherry picked friom git.kernel.org broonie/sound.git for-next
 commit 99081589c5ad590e9828ae9febc384612f241164)
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Change-Id: Ied09a6f69a7364daa68309fa9a0a4cd2e4a368e6
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

UPSTREAM: ASoC: rt5616: rename some alsa control names

Rename some alsa control name as what they should be.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Bug: 25923642
Patchset: rt5616 audio

(cherry picked from broonie/sound.git#for-next e2133b64820df302a8e3d00c7531018470cd63a9)
Signed-off-by: Kees Cook <keescook@chromium.org>
Change-Id: I1d81031ddbe7ce5c38602c38ab643f893f436ef0
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

UPSTREAM: ASoC: rt5616: add an of_match table

Add a device tree match table. This serves to make the driver's support
of device tree more explicit.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Bug: 25923642
Patchset: rt5616 audio

(cherry picked from broonie/sound.git#for-next e17ff2de826f8c2153cf23c8bbd9097219a84fa9)
Signed-off-by: Kees Cook <keescook@chromium.org>
Change-Id: I7ee1967a3cdf9583942c0d75b5e4d0125d31cd0c
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

UPSTREAM: ASoC: rt5616: Return error if device ID mismatch

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Bug: 25923642
Patchset: rt5616 audio

(cherry picked from broonie/sound.git#for-next 36ddd489b0669f8913c8eda192507f8267749917)
Signed-off-by: Kees Cook <keescook@chromium.org>
Change-Id: I55e15dfb42bf5022a976451311214980c4897aa5
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

UPSTREAM: ASoC: rt5616: add rt5616 codec driver

This is the initial codec driver for rt5616.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Bug: 25923642
Patchset: rt5616 audio

(cherry picked from broonie/sound.git#for-next b1d15059957d33d111e0ed38724a6b2c5caac790)
Signed-off-by: Kees Cook <keescook@chromium.org>
Change-Id: I17f99e549cb59a3788b257f63e51a84b3e9d4162
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

sound: rockchip: remove rk's 5616 code

Change-Id: Ie48539c64500509ed19b6f13e8e30e864b8c6072
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

ARM: configs: rokchip: enable RT5616 support for linux defconfig

Quick way to test rt5616 on RK3036 Kylin board, you need bellow
commands:
  tinymix "HP Playback Switch" 1
  tinymix "HPVOL Playback Switch" 1
  tinymix "HP Playback Volume" 10
  tinymix "HPO MIX HPVOL Switch" 1
  tinymix "OUT MIXR DAC R1 Switch" 1
  tinymix "OUT MIXL DAC L1 Switch" 1
  tinymix "Stereo DAC MIXR DAC R1 Switch" 1
  tinymix "Stereo DAC MIXL DAC L1 Switch" 1

Test command:
root@linaro-alip:~#  aplay -D plughw:CARD=rockchiprt5616c,DEV=0 /opt/Third_Eye.wav

Change-Id: Ic4d44ed1a373869d5e0e670701b06f58f0e6399c
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

ARM: dts: rockchip: merge the hdmi-audio card with rt5616-codec card

Change-Id: I2888cbb7df9d4cd9d270f7fd81f34b27b40997cc
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

drm/rockchip: select hdmi codec when enable inno_hdmi

Change-Id: I33462d7677cec7e774f6901b5af3f25e402c3358
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

arm64: dts: rockchip: add usb typec phy node for rk3399

Change-Id: I0313f7812bad02136abbd8868a201cf4409620d6
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

drm/rockchip: dw-mipi: add dw-mipi power domain support

Reference the power domain incase dw-mipi power down when
in use.

Change-Id: I54a0f418f20299a744f87c1337f06ff3341dfac5
Signed-off-by: Chris Zhong <zyw@rock-chips.com>

arm64: dts: rockchip: add HDMI device node for RK3399

Change-Id: Ibfdf59eed0f055900d9409f6ceab20d0ec8f480c
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

arm64: dts: rockchip: rk3399-evb: merge common part

dtbs is same as before.

Change-Id: I0381607627905b98dee7962f8e62844c877fcd54
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

video: rockchip: 3399 vop: add support DP output and YUV422 output mode

Change-Id: Ia01db8ae24f3e35e9a84b48cb2276463dd26bfb3
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rockchip: fb: add DP and yuv422 define

Change-Id: Iaaf52ff234444874ac730f8b75fa56308515f8f7
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rockchip: vop: 3399: fix polarity config error

Change-Id: I136d602e384a6e73278e30be3c3bb6d58086285c
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rockchip: fb: no need close all win when hdmi switch screen at first time

Change-Id: I6dff985f3c2b44c6b461e0ee039823e59839b52c
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

ARM64: dts: rk3399-box-808-android: add disp policy for box product

Change-Id: Ic191bc7ff0540fa073face6bcd2be8f6de18fcc0
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

drm/rockchip: gem: import dma_buf to gem

We want to display a buffer allocated by other driver, need import
the buffer to gem.

Change-Id: Ifd5fef3fbf2b4daea6d624ed2a250c2fe626309d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

power_supply: Add new type for USB chargers

This adds a power supply type for special USB charger,
this kind of USB charger is similar to Dedicated Charging
Port, but not a standard DCP because of D+/D- not short.

Change-Id: I7c478da642b43465a9de65c8b5d7b8250c0da037
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

arm64: dts: rockchip: add u2phy0 and u2phy0_otg node for rk3399

RK3399 SoC usb2 PHY comprises with one host-port and
one otg-port, we support otg-port for the time being.

Change-Id: I7d6a464372603e54c3a06d994e18d80eb84fa5a5
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

FROMLIST: drm/rockchip: dw_hdmi: introduce the pclk for grf

For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.

Change-Id: I8f43e5c46c8559d6b6fe96a12cd026319b1d84e5
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9223317/)

FROMLIST: drm/rockchip: dw_hdmi: introduce the VPLL clock setting

For RK3399 HDMI, there is an external clock need for HDMI PHY,
and it should keep the same clock rate with VOP DCLK.

VPLL have supported the clock for HDMI PHY, but there is no
clock divider bewteen VPLL and HDMI PHY. So we need to set the
VPLL rate manually in HDMI driver.

Change-Id: I73abc382ff43bfa93d150c3449693f207029549f
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9223327/)

FROMLIST: drm/rockchip: dw_hdmi: add RK3399 HDMI support

RK3399 and RK3288 shared the same HDMI IP controller, only some light
difference with GRF configure.

Change-Id: Ic404ff3df6004a87b709f00552d91eb546c78450
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9223315/)

FROMLIST: drm/rockchip: dw_hdmi: Use auto-generated tables

The previous tables for mpll_cfg and curr_ctrl were created using the
20-pages of example settings provided by the PHY vendor.  Those
example settings weren't particularly dense, so there were places
where we were guessing what the settings would be for 10-bit and
12-bit (not that we use those anyway).  It was also always a lot of
extra work every time we wanted to add a new clock rate since we had
to cross-reference several tables.

In <http://crosreview.com/285855> I've gone through the work to figure
out how to generate this table automatically.  Let's now use the
automatically generated table and then we'll never need to look at it
again.

We only support 8-bit mode right now and only support a small number
of clock rates and and I've verified that the only 8-bit rate that was
affected was 148.5.  That mode appears to have been wrong in the old
table.

Change-Id: I42b260300880f2bab6732c5ee3b11bc78e87500c
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
(am from https://patchwork.kernel.org/patch/9223325)

FROMLIST: drm/rockchip: dw_hdmi: adjust cklvl & txlvl for RF/EMI

Dut to the high HDMI signal voltage driver, Mickey have meet
a serious RF/EMI problem, so we decided to reduce HDMI signal
voltage to a proper value.

The default params for phy is cklvl = 20 & txlvl = 13 (RF/EMI failed)
  ck: lvl = 13, term=100, vlo = 2.71, vhi=3.14, vswing = 0.43
  tx: lvl = 20, term=100, vlo = 2.81, vhi=3.16, vswing = 0.35

1. We decided to reduce voltage value to lower, but VSwing still
keep high, RF/EMI have been improved but still failed.
   ck: lvl =  6, term=100, vlo = 2.61, vhi=3.11, vswing = 0.50
   tx: lvl =  6, term=100, vlo = 2.61, vhi=3.11, vswing = 0.50

2. We try to keep voltage value and vswing both lower, then RF/EMI
test all passed  ;)
   ck: lvl = 11, term= 66, vlo = 2.68, vhi=3.09, vswing = 0.40
   tx: lvl = 11, term= 66, vlo = 2.68, vhi=3.09, vswing = 0.40
When we back to run HDMI different test and single-end test, we see
different test passed, but signle-end test failed. The oscilloscope
show that simgle-end clock's VL value is 1.78v (which remind LowLimit
should not lower then 2.6v).

3. That's to say there are some different between PHY document and
measure value. And according to experiment 2 results, we need to
higher clock voltage and lower data voltage, then we can keep RF/EMI
satisfied and single-end & differen test passed.
  ck: lvl =  9, term=100, vlo = 2.65, vhi=3.12, vswing = 0.47
  tx: lvl = 16, term=100, vlo = 2.75, vhi=3.15, vswing = 0.39

Change-Id: I766df9ad519ddddb9be76f95fbbdb36c5a2d6e51
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
(am from https://patchwork.kernel.org/patch/9223303/)

FROMLIST: drm/rockchip: dw_hdmi: Set cur_ctr to 0 always

Jitter was improved by lowering the MPLL bandwidth to account for high
frequency noise in the rk3288 PLL.  In each case MPLL bandwidth was
lowered only enough to get us a comfortable margin.  We believe that
lowering the bandwidth like this is safe given sufficient testing.

Change-Id: Ife266747f0e6ed46f914f4868362fefc481440f9
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9223301/)

ARM: dts: rockchip: add sdmmc for rk3288 fennec

Add sdmmc dts nodes support for RK3288-Fennec boards

Change-Id: I6e62da8ef84a7c5a492f54448fc7261ff87432bf
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>

ARM: config: add the rockchip_linux_defconfig for rockchip

Add the config for rockchip SoCs with ubuntu os, the most of SoCs will be supported
for this config. (e.g: rk3036. rk3288....)

Change-Id: Ia781de208ccaad7a95b6a325fce97db5e588fafa
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

video: rockchip: hdmi: set default color depth to 8bit

Change-Id: I2e4f8d9f980c4169e254ad56793503f76f091e7f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 34468c2b30ae361ded2a8867e478c972bb5de5a6)

video: rockchip: hdmi: fix current color mode and depth info

If current color mode and depth is auto, information in sysfs
node is equal to zero, is not responsed to actual mode and
depth, now fix it.

Change-Id: Ifd2888b2af5522a026be92071d98d6bc081d02db
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit c2cac5c2cff8464ab4ba2c2638a84d997aa0365e)

arm64: dts: rockchip: enable isp0 and isp1 for rk3399 mid board

Change-Id: Ib4404a2af7309200d48e7beeede4f237ee03d455
Signed-off-by: Yankun Zheng <zyk@rock-chips.com>

arm64: dts: rockchip: add sensors config for rk3399 mid board

Change-Id: Ib97f1802ea14fb0d5fcb043325733f4d58e1188a
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

ARM64: dts: rockchip: add sensor mpu6500 node for rk3399 mid board

Change-Id: If78d74fccf3195e3e81b91dc6d5981929ca16319
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

ARM64: rockchip_defconfig: enable isp driver

Change-Id: I5025d6301a3f1ec7f6b3e243777216493e77ec9c
Signed-off-by: Yankun Zheng <zyk@rock-chips.com>

ARM64: rockchip_defconfig: enable sensors devices

Change-Id: I75f4893ffa0842915138b3de7d29afc6ef35e2fc
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

driver, sensors: fix compile err

Change-Id: Ice9e31086b29a20e37bf5ba3bf08d1e77a9a36a3
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

driver, sensors, ak8963: modify for new 64bit akm hal

Change-Id: Idd84d215eaeeec24b687c632189ef1fbbafbbf22
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

drivers, input: add sensors to compile

Change-Id: I7227ab9d989df3adef73883f7be2860d1742c225
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

ARM: dts: rockchip: turn the gpu and vpu on for rk3288 fennec

Because there are not the gpu and vpu dts nodes in the rk3288-dtsi
on the upstream, and we need to these feature for Rockchip Release
Platform. Let's support them.

Change-Id: I890aeb139476dca26f760db4603bf63a55aa4084
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

UPSTREAM: ARM: dts: rockchip: add dts for RK3288-Fennec boards

This adds support for RK3288-Fennec boards. Currently supported
are serial console, wired networking, hdmi output and USB.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org kernel/git/mmind/linux-rockchip.git
v4.8-armsoc/dts32 commit 4285b7e744ce08e92fd2231c08c34bb674d08f87)

Change-Id: I8bdd6a004c49883cb0d25761275312a6d9267879
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

ARM64: dts: rk3399: prevent out of bounds accesses to array

It will return state++ when get the idle state, so we need fill
anothor idle power(=WFI) in the parameter of EAS, code as below:

static int group_idle_state(struct sched_group *sg)
{
        int i, state = INT_MAX;

        /* Find the shallowest idle state in the sched group. */
        for_each_cpu(i, sched_group_cpus(sg))
                state = min(state, idle_get_state_idx(cpu_rq(i)));

        /* Take non-cpuidle idling into account (active idle/arch_cpu_idle()) */
        state++;

        return state;
}

Change-Id: I9293da1379746768823df4e75a7478aa50fc0e87
Signed-off-by: Chen Liang <cl@rock-chips.com>

ARM64: sched: fix bug: avoid infinite loop

All of the sched domains will be destroied and then rebuilded when a cpu
online/offline, if a softirq comes after the shced domains are destroied,
this cpu will be stucked in the infinite loop in sched_group_energy(),
because of it can not get the shced donmain in for_each_domain(cpu, sd).

Change-Id: I154cf560e4e1af4a7a2547154ad321e936196ce3
Signed-off-by: Chen Liang <cl@rock-chips.com>

iommu/rockchip: fix old/new iommu driver conflict

Change-Id: I22fcf6be63aebe76417a470975c6c10bbc3ed92a
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/rockchip: vop: add x/ymirror support

Change-Id: If7d1ef5f3246f467c48895aa2f54957bd59eed18
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

net: phy: fix sysfs operation for writing PHY's registers

Change-Id: Ic6cc82c8eb8e20572e77ae703755440012cd3f46
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>

drm/rockchip: vop: fixup plane zpos

Set unused plane with top zpos will cause a alpha problem.

if there are two planes use same zpos, hardware will do twice
alpha compute, that would cause display abnormal.

Change-Id: I3b5d15c5239412c670ad377edbcc66d7f6c59341
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

net: stmmac: dwmac-rk: fix for GMAC resume after PD off/on

GMAC Power Domain(PD) will be disabled during suspend.
That will causes GRF registers reset.
So corresponding GRF registers for GMAC must be setup again.

Change-Id: I9ca541c4599299bad309b810994824d364c2a510
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>

ARM64: sched: fix bug: remove printk while schedule is in progress

It will cause deadlock and while(1) if call printk while schedule
is in progress. The block state like as below:

cpu0(hold the console sem):
printk->console_unlock->up_sem->spin_lock(&sem->lock)->wake_up_process(cpu1)
->try_to_wake_up(cpu1)->while(p->on_cpu).

cpu1(request console sem):
console_lock->down_sem->schedule->idle_banlance->update_cpu_capacity->
printk->console_trylock->spin_lock(&sem->lock).

p->on_cpu will be 1 forever, because the task is still running on cpu1,
so cpu0 is blocked in while(p->on_cpu), but cpu1 could not get
spin_lock(&sem->lock), it is blocked too, it means the task will running
on cpu1 forever.

Change-Id: I60d02d8c957273872f97939632bdd235accdad4e
Signed-off-by: Chen Liang <cl@rock-chips.com>

video: rockchip: rk fb: add debug message

Change-Id: I9af8c17dd95fbf7c9ce44d9cb912071f05fd6014
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

regulator: xz3216: Add a sentinel to xz3216_i2c_id[]

This patch fix this bug:
BUG: KASAN: global-out-of-bounds in i2c_device_match+0x64/0xa4 at addr ffffff9009046800
Read of size 1 by task swapper/0/1
Address belongs to variable xz3216_i2c_id+0x20/0x2c0
CPU: 5 PID: 1 Comm: swapper/0 Not tainted 4.4.14 #21
Hardware name: Rockchip RK3399 Evaluation Board v2 (Android) (DT)
Call trace:
[<ffffff900808b2d8>] dump_backtrace+0x0/0x288
[<ffffff900808b574>] show_stack+0x14/0x1c
[<ffffff90084c16c4>] dump_stack+0xc4/0x100
[<ffffff900823fdd4>] kasan_report+0x36c/0x49c
[<ffffff900823f2e4>] __asan_load1+0x24/0x50
[<ffffff90088f7924>] i2c_device_match+0x64/0xa4
[<ffffff90086829b8>] __device_attach_driver+0x80/0xd8
[<ffffff900868064c>] bus_for_each_drv+0xf8/0x12c
[<ffffff900868232c>] __device_attach+0x114/0x1a4
[<ffffff9008682b9c>] device_initial_probe+0x10/0x18
[<ffffff9008680904>] bus_probe_device+0x50/0xe8
[<ffffff900867ee14>] device_add+0x5f8/0x774
[<ffffff900867efac>] device_register+0x1c/0x28
[<ffffff90088f7dd0>] i2c_new_device+0x258/0x2a4
[<ffffff90088f853c>] i2c_register_adapter+0x4b4/0x600
[<ffffff90088f8700>] __i2c_add_numbered_adapter+0x78/0x88
[<ffffff90088f8d9c>] i2c_add_adapter+0x50/0xcc
[<ffffff9008900c1c>] rk3x_i2c_probe+0x460/0x4fc
[<ffffff9008684fac>] platform_drv_probe+0x70/0xc8
[<ffffff9008682648>] driver_probe_device+0x16c/0x364
[<ffffff90086828d4>] __driver_attach+0x94/0xc8
[<ffffff9008680010>] bus_for_each_dev+0xe0/0x11c
[<ffffff9008682bd4>] driver_attach+0x30/0x3c
[<ffffff9008680ca8>] bus_add_driver+0x160/0x294
[<ffffff9008683edc>] driver_register+0x10c/0x168
[<ffffff9008685e34>] __platform_driver_register+0x7c/0x88
[<ffffff90095da854>] rk3x_i2c_driver_init+0x18/0x20
[<ffffff90095a4df0>] do_one_initcall+0x168/0x220
[<ffffff90095a5078>] kernel_init_freeable+0x1d0/0x274
[<ffffff9008ec5f40>] kernel_init+0x10/0x108
[<ffffff9008084cd0>] ret_from_fork+0x10/0x40
Memory state around the buggy address:
 ffffff9009046700: fa fa fa fa 00 03 fa fa fa fa fa fa 00 00 00 07
 ffffff9009046780: fa fa fa fa 07 fa fa fa fa fa fa fa 00 00 00 00
>ffffff9009046800: fa fa fa fa 00 01 fa fa fa fa fa fa 00 01 fa fa
                   ^
 ffffff9009046880: fa fa fa fa 04 fa fa fa fa fa fa fa 00 04 fa fa
 ffffff9009046900: fa fa fa fa 00 05 fa fa fa fa fa fa 07 fa fa fa

Change-Id: I624d92b1fefdf87cfb58b9df10db85723b5ed534
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

ARM: dts: rk3288: limit vpu aclk freq to 400M

Change-Id: I800c50f8c2940921aaa0d388459fb218f1dd874c
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

ARM: dts: rk3036: limit vpu aclk freq to 297M

Change-Id: I5fe0d49b7bde947188fcf718ffdb850e0c20c066
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

media: rockchip-vpu: remove force aclk_vcodec 400M

3036's vpu is not stable with 400M.

Change-Id: I5ea988704fd4d82154319cc0b3376aad10d9373b
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

ARM: dts: rockchip: enable sdmmc for evb rk3288

Change-Id: I9a206e7088afc9910a81c3832d17a6b252d09a1d
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

ARM: dts: rockchip: enable usb host2 for evb rk3288

Change-Id: I2866ef914240a3fb7ae29c35ea61f7a1bf384559
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

ARM: dts: rockchip: enable gmac for evb rk3288

Change-Id: Ib1fa841da0d5b08f5fe7967a8365b4d7467ca8de
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

drm/rockchip: force 8bit mode if vop not support 10bit output

Some vop can't support 10bit mode, if connector needs 10bit output,
force to use 8bit rgb888 mode, because the hardware would do the
format convert.

Change-Id: I8cdfbab12dd0ad63d36f3c52a4c7786a2bdbe6a1
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

ARM64: sched: cpufreq_sched: fix bug: init data before use it in thread

policy->governor_data will be use in cpufreq_sched_thread, but it is init
after wake thread, it will cause NULL point access.

Change-Id: I320a3da34560e49f293211be92cb8310d8e395d7
Signed-off-by: Chen Liang <cl@rock-chips.com>

ARM64: cpufreq_sched: implement event CPUFREQ_GOV_LIMIT for governor

If we do not limit the freqency immediately when the cpu is overheat,
thermal driver will lost the control of temperature. So implement event
CPUFREQ_GOV_LIMIT for governor to limit the freqency immediately.

Change-Id: Id709edd377226417ead92ead2ae3d3d19b3eeabf
Signed-off-by: Chen Liang <cl@rock-chips.com>

FIXUP: FROMLIST: thermal: rockchip: fixes the exception interrupts

The hardware-tracked trips will set the alarm interrupt value for
registers. Then when the thermal zone has no trips to be set,
That make the thermal trips callback a over range value.

The root cause is the rk_tsadcv2_temp_to_code() function to handle the
invalid temperature range is indeed incorrect, let's fix it on now.
Otherwise, the thermal alarm interrupt will be triggered all the time
on some SoCs.

Fox example:
localhost tmp # grep thermal /proc/interrupts; sleep 5;
grep thermal /proc/interrupts

23:     994830  ..    GICv3 129 Level     rockchip_thermal
23:    1003423  ..    GICv3 129 Level     rockchip_thermal

Change-Id: I0ddbd0b2dd9c03e785e588f5f339f1eeed4e1c5c
Reported-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org
(am from https://patchwork.kernel.org/patch/9192357/)

arm64: dts: rockchip: sync the upstream power domain for rk3399

This patch updates the power domain node to sync upstream.
As Heiko landed on [0].

[0]:
https://git.kernel.org/cgit/linux/kernel/git/mmind/linux-rockchip.git/
commit/?id=6d3cdbf1c219f9817290903e9d1e8de7462a7b54

Change-Id: Ifbf641965d6f66d0f8a941a1162667ac96709847
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

CHROMIUM: [media]: rockchip-vpu: add rk3288 h264e

Change-Id: Idf6697c107609f5ee80a39c08a5670bebe78c469
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

ARM: dts: rockchip: add the lvds-panel power supply for rk3288-evb-rk808 board

Change-Id: Id90524720ca5012464f8fd7608594b7bdf5d78b0
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

ARM: dts: rockchip: add the lvds-panel power supply for rk3288-evb-act8846 board

Change-Id: I48662e03909459d458ea148b8c37bbffd08371d2
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

ARM: dts: rk3288-evb: Add lvds device node on rk3288-evb board

Due to there are only two vop module, that's to say we can't keep
enable eDP / LVDS / HDMI at the same time, so this time we still
keep LVDS device disabled. If you want to enable lvds device,
then you should disable the HDMI or eDP device, and enable the
LVDS device.

And one more thing that eDP panel and LVDS panel can't enable at
the same time, cause both of them have the same enable gpio. If
you still want to do this, there is an hack way that delete the
'enable-gpios' comptabile from 'lvds-panel'.

Change-Id: Iecf71adc4d307dcdb8b7317a93430e99bb12e20a
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

ARM: dts: rockchip: add rk3288 lvds node

Add the basic node for the lvds controller of rk3288 and hook it into the
display-subsystem hirarchy.

Change-Id: I150f27e5d9a626342c4fe984167f94ae717ab9ad
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

ARM: dts: rockchip: add rk3288 lcdc0 pinmux settings

Add pinctrl settings for the configurable lcdc0 signals dclk, den, hsync
and vsync. The lcdc0 data pin configuration is not software controlable.

Change-Id: I733179908fd4276e919fe44c6125d504926d751a
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

drm/rockchip: Add support for Rockchip Soc LVDS

This adds support for Rockchip soc lvds found on rk3288

Change-Id: Iaab32c8c02fb17bf55db97a7952a346ce45c7d09
Signed-off-by: Mark Yao <yzq@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

dt-bindings: Add documentation for rockchip lvds

Add binding documentation for Rockchip SoC LVDS driver.

Change-Id: Ie5bbf6715d9dc6b1f5793f78f3eec96783c4725e
Signed-off-by: Mark Yao <yzq@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>

UPSTREAM: drm/bridge: removed dummy mode_fixup function from dw-hdmi.

Other bridge drivers don't implement this optional function.
Removed dummy code from dw-hdmi brigde driver.

Signed-off-by: Carlos Palminha <palminha@synopsys.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1455120639-29934-1-git-send-email-palminha@synopsys.com
Change-Id: I1ea1c912885b81e269befb2c83b79f5a261f0881
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from 6feea0ebbdca2fe1b7e94ec66aca3aa7279af59f)

UPSTREAM: drm: Do not set connector->encoder in drivers

An encoder is associated with a connector by the DRM core as a result of
setting up a configuration. Drivers using the atomic or legacy helpers
should never set up this link, even if it is a static one.

While at it, try to catch this kind of error in the future by adding a
WARN_ON() in drm_mode_connector_attach_encoder(). Note that this doesn't
cover all the cases, since drivers could set this up after attaching.
Drivers that use the atomic helpers will get a warning later on, though,
so hopefully the two combined cover enough to help people avoid this in
the future.

Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Mark yao <mark.yao@rock-chips.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1447694393-24700-1-git-send-email-thierry.reding@gmail.com
Change-Id: Iaec2775976574d93810b4e160ac8889d6bb55cad
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from eb47fe8033d6c2013ce47ec44f39fa0092aa8551)

UPSTREAM: drm: bridge/dw_hdmi: add atomic API support

Fill atomic needed funcs with default atomic helper library.

Rockchip use dw_hdmi, and drm/rockchip will covert to atomic api,
we need dw_hdmi support atomic funcs.

Now another drm driver use dw_hdmi is imx, not yet atomic, so
check DRIVER_ATOMIC at runtime to spilt atomic and not atomic.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Change-Id: I519527efaf88b1e5c1b30db1fd23e59d45b88d50
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from 2c5b2cccdbde278fb702893404a2ea20f81f0345)

UPSTREAM: drm/bridge/dw_hdmi: Constify function pointer structs

Moves a bunch of junk to .rodata from .data.

 drivers/gpu/drm/bridge/dw_hdmi.ko:
-.rodata                      120
+.rodata                      216
-.data                         96
+.data                          0

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450178476-26284-15-git-send-email-boris.brezillon@free-electrons.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Change-Id: Ib35041ba0962794da3ff80110c6e429dacaf9178
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from dae91e4d1c7adea85ff97b28dcea72bd234b4bb7)

UPSTREAM: drm/bridge: Remove gratuitous blank line

A single blank line is enough to separate Kconfig entries.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Change-Id: I325951cc36a4429a8313b61e3f3a44aa24e49958
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from dae91e4d1c7adea85ff97b28dcea72bd234b4bb7)

UPSTREAM: drm/bridge: dw-hdmi: Use dashes in filenames

For consistency with other drivers, use dashes instead of underscores in
filenames.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Change-Id: Ie872685143935c365b40c3aaf2a104879478ea66
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from 248a86fc3092059324e6f8231abd9134c8188ecc)

arm64: dts: rockchip: set swiotlb buffer size on rk3399 android board

We don't use swiotlb, so keep the size as small as possible.

Change-Id: I1377f4b31112902a5841eafde094d2d12f48e97c
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

ARM64: configs: rockchip_cros_defconfig: enable extcon support

This allows monitoring external connectors by userspace
via sysfs and uevent and supports external connectors with
multiple states. And extcon notifier mechanism is also
useful.

Change-Id: I670da8efbe20f8f12529e9e062fc38b514524dc3
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

ARM64: configs: rockchip_defconfig: enable extcon support

This allows monitoring external connectors by userspace
via sysfs and uevent and supports external connectors with
multiple states. And extcon notifier mechanism is also
useful.

Change-Id: I7aba50c294b04d48bf5d43bfd90a8280fcbd1081
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

extcon: fix duplicate create switch class

If "CONFIG_ANDROID" and "CONFIG_SWITCH" are enabled,
/sys/class/switch/* are created in switch classe driver,
so we can't create switch class again in extcon.

Change-Id: Ida627cfdbb3ecb6f0aa40af146a66897edafd2fe
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

FROMLIST: ASoC: rockchip: implement system suspend/resume for i2s

restore hw registers after power loss during a suspend/resume cycle.

Change-Id: I109c4acaef8fef12f84e4c1b6d3488891a94ebb2
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9213485/)

FROMLIST: ASoC: rockchip: implement system suspend/resume for spdif

restore hw registers after power loss during a suspend/resume cycle.

Change-Id: I8078f5bdd35ff354a375337d641de479b59f14f6
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9213499/)

clk: rockchip: rk3036: add ACLK_VCODEC

Change-Id: I36f6b23139345941656c127718cc4ff01c6d629f
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

ARM: dts: rockchip: enable rockchip-vpu node for rk3036 kylin

Change-Id: I82fe6cd685bbf8e7eb360b40d308890735dcf608
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

ARM: dts: rockchip: add rockchip-vpu node for rk3036

Change-Id: If4ce05777e4e4fd2460c76a5fff75c8b1901529e
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

thermal: rockchip: optimize sensor auto accessing period

In less than 10 ms, the temperature of soc will arise 10 degree. 250 ms
is too big for soc tempeture control. Setting 2.5 ms will speed up
temperature accessing speed but introduce no more cpu's computing overhead.
We set AUTO_PERIOD_TIME and TSADCV3_AUTO_PERIOD_HT_TIME the same value,
because normal temperature update speed is also our consern in IPA.

Change-Id: Ie8038a1ae5837ad4aa31b04d1f3ace299f82e396
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>

arm64: dtsi: rk3399: optimize ipa parameters

Big cores' power consumption is as much as 8 times of little cores'.
Eas tends to bring tasks to big cores to assure the performance, and
this will make the temperature of soc out of control. To resolve this
issue, we set the power request weight of both little cores and gpu is
10 times of big cores, when temperature control occurs. Meanwhile, we
decrease passive polling interval to make temperature control more
accurate.

Change-Id: Ib01948c6a4f4383f03f1317b2397f07fbdc3487e
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>