Test case for fp logical instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56474 91177308-0d34-0410-b5e6-96231b3b80d8

Significant improvements to the logic for merging live intervals.  This code can't
just use LI::MergeValueAsValue, as its behavior in the presence of overlapping ranges
isn't what StrongPHIElimination wants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56472 91177308-0d34-0410-b5e6-96231b3b80d8

Make log, log2, log10, exp, exp2 use Expand by
default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56471 91177308-0d34-0410-b5e6-96231b3b80d8

Mark several codegen passes as preserving all analysis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56469 91177308-0d34-0410-b5e6-96231b3b80d8

More refactoring.  Yawn.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56468 91177308-0d34-0410-b5e6-96231b3b80d8

Convert llvmc2 plugins to use llvm/Support/Registry.h machinery.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56467 91177308-0d34-0410-b5e6-96231b3b80d8

Move llvmc2 header files under include/llvm/CompilerDriver

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56466 91177308-0d34-0410-b5e6-96231b3b80d8

Plugin support for llvmc2 (a-la opt).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56465 91177308-0d34-0410-b5e6-96231b3b80d8

Add a 'Debugging' section to the documentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56464 91177308-0d34-0410-b5e6-96231b3b80d8

Make comments a little bit more clear.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56463 91177308-0d34-0410-b5e6-96231b3b80d8

Get rid of GlobalLanguageMap. Global state is evil.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56462 91177308-0d34-0410-b5e6-96231b3b80d8

Rename our version of ccc to ccc2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56461 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56460 91177308-0d34-0410-b5e6-96231b3b80d8

Add a (forward_as) option property

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56459 91177308-0d34-0410-b5e6-96231b3b80d8

Delete the file llvmc2/doc/LLVMC-Enhancements.rst + some minor language/spelling fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56458 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor FP intrinisic setup.  Per review feedback.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56456 91177308-0d34-0410-b5e6-96231b3b80d8

CMake build system: support for parallel builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56453 91177308-0d34-0410-b5e6-96231b3b80d8

Per review feedback: Only perform
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56452 91177308-0d34-0410-b5e6-96231b3b80d8

Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56436 91177308-0d34-0410-b5e6-96231b3b80d8

Add bound checks in SmallVector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56432 91177308-0d34-0410-b5e6-96231b3b80d8

add_partially_linked_object: Replaced nonexistent MESSAGE option in
add_custom_command with COMMENT. It was forcing unconditional command
execution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56425 91177308-0d34-0410-b5e6-96231b3b80d8

Initial support for the CMake build system.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56419 91177308-0d34-0410-b5e6-96231b3b80d8

Add helper function to get a 32-bit floating point constant. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56418 91177308-0d34-0410-b5e6-96231b3b80d8

explain what earlyclobber actually is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56415 91177308-0d34-0410-b5e6-96231b3b80d8

Fold immediates into X86 shifts with fast isel.  This generates:

sarl    $3, %ecx

instead of:

movl    $3, %ecx
sarl    %cl, %edx

This shrinks fast isel 176.gcc by about 2000 instructions (.3%)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56413 91177308-0d34-0410-b5e6-96231b3b80d8

Factor out code into HandleVirtRegDef, for consistency with
Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check
for register zero, and redundant checks for isPhysicalRegister.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56412 91177308-0d34-0410-b5e6-96231b3b80d8

Instead of building a list and sorting it just to find a maximum element,
compute the maximum element directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56411 91177308-0d34-0410-b5e6-96231b3b80d8

Fetch the starting index of the block when assigning intervals.  This gets live-in indices
correct in the presence of things like EH labels.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56410 91177308-0d34-0410-b5e6-96231b3b80d8

don't print GlobalAddressSDNode's with an offset of zero as "foo0".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56399 91177308-0d34-0410-b5e6-96231b3b80d8

add a note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56391 91177308-0d34-0410-b5e6-96231b3b80d8

Update VS projects.
Change some class to struct for coherency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56389 91177308-0d34-0410-b5e6-96231b3b80d8

Shorten and rearrange data fields to save a word of memory.
Per review feedback.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56388 91177308-0d34-0410-b5e6-96231b3b80d8

Implement review feedback from Devang: make use
of mayReadFromMemory and mayWriteToMemory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56387 91177308-0d34-0410-b5e6-96231b3b80d8

Teach coalescer about earlyclobber bits.
Check bits for preferred register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56384 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56381 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56380 91177308-0d34-0410-b5e6-96231b3b80d8

No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56378 91177308-0d34-0410-b5e6-96231b3b80d8

80 column violation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56377 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a FastISel GlobalVariable CSE bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56376 91177308-0d34-0410-b5e6-96231b3b80d8

Continue after removing the current MI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56372 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56371 91177308-0d34-0410-b5e6-96231b3b80d8

Make earlyclobber stuff work when virtual regs
have previously been assigned conflicting physreg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56364 91177308-0d34-0410-b5e6-96231b3b80d8

Prevent warning about conversion from 64-bit to 32-bit by (yuck) casting...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56359 91177308-0d34-0410-b5e6-96231b3b80d8

Now that ConstantSDNode doesn't hold an APInt,
use ARG_FLAGSSDNode as the most aligned node type,
as it contains an int64_t, which is 8-byte
aligned on mingw.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56358 91177308-0d34-0410-b5e6-96231b3b80d8

Added static methods to APSInt: getMinValue and getMaxValue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56355 91177308-0d34-0410-b5e6-96231b3b80d8

Re-materalized definition instructions may be dead. Whack them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56352 91177308-0d34-0410-b5e6-96231b3b80d8

backing out my last commit, it was not intended to go on the trunk

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56349 91177308-0d34-0410-b5e6-96231b3b80d8

first shot at removing Use::Val
untested, Use::swap() is definitely not done yet

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56348 91177308-0d34-0410-b5e6-96231b3b80d8

Turn on the AddReadAttrs pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56345 91177308-0d34-0410-b5e6-96231b3b80d8

Add test for improvement of readonly to readnone,
and non-demotion of readnone to readonly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56344 91177308-0d34-0410-b5e6-96231b3b80d8

Turn on these tests!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56343 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the MarkModRef pass (use AddReadAttrs instead).
Unfortunately this means removing one regression test
of GlobalsModRef because I couldn't work out how to
perform it without MarkModRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56342 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new pass AddReadAttrs which works out which functions
can get the readnone/readonly attributes, and gives them it.
The plan is to remove markmodref (which did the same thing
by querying GlobalsModRef) and delete the analogous
functionality from GlobalsModRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56341 91177308-0d34-0410-b5e6-96231b3b80d8

Test the callgraph directly for the missing edge.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56338 91177308-0d34-0410-b5e6-96231b3b80d8

Teach -callgraph to always print the callgraph (as the
description says it does), not just when -analyze is
used as well.  This means printing to stderr, so adjust
some tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56337 91177308-0d34-0410-b5e6-96231b3b80d8

Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis
and redo as linked list walk.  Logic moved into RA.
Per review feedback.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56326 91177308-0d34-0410-b5e6-96231b3b80d8

splitLoop does not handle split condition EQ.
Fixes PR 2805

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56321 91177308-0d34-0410-b5e6-96231b3b80d8

Address-mode folding for X86FastISel. It's pretty basic, but it
catches a fair number of common cases. Note that this currently
causes Fast-ISel to leave behind lots of dead instructions.
Those will be dealt with in subsequent commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56320 91177308-0d34-0410-b5e6-96231b3b80d8

Decrementing the iterator here could be wrong if the worklist is empty after the "erase".
Thanks to Ji Young Park for the patch!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56316 91177308-0d34-0410-b5e6-96231b3b80d8

Try to place hoisted instructions befoe icmp instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56315 91177308-0d34-0410-b5e6-96231b3b80d8

Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56314 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify this code. The FastISel class has its own TD member.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56311 91177308-0d34-0410-b5e6-96231b3b80d8

Don't consider instructions with implicit physical register
defs to be necessarily live.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56310 91177308-0d34-0410-b5e6-96231b3b80d8

Upgrade doxygen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56308 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new "fast" scheduler. This is currently basically just a
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.

This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56307 91177308-0d34-0410-b5e6-96231b3b80d8

Preliminary support for systems which require changing JIT memory regions privilege from read / write to read / executable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56303 91177308-0d34-0410-b5e6-96231b3b80d8

Duh. Default to ARMCC::AL (always).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56301 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56300 91177308-0d34-0410-b5e6-96231b3b80d8

Cosmetic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56299 91177308-0d34-0410-b5e6-96231b3b80d8

FastISel: For calls, prefer using the callee's address as a constant
over having it in a register. And wait until after checking type
legality before requesting that the callee address be placed in a
register. Also, fix support for calls with void return type.

This speeds up fast-isel isel time by about 15% and reduces
instruction counts by about 3% overall on certain testcases. It also
changes many indirect calls to direct calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56292 91177308-0d34-0410-b5e6-96231b3b80d8

Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way
that conflicts with an earlyclobber.  See also comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8

Unallocatable registers do not have live intervals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56287 91177308-0d34-0410-b5e6-96231b3b80d8

Do not hoist instruction above branch condition. The instruction may use branch condition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56286 91177308-0d34-0410-b5e6-96231b3b80d8

Do not ignore iv uses outside the loop.
This one slipped through cracks very well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56284 91177308-0d34-0410-b5e6-96231b3b80d8

Fix comments, help messages.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56282 91177308-0d34-0410-b5e6-96231b3b80d8

Don't worry about clobbering physical register defs that aren't used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56281 91177308-0d34-0410-b5e6-96231b3b80d8

Fix addrmode1 instruction encodings; fix bx_ret encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56277 91177308-0d34-0410-b5e6-96231b3b80d8

Specify instruction encoding using range list to avoid endianess issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56276 91177308-0d34-0410-b5e6-96231b3b80d8

Add instruction names as comments to InstBits entries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56275 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and draw
up some new ascii art to illustrate what it does. This change
currently has no effect on generated code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56270 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new MachineInstr-level DCE pass. It is very simple, and is intended to
be used with fast-isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56268 91177308-0d34-0410-b5e6-96231b3b80d8

Add trampoline support to PPC. GCC simply calls the "__trampoline_setup"
function with appropriate parameters. This allows us to support blocks on PPC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56267 91177308-0d34-0410-b5e6-96231b3b80d8

Fix cut-n-pasto.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56265 91177308-0d34-0410-b5e6-96231b3b80d8

When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56258 91177308-0d34-0410-b5e6-96231b3b80d8

Remove.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56256 91177308-0d34-0410-b5e6-96231b3b80d8

Add -O1, -O2 and -O3 that matches llvm-gcc's -O1, -O2 and -O3 respectively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56255 91177308-0d34-0410-b5e6-96231b3b80d8

Change SelectionDAG::getConstantPool to always set the alignment of the
ConstantPoolSDNode, using the target's preferred alignment for the
constant type.

In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.

This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)

Patch by Paul Redmond!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56253 91177308-0d34-0410-b5e6-96231b3b80d8

Reverting r56249. On further investigation, this functionality isn't needed.

Apologies for the thrashing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8

Include the alignment value when displaying ConstantPoolSDNodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56250 91177308-0d34-0410-b5e6-96231b3b80d8

- Change "ExternalSymbolSDNode" to "SymbolSDNode".
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8

Fix these comments to reflect current reality. Surprisingly,
MachineConstantPool::getConstantPoolIndex actually expects
a log2-encoded alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56248 91177308-0d34-0410-b5e6-96231b3b80d8

Finally re-apply r46959. This is made feasible by the combination
of r56230, r56232, and r56246.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56247 91177308-0d34-0410-b5e6-96231b3b80d8

Improve instcombine's handling of integer min and max in two ways:
 - Recognize expressions like "x > -1 ? x : 0" as min/max and turn them
   into expressions like "x < 0 ? 0 : x", which is easily recognizable
   as a min/max operation.
 - Refrain from folding expression like "y/2 < 1" to "y < 2" when the
   comparison is being used as part of a min or max idiom, like
   "y/2 < 1 ? 1 : y/2". In that case, the division has another use, so
   folding doesn't eliminate it, and obfuscates the min/max, making it
   harder to recognize as a min/max operation.

These benefit ScalarEvolution, CodeGen, and anything else that wants to
recognize integer min and max.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56246 91177308-0d34-0410-b5e6-96231b3b80d8

AllocateRWXMemory -> AllocateRWX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56244 91177308-0d34-0410-b5e6-96231b3b80d8

FCmpInst predicates UNO, ORD, FALSE, and TRUE are commutative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56243 91177308-0d34-0410-b5e6-96231b3b80d8

Fix test to account for no more whitespace and that one of the matches is the
"declare" statement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56241 91177308-0d34-0410-b5e6-96231b3b80d8

Remove space that was forgotten.`

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56240 91177308-0d34-0410-b5e6-96231b3b80d8

Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls
are not enabled. Instead just omit the tail call flag when calls are
created.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56235 91177308-0d34-0410-b5e6-96231b3b80d8

Fix spacing in the grep line for this test, following the recent
SCEV-whitespace changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56234 91177308-0d34-0410-b5e6-96231b3b80d8

Re-enables the new vector select in the bitcode reader, by modifying the
bitcode reader/writer as follows:

- add and use new bitcode FUNC_CODE_INST_VSELECT to handle the llvm
select opcode using either i1 or [N x i1] as the selector.
- retain old BITCODE FUNC_CODE_INST_SELECT in the bitcode reader to
handle select on i1 for backwards compatibility with existing bitcode
files.
- re-enable the vector-select.ll test program.

Also, rename the recently added bitcode opcode FUNC_CODE_INST_VCMP to
FUNC_CODE_INST_CMP2 and make the bitcode writer use it to handle
fcmp/icmp on scalars or vectors. In the bitcode writer, use
FUNC_CODE_INST_CMP for vfcmp/vicmp only. In the bitcode reader, have
FUNC_CODE_INST_CMP handle icmp/fcmp returning bool, for backwards
compatibility with existing bitcode files.

Patch by Preston Gurd!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56233 91177308-0d34-0410-b5e6-96231b3b80d8