Jakob Stoklund Olesen [Thu, 20 Dec 2012 22:54:02 +0000 (22:54 +0000)]
Add an MF argument to MI::copyImplicitOps().
This function is often used to decorate dangling instructions, so a
context reference is required to allocate memory for the operands.
Also add a corresponding MachineInstrBuilder method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170797
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Thu, 20 Dec 2012 22:53:58 +0000 (22:53 +0000)]
Use two-arg addOperand(MF, MO) internally in MachineInstr when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170796
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Thu, 20 Dec 2012 22:53:55 +0000 (22:53 +0000)]
MachineInstrBuilderize ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170795
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Thu, 20 Dec 2012 22:53:53 +0000 (22:53 +0000)]
MachineInstrBuilderize NVPTX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170794
91177308-0d34-0410-b5e6-
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Eli Bendersky [Thu, 20 Dec 2012 22:51:52 +0000 (22:51 +0000)]
Fix an unitialized member variable that may have caused sporadic failures
for code that wasn't even in bundling mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170793
91177308-0d34-0410-b5e6-
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Sean Silva [Thu, 20 Dec 2012 22:49:13 +0000 (22:49 +0000)]
docs: actually indent these consistently
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170792
91177308-0d34-0410-b5e6-
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Sean Silva [Thu, 20 Dec 2012 22:47:41 +0000 (22:47 +0000)]
docs: Indent consistently in code examples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170791
91177308-0d34-0410-b5e6-
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Sean Silva [Thu, 20 Dec 2012 22:42:20 +0000 (22:42 +0000)]
docs: Improve navigation for Vectorizers.rst
Add links in the intro paragraph.
Add table of contents.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170790
91177308-0d34-0410-b5e6-
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Sean Silva [Thu, 20 Dec 2012 22:24:37 +0000 (22:24 +0000)]
docs: bring back link for reddit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170776
91177308-0d34-0410-b5e6-
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Eric Christopher [Thu, 20 Dec 2012 21:58:40 +0000 (21:58 +0000)]
Whitespace and 80-column cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170771
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Eric Christopher [Thu, 20 Dec 2012 21:58:36 +0000 (21:58 +0000)]
Start splitting out the debug string section handling by moving it
into the DwarfUnits class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170770
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Sean Silva [Thu, 20 Dec 2012 21:50:41 +0000 (21:50 +0000)]
docs: Make document name congruent with title.
Hopefully nobody has linked to it yet...
OK'd by Nadav.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170768
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Bill Wendling [Thu, 20 Dec 2012 21:28:43 +0000 (21:28 +0000)]
Some random comment, naming, and format changes.
Rename the AttributeImpl* from Attrs to pImpl to be consistent with other code.
Add comments where none were before. Or doxygen-ify other comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170767
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Jakob Stoklund Olesen [Thu, 20 Dec 2012 21:12:42 +0000 (21:12 +0000)]
Remove two dead functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170766
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Bob Wilson [Thu, 20 Dec 2012 21:09:38 +0000 (21:09 +0000)]
Revert "Adding support for llvm.arm.neon.vaddl[su].* and"
This reverts r170694. The operations can be represented in IR without
adding any new intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170765
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Nadav Rotem [Thu, 20 Dec 2012 20:24:40 +0000 (20:24 +0000)]
LoopVectorize: Fix a bug in the scalarization of instructions.
Before if-conversion we could check if a value is loop invariant
if it was declared inside the basic block. Now that loops have
multiple blocks this check is incorrect.
This fixes External/SPEC/CINT95/099_go/099_go
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170756
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Evan Cheng [Thu, 20 Dec 2012 19:59:30 +0000 (19:59 +0000)]
On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr,
are more expensive than the non-flag setting variant. Teach thumb2 size
reduction pass to avoid generating them unless we are optimizing for size.
rdar://
12892707
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170728
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Eli Bendersky [Thu, 20 Dec 2012 19:54:02 +0000 (19:54 +0000)]
Change Lit error redirection to FileCheck to a more common syntax since it
can potentially cause some bots to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170726
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Eli Bendersky [Thu, 20 Dec 2012 19:16:57 +0000 (19:16 +0000)]
Add a largish auto-generated test for the aligned bundling feature, along with
the script generating it. The test should never be modified manually. If anyone
needs to change it, please change the script and re-run it.
The script is placed into utils/testgen - I couldn't think of a better place,
and after some discussion on IRC this looked like a logical location.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170720
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Eli Bendersky [Thu, 20 Dec 2012 19:07:30 +0000 (19:07 +0000)]
Tests for the aligned bundling support added in r170718
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170719
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Eli Bendersky [Thu, 20 Dec 2012 19:05:53 +0000 (19:05 +0000)]
Aligned bundling support. Following the discussion here:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-December/056754.html
The proposal and implementation are fully documented here:
https://sites.google.com/a/chromium.org/dev/nativeclient/pnacl/aligned-bundling-support-in-llvm
Tests will follow shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170718
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Jakob Stoklund Olesen [Thu, 20 Dec 2012 18:46:29 +0000 (18:46 +0000)]
Use MachineInstrBuilder for PHI nodes in SelectionDAGISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170716
91177308-0d34-0410-b5e6-
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Jim Grosbach [Thu, 20 Dec 2012 18:09:48 +0000 (18:09 +0000)]
Fix inadvertant delete of 'has'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170713
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Thu, 20 Dec 2012 18:08:09 +0000 (18:08 +0000)]
Use MachineInstrBuilder in InstrEmitter.
This is supposed to be a mechanical change with no functional effects.
InstrEmitter can generate all types of MachineOperands which revealed
that MachineInstrBuilder was missing a few methods, added by this patch.
Besides providing a context pointer to MI::addOperand(),
MachineInstrBuilder seems like a better fit for this code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170712
91177308-0d34-0410-b5e6-
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Jakob Stoklund Olesen [Thu, 20 Dec 2012 18:08:06 +0000 (18:08 +0000)]
Use MachineInstrBuilder in a few CodeGen passes.
This automatically passes a context pointer to MI->addOperand().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170711
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Rafael Espindola [Thu, 20 Dec 2012 17:47:27 +0000 (17:47 +0000)]
Simplify the testcase a bit.
I checked that it would still crash llc before the corresponding fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170709
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Nadav Rotem [Thu, 20 Dec 2012 17:42:53 +0000 (17:42 +0000)]
Loop Vectorizer: turn-off if-conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170708
91177308-0d34-0410-b5e6-
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James Molloy [Thu, 20 Dec 2012 16:04:27 +0000 (16:04 +0000)]
Add a new attribute, 'noduplicate'. If a function contains a noduplicate call, the call cannot be duplicated - Jump threading, loop unrolling, loop unswitching, and loop rotation are inhibited if they would duplicate the call.
Similarly inlining of the function is inhibited, if that would duplicate the call (in particular inlining is still allowed when there is only one callsite and the function has internal linkage).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170704
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Roman Divacky [Thu, 20 Dec 2012 14:43:30 +0000 (14:43 +0000)]
Remove MCTargetAsmLexer and its derived classes now that edis,
its only user, is gone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170699
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Renato Golin [Thu, 20 Dec 2012 13:52:11 +0000 (13:52 +0000)]
Adding support for llvm.arm.neon.vaddl[su].* and
llvm.arm.neon.vsub[su].* intrinsics.
Patch by Pete Couperus <pjcoup@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170694
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NAKAMURA Takumi [Thu, 20 Dec 2012 10:35:18 +0000 (10:35 +0000)]
llvmbuild/main.py: Let LibraryDependencies.inc deterministic.
FYI, llvm and clang can be built deterministically between stage 2 and stage3, among iterative clean rebuilds, with GNU ar;
configure --disable-timestamps
make AR.Flags=crsD RANLIB=echo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170682
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Craig Topper [Thu, 20 Dec 2012 07:15:54 +0000 (07:15 +0000)]
Formatting fixes. Remove some unnecessary 'else' after 'return'. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170676
91177308-0d34-0410-b5e6-
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Craig Topper [Thu, 20 Dec 2012 07:09:41 +0000 (07:09 +0000)]
Removing trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170675
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Reed Kotler [Thu, 20 Dec 2012 06:59:37 +0000 (06:59 +0000)]
Implement cfi_def_cfa_offset. "Make check" test case for this comming in the
next few days but it's already tested a lot from test-suite and works fine.
This patch completes almost 100% pass of test-suite for mips 16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170674
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Reed Kotler [Thu, 20 Dec 2012 06:57:00 +0000 (06:57 +0000)]
There is one more patch to finish large frames. Make sure we assert
on code that has large frames which will not yet compile correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170673
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Jyotsna Verma [Thu, 20 Dec 2012 06:52:46 +0000 (06:52 +0000)]
Add constant extender support to GP-relative load/store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170672
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Jyotsna Verma [Thu, 20 Dec 2012 06:45:39 +0000 (06:45 +0000)]
Add TSFlags to ALU32 type instructions for constant-extender/Relationship maps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170671
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Reed Kotler [Thu, 20 Dec 2012 06:06:35 +0000 (06:06 +0000)]
set register class properly for mips16 here
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170669
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Rafael Espindola [Thu, 20 Dec 2012 05:13:09 +0000 (05:13 +0000)]
Undefine PPC harder.
This was causing a build failure while trying to build on ppc ubuntu 12.10 with
cmake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170668
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Reed Kotler [Thu, 20 Dec 2012 05:09:15 +0000 (05:09 +0000)]
This assert is overly restrictive and does not work for mips16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170667
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Reed Kotler [Thu, 20 Dec 2012 04:44:58 +0000 (04:44 +0000)]
Turn on register scavenger for Mips 16
We use an unused Mips 32 register for the emergency slot
instead of using the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170665
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Akira Hatanaka [Thu, 20 Dec 2012 04:27:52 +0000 (04:27 +0000)]
[mips] Refactor SLT (set on less than) instructions. Separate encoding
information from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170664
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Akira Hatanaka [Thu, 20 Dec 2012 04:22:39 +0000 (04:22 +0000)]
[mips] Refactor unconditional branch instruction. Separate encoding information
from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170663
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Akira Hatanaka [Thu, 20 Dec 2012 04:20:09 +0000 (04:20 +0000)]
[mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass
parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170661
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Akira Hatanaka [Thu, 20 Dec 2012 04:15:30 +0000 (04:15 +0000)]
[mips] Delete definition of CPRESTORE instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170660
91177308-0d34-0410-b5e6-
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Akira Hatanaka [Thu, 20 Dec 2012 04:13:23 +0000 (04:13 +0000)]
[mips] Refactor conditional branch instructions with one register operand.
Separate encoding information from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170659
91177308-0d34-0410-b5e6-
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Richard Smith [Thu, 20 Dec 2012 04:11:02 +0000 (04:11 +0000)]
Don't use isa<CallInst>(this) in the constructor for CallInst's base class.
This has undefined behavior, because the classof implementation attempts to
access parts of the not-yet-constructed derived class. Found by clang
-fsanitize=vptr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170658
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Akira Hatanaka [Thu, 20 Dec 2012 04:10:13 +0000 (04:10 +0000)]
[mips] Refactor conditional branch instructions with two register operands.
Separate encoding information from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170657
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Reed Kotler [Thu, 20 Dec 2012 04:07:42 +0000 (04:07 +0000)]
fix most of remaining issues with large frames.
these patches are tested a lot by test-suite but
make check tests are forthcoming once the next
few patches that complete this are committed.
with the next few patches the pass rate for mips16 is
near 100%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170656
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Akira Hatanaka [Thu, 20 Dec 2012 04:06:06 +0000 (04:06 +0000)]
[mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy
physical register $r1 to $r0.
GNU disassembler recognizes an "or" instruction as a "move", and this change
makes the disassembled code easier to read.
Original patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170655
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Richard Smith [Thu, 20 Dec 2012 04:04:17 +0000 (04:04 +0000)]
Fix use-before-construction of X86TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170654
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Richard Smith [Thu, 20 Dec 2012 04:02:58 +0000 (04:02 +0000)]
Don't use -1 as a value of an unsigned 7-bit enumeration; that has undefined
behavior and violates the !range constraints we put on loads of this enum.
Found by clang -fsanitize=enum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170653
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Richard Smith [Thu, 20 Dec 2012 03:59:24 +0000 (03:59 +0000)]
Don't leave IsUnsigned uninitialized in a default-constructed APSInt. Copying
such a structure has undefined behavior. Caught by -fsanitize=bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170652
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Akira Hatanaka [Thu, 20 Dec 2012 03:52:08 +0000 (03:52 +0000)]
[mips] Change the order of template parameters. Move the default parameters to
the end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170651
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Akira Hatanaka [Thu, 20 Dec 2012 03:48:24 +0000 (03:48 +0000)]
[mips] Refactor shift instructions with register operands. Separate encoding
information from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170650
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Akira Hatanaka [Thu, 20 Dec 2012 03:44:41 +0000 (03:44 +0000)]
[mips] Refactor shift immediate instructions. Separate encoding information
from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170649
91177308-0d34-0410-b5e6-
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Akira Hatanaka [Thu, 20 Dec 2012 03:40:03 +0000 (03:40 +0000)]
[mips] Refactor arithmetic and logic instructions with immediate operands.
Separate encoding information from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170648
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Akira Hatanaka [Thu, 20 Dec 2012 03:34:05 +0000 (03:34 +0000)]
[mips] Refactor arithmetic and logic instructions. Separate encoding
information from the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170647
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Sean Silva [Thu, 20 Dec 2012 03:32:39 +0000 (03:32 +0000)]
docs: Show TOC for GettingStarted.rst.
This is a pretty lengthy document, so put the table of contents in your
face so that it's easier to scope out the content.
This document is a mess currently and needs to be
refactored/revised/split-up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170646
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Akira Hatanaka [Thu, 20 Dec 2012 03:00:16 +0000 (03:00 +0000)]
[mips] Delete ArithOverflowR and ArithOverflow and use ArithLogicR and
ArithLogicI as the instruction base classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170642
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Sean Silva [Thu, 20 Dec 2012 02:40:45 +0000 (02:40 +0000)]
docs: Clean up adornments.
For whatever reason the usage of '^^^' and '---' adornments were
reversed compared to the "canonical" style of the LLVM docs (which is
currently "the style used in SphinxQuickstartTemplate.rst"). This change
doesn't affect the document structure at all, I'm just doing it for
trivial stylistic consistency (the document content is *much* more
important---thanks Nadav for writing this up!).
Also, trim the adornments to be the same length as the section names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170638
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Sean Silva [Thu, 20 Dec 2012 02:23:25 +0000 (02:23 +0000)]
docs: ASCII-fy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170637
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Nadav Rotem [Thu, 20 Dec 2012 02:00:02 +0000 (02:00 +0000)]
Loop Vectorizer: Enable if-conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170632
91177308-0d34-0410-b5e6-
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Bill Wendling [Thu, 20 Dec 2012 01:36:59 +0000 (01:36 +0000)]
s/AttributesImpl/AttributeImpl/g This is going to apply to Attribute, not Attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170631
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Bob Wilson [Thu, 20 Dec 2012 01:36:20 +0000 (01:36 +0000)]
Do not introduce vector operations in functions marked with noimplicitfloat.
<rdar://problem/
12879313>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170630
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Jim Grosbach [Thu, 20 Dec 2012 01:14:48 +0000 (01:14 +0000)]
Clean up some DOxygen comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170629
91177308-0d34-0410-b5e6-
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Jim Grosbach [Thu, 20 Dec 2012 01:14:45 +0000 (01:14 +0000)]
Clean up some DOxygen comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170628
91177308-0d34-0410-b5e6-
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Richard Smith [Thu, 20 Dec 2012 01:05:39 +0000 (01:05 +0000)]
Fix an uninitialized member variable, found by -fsanitize=bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170627
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Nadav Rotem [Thu, 20 Dec 2012 00:49:56 +0000 (00:49 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170626
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Nadav Rotem [Thu, 20 Dec 2012 00:29:18 +0000 (00:29 +0000)]
doc: resize the image.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170622
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NAKAMURA Takumi [Thu, 20 Dec 2012 00:22:11 +0000 (00:22 +0000)]
Target/R600: Update MIB according to r170588.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170620
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Nadav Rotem [Thu, 20 Dec 2012 00:03:36 +0000 (00:03 +0000)]
Doc: update the chart.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170618
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Bill Wendling [Wed, 19 Dec 2012 23:55:43 +0000 (23:55 +0000)]
Add a context so that once we uniquify strings we can access them easily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170615
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Jim Grosbach [Wed, 19 Dec 2012 23:38:53 +0000 (23:38 +0000)]
MC: Add MCInstrDesc::mayAffectControlFlow() method.
MC disassembler clients (LLDB) are interested in querying if an
instruction may affect control flow other than by virtue of being
an explicit branch instruction. For example, instructions which
write directly to the PC on some architectures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170610
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Jim Grosbach [Wed, 19 Dec 2012 23:38:49 +0000 (23:38 +0000)]
Add isSubRegisterEq() and isSuperRegisterEq().
isSub and isSuper return false if RegA == RegB. Add variants which also
include the identity function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170609
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Jim Grosbach [Wed, 19 Dec 2012 23:38:46 +0000 (23:38 +0000)]
Move isSubRegister() and isSuperRegister to MCRegisterInfo.
These were defined on TargetRegisterInfo, but they don't use any information
that's not available in MCRegisterInfo, so sink them down to be available
at the MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170608
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Jim Grosbach [Wed, 19 Dec 2012 23:38:44 +0000 (23:38 +0000)]
Fix doc comment. '///' not '//'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170607
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Michael Ilseman [Wed, 19 Dec 2012 23:17:20 +0000 (23:17 +0000)]
Refactor isIntrinsic() to be quicker, and change classof() (and thus, isa<IntrinsicInst>()) to use it. This decreases the number of occurrences of the slow-path string matching performed by getIntrinsicID().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170602
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Bill Wendling [Wed, 19 Dec 2012 22:42:22 +0000 (22:42 +0000)]
s/AttributeListImpl/AttributeSetImpl/g to match the namechange of AttributeList.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170600
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Jakob Stoklund Olesen [Wed, 19 Dec 2012 22:35:46 +0000 (22:35 +0000)]
Always use addOperand(MF, MO) from MachineInstrBuilder.
The single-argument MachineInstr::addOperand(MO) will be removed soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170599
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Dmitri Gribenko [Wed, 19 Dec 2012 22:13:01 +0000 (22:13 +0000)]
Add a missing 'else'. Found by grep '} if'
No testcase because it is apparently not so trivial to construct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170595
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Tom Stellard [Wed, 19 Dec 2012 22:10:35 +0000 (22:10 +0000)]
R600: Add entry in CODE_OWNERS.TXT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170594
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Tom Stellard [Wed, 19 Dec 2012 22:10:34 +0000 (22:10 +0000)]
R600: Remove unecessary VREG alignment.
Unlike SGPRs VGPRs doesn't need to be aligned.
Patch by: Christian König
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170593
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Tom Stellard [Wed, 19 Dec 2012 22:10:33 +0000 (22:10 +0000)]
R600: control flow optimization
Branch if we have enough instructions so that it makes sense.
Also remove branches if they don't make sense.
Patch by: Christian König
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170592
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Tom Stellard [Wed, 19 Dec 2012 22:10:31 +0000 (22:10 +0000)]
R600: New control flow for SI v2
This patch replaces the control flow handling with a new
pass which structurize the graph before transforming it to
machine instruction. This has a couple of different advantages
and currently fixes 20 piglit tests without a single regression.
It is now a general purpose transformation that could be not
only be used for SI/R6xx, but also for other hardware
implementations that use a form of structurized control flow.
v2: further cleanup, fixes and documentation
Patch by: Christian König
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170591
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Eric Christopher [Wed, 19 Dec 2012 22:02:53 +0000 (22:02 +0000)]
Split out abbreviations for the skeleton info from the rest of
the abbreviations. Part of implementing split dwarf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170589
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Jakob Stoklund Olesen [Wed, 19 Dec 2012 21:31:56 +0000 (21:31 +0000)]
Remove the explicit MachineInstrBuilder(MI) constructor.
Use the version that also takes an MF reference instead.
It would technically be possible to extract an MF reference from the MI
as MI->getParent()->getParent(), but that would not work for MIs that
are not inserted into any basic block.
Given the reasonably small number of places this constructor was used at
all, I preferred the compile time check to a run time assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170588
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Nadav Rotem [Wed, 19 Dec 2012 20:47:04 +0000 (20:47 +0000)]
Fix a bug that was found by building clang with -fsanitize.
I introduced it in r166785. PR14291.
If TD is unavailable use getScalarSizeInBits, but don't optimize
pointers or vectors of pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170586
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Meador Inge [Wed, 19 Dec 2012 20:16:40 +0000 (20:16 +0000)]
docs: Fix title underline warnings
Building Vectorizers.rst produces a few warnings of the form:
WARNING: Title underline too short.
Fixed by adding the extra needed dashes under the title.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170582
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Evan Cheng [Wed, 19 Dec 2012 20:16:09 +0000 (20:16 +0000)]
LLVM sdisel normalize bit extraction of the form:
((x & 0xff00) >> 8) << 2
to
(x >> 6) & 0x3fc
This is general goodness since it folds a left shift into the mask. However,
the trailing zeros in the mask prevents the ARM backend from using the bit
extraction instructions. And worse since the mask materialization may require
an addition instruction. This comes up fairly frequently when the result of
the bit twiddling is used as memory address. e.g.
= ptr[(x & 0xFF0000) >> 16]
We want to generate:
ubfx r3, r1, #16, #8
ldr.w r3, [r0, r3, lsl #2]
vs.
mov.w r9, #1020
and.w r2, r9, r1, lsr #14
ldr r2, [r0, r2]
Add a late ARM specific isel optimization to
ARMDAGToDAGISel::PreprocessISelDAG(). It folds the left shift to the
'base + offset' address computation; change the mask to one which doesn't have
trailing zeros and enable the use of ubfx.
Note the optimization has to be done late since it's target specific and we
don't want to change the DAG normalization. It's also fairly restrictive
as shifter operands are not always free. It's only done for lsh 1 / 2. It's
known to be free on some cpus and they are most common for address
computation.
This is a slight win for blowfish, rijndael, etc.
rdar://
12870177
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170581
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Benjamin Kramer [Wed, 19 Dec 2012 20:11:17 +0000 (20:11 +0000)]
Remove edis remnant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170580
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Roman Divacky [Wed, 19 Dec 2012 19:55:47 +0000 (19:55 +0000)]
Remove edis - the enhanced disassembler. Fixes PR14654.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170578
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Paul Redmond [Wed, 19 Dec 2012 19:47:13 +0000 (19:47 +0000)]
Transform (x&C)>V into (x&C)!=0 where possible
When the least bit of C is greater than V, (x&C) must be greater than V
if it is not zero, so the comparison can be simplified.
Although this was suggested in Target/X86/README.txt, it benefits any
architecture with a directly testable form of AND.
Patch by Kevin Schoedel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170576
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Jakob Stoklund Olesen [Wed, 19 Dec 2012 19:19:01 +0000 (19:19 +0000)]
Add an MF argument to MachineInstr::addOperand().
Just like for addMemOperand(), the function pointer provides a context
for allocating memory. This will make it possible to use a better memory
allocation strategy for the MI operand list, which is currently a slow
std::vector.
Most calls to addOperand() come from MachineInstrBuilder, so give that
class an MF reference as well. Code using BuildMI() won't need changing
at all since the MF reference is already required to allocate a
MachineInstr.
Future patches will fix code that calls MI::addOperand(Op) directly, as
well as code that uses the now deprecated MachineInstrBuilder(MI)
constructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170574
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Chad Rosier [Wed, 19 Dec 2012 18:06:44 +0000 (18:06 +0000)]
Remove superfluous brief command from getAsString.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170569
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Nadav Rotem [Wed, 19 Dec 2012 18:04:44 +0000 (18:04 +0000)]
doc: add subsections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170568
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Nadav Rotem [Wed, 19 Dec 2012 18:02:36 +0000 (18:02 +0000)]
DOC: document the use of O2, O3 and Os with -fvectorize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170567
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Benjamin Kramer [Wed, 19 Dec 2012 15:49:14 +0000 (15:49 +0000)]
PowerPC: Expand VSELECT nodes.
There's probably a better expansion for those nodes than the default for
altivec, but this is better than crashing. VSELECTs occur in loop vectorizer
output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170551
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Patrik Hagglund [Wed, 19 Dec 2012 15:19:11 +0000 (15:19 +0000)]
Change AsmOperandInfo::ConstraintVT to MVT, instead of EVT.
Accordingly, add MVT::getVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170550
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Rafael Espindola [Wed, 19 Dec 2012 14:48:05 +0000 (14:48 +0000)]
Revert 170545 while I debug the ppc failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170547
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