firefly-linux-kernel-4.4.55.git
8 years agocs-etm: avoid casting variable
Mathieu Poirier [Mon, 16 May 2016 22:55:55 +0000 (16:55 -0600)]
cs-etm: avoid casting variable

Because of two's complement reprensentation, casting an int to
and unsigned value doesn't simply get rid of the negative sign.
As such a value of -1 becomes 0xFFFFFFFF, which is clearly not
the desired effect.

This patch deals with cases when @cpu has the value of -1.  In
those cases queue '0' is initially selected.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agoperf tools: fixing Makefile problems
Mathieu Poirier [Tue, 3 May 2016 19:45:28 +0000 (13:45 -0600)]
perf tools: fixing Makefile problems

This patch is fixing the ifeq condition to get the debug or release
version of the openCSD libraries.  It also fix a naming typo when
release libraries are southg.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agoperf tools: new naming convention for openCSD
Mathieu Poirier [Tue, 3 May 2016 19:26:08 +0000 (13:26 -0600)]
perf tools: new naming convention for openCSD

The naming convention for the openCSD API and header files
was changed so that using it was easier.  Headers went from
"rctdl_xyz.h" to "opencsd_xyz.h" while internal symbol from
"rctdl_" to "ocsd_".

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agoperf scripts: Add python scripts for CoreSight traces
tor-jeremiassen [Wed, 17 Feb 2016 16:58:21 +0000 (10:58 -0600)]
perf scripts: Add python scripts for CoreSight traces

Example scripts for CoreSight trace processing with perf script.

Signed-off-by: Tor Jeremiassen <tor@ti.com>
8 years agoperf tools: decoding capailitity for CoreSight traces
tor-jeremiassen [Tue, 9 Feb 2016 16:34:51 +0000 (10:34 -0600)]
perf tools: decoding capailitity for CoreSight traces

Added user space perf functionality for CoreSight trace decoding.

8 years agoperf symbols: Check before overwriting build_id
tor-jeremiassen [Wed, 17 Feb 2016 14:29:21 +0000 (08:29 -0600)]
perf symbols: Check before overwriting build_id

Added check to see if has_build_id is set before overwriting build_id.

Signed-off-by: Tor Jeremiassen <tor@ti.com>
8 years agoperf tools: pushing driver configuration down to the kernel
Mathieu Poirier [Fri, 29 Apr 2016 22:04:48 +0000 (22:04 +0000)]
perf tools: pushing driver configuration down to the kernel

Now that PMU specific driver configuration are queued in
evsel::drv_config_terms, all we need to do is re-use the current
ioctl() mechanism to push down the information to the kernel
driver.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agoperf tools: add infrastructure for PMU specific configuration
Mathieu Poirier [Fri, 29 Apr 2016 21:21:11 +0000 (21:21 +0000)]
perf tools: add infrastructure for PMU specific configuration

This patchset adds PMU driver specific configuration to the parser
infrastructure by preceding any term with the '@' letter.  As such
doing something like:

perf -e some_event/@drv1,@drv2=drv_config/ ...

will see 'drv1' and 'drv2=config' being added to the list of evsel config
terms.  Token 'drv1' and 'drv2=config' are not processed in user space
and are meant to be interpreted by the PMU driver.

First the lexer/parser are supplemented with the required definitions to
recognise the driver specific configuration.  From there they are simply
added to the list of event terms.  The bulk of the work is done in
function "parse_events_add_pmu()" where driver config event terms are
added to a new list of driver config terms, which in turn spliced with
the event's new driver configuration list.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agocoresight: etm-perf: incorporating sink definition from the cmd line
Mathieu Poirier [Fri, 29 Apr 2016 19:29:12 +0000 (13:29 -0600)]
coresight: etm-perf: incorporating sink definition from the cmd line

Now that PMU specific configuration is available as part of the event,
lookup the sink identified by users from the perf command line and build
a path from source to sink.

With this functionality it is no longer required to select a sink in a
separate step (from sysFS) before a perf trace session can be started.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agocoresight: adding sink parameter to function coresight_build_path()
Mathieu Poirier [Fri, 29 Apr 2016 19:22:59 +0000 (13:22 -0600)]
coresight: adding sink parameter to function coresight_build_path()

Up to now function coresight_build_path() was counting on a sink to
have been selected (from sysFS) prior to being called.  This patch
adds a string argument so that a sink matching the argument can be
selected.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agoperf: passing struct perf_event to function setup_aux()
Mathieu Poirier [Thu, 28 Apr 2016 22:26:25 +0000 (16:26 -0600)]
perf: passing struct perf_event to function setup_aux()

Some information, like driver specific configuration, is found
in the perf event structure.  As such pass a 'struct perf_event'
to function setup_aux() rather than just the CPU number so that
individual drivers can make the right configuration when setting
up a session.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agoperf/core: adding PMU driver specific configuration
Mathieu Poirier [Tue, 31 May 2016 22:32:55 +0000 (16:32 -0600)]
perf/core: adding PMU driver specific configuration

It is entirely possible that some PMUs need specific configuration
that is currently not found in the perf options before a session
can be setup.

It is the case for the CoreSight PMU where a sink needs to be
provided.  That sink doesn't fall in any of the current perf
options.

As such this patch adds the capability to receive driver
specific configuration using the existing ioctl() mechanism.
Once the configuration has been pushed down the kernel PMU
callbacks are used to deal with the information sent from user
space.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agoperf tools: adding coresight etm PMU record capabilities
Mathieu Poirier [Fri, 11 Sep 2015 20:43:39 +0000 (20:43 +0000)]
perf tools: adding coresight etm PMU record capabilities

Coresight ETMs are IP blocks used to perform HW assisted tracing
on a CPU core.  This patch introduce the required auxiliary API
functions allowing the perf core to interact with a tracer.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agoperf tools: making coresight PMU listable
Mathieu Poirier [Tue, 20 Oct 2015 16:18:53 +0000 (16:18 +0000)]
perf tools: making coresight PMU listable

Adding the required mechanic allowing 'perf list pmu' to
discover coresight ETM/PTM tracers.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agocoresight: tmc: implementing TMC-ETR AUX space API
Mathieu Poirier [Thu, 10 Dec 2015 18:36:15 +0000 (11:36 -0700)]
coresight: tmc: implementing TMC-ETR AUX space API

This patch implement the AUX area interfaces required to
use the TMC (configured as an ETR) from the Perf sub-system.

The ETR is configured to work with contiguous memory only.
Although not optimal, it allows the IP block to be used
while the scatter-gather mode of operation is being worked
on.

The heuristic is heavily borrowed from the ETB10 and TMC-ETF
implementation.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agocoresight: Add support for Juno platform
Mathieu Poirier [Sun, 18 Oct 2015 22:50:48 +0000 (16:50 -0600)]
coresight: Add support for Juno platform

This patch adds support for ARM's juno platform.  More
specifically it has definitions for the A53/57 tracers,
the A53/57 cluster funnels, the main funnel and the ETF
in circular buffer mode.

Support for all the other coresight IP blocks is not
addressed.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
8 years agocoresight: Handle build path error
Suzuki K Poulose [Fri, 6 May 2016 14:35:50 +0000 (15:35 +0100)]
coresight: Handle build path error

Enabling a component via sysfs (echo 1 > enable_source), would
trigger building a path from the enabled sources to the sink.
If there is an error in the process (e.g, sink not enabled or
the device (CPU corresponding to ETM) is not online), we never report
failure, except for leaving a message in the dmesg.

Do proper error checking for the build path and return the error.

Before:
 $ echo 0 > /sys/devices/system/cpu/cpu2/online
 $ echo 1 > /sys/devices/cs_etm/cpu2/enable_source
 $ echo $?
 0

After:
 $ echo 0 > /sys/devices/system/cpu/cpu2/online
 $ echo 1 > /sys/devices/cs_etm/cpu2/enable_source
 -bash: echo: write error: No such device or address

Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 5014e904681ddbdf663bb20f134eb053ddccb181)

8 years agocoresight: Fix erroneous memset in tmc_read_unprepare_etr
Suzuki K Poulose [Tue, 14 Jun 2016 17:17:14 +0000 (11:17 -0600)]
coresight: Fix erroneous memset in tmc_read_unprepare_etr

At the end of a trace collection, we try to clear the entire buffer
and enable the ETR back if it was already enabled. But, we would have
adjusted the drvdata->buf to point to the beginning of the trace data
in the trace buffer @drvdata->vaddr. So, the following code which
clears the buffer is dangerous and can cause crashes, like below :

memset(drvdata->buf, 0, drvdata->size);

 Unable to handle kernel paging request at virtual address ffffff800a145000
 pgd = ffffffc974726000
 *pgd=00000009f3e91003, *pud=00000009f3e91003, *pmd=0000000000000000
 PREEMPT SMP
 Modules linked in:
 CPU: 4 PID: 1692 Comm: dd Not tainted 4.7.0-rc2+ #1721
 Hardware name: ARM Juno development board (r0) (DT)
 task: ffffffc9734a0080 ti: ffffffc974460000 task.ti: ffffffc974460000
 PC is at __memset+0x1ac/0x200
 LR is at tmc_read_unprepare_etr+0x144/0x1bc
 pc : [<ffffff80083a05ac>] lr : [<ffffff800859c984>] pstate: 200001c5
 ...
 [<ffffff80083a05ac>] __memset+0x1ac/0x200
 [<ffffff800859b2e4>] tmc_release+0x90/0x94
 [<ffffff8008202f58>] __fput+0xa8/0x1ec
 [<ffffff80082030f4>] ____fput+0xc/0x14
 [<ffffff80080c3ef8>] task_work_run+0xb0/0xe4
 [<ffffff8008088bf4>] do_notify_resume+0x64/0x6c
 [<ffffff8008084d5c>] work_pending+0x10/0x14
 Code: 91010108 54ffff4a 8b040108 cb050042 (d50b7428)

Since we clear the buffer anyway in the following call to
tmc_etr_enable_hw(), remove the erroneous memset().

Fixes: commit de5461970b3e9e1 ("coresight: tmc: allocating memory when needed")
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit f3b8172fe15fbed0d0d33d99780e122213e00684)

8 years agocoresight: Fix tmc_read_unprepare_etr
Suzuki K Poulose [Tue, 14 Jun 2016 17:17:13 +0000 (11:17 -0600)]
coresight: Fix tmc_read_unprepare_etr

At the end of the trace capture, we free the allocated memory,
resetting the drvdata->buf to NULL, to indicate that trace data
was collected and the next trace session should allocate the
memory in tmc_enable_etr_sink_sysfs.

The tmc_enable_etr_sink_sysfs, we only allocate memory if drvdata->vaddr
is not NULL (which is not performed at the end of previous session).
This can cause, drvdata->vaddr getting assigned NULL and later we do
memset() which causes a crash as below :

Unable to handle kernel NULL pointer dereference at virtual
 address  00000000
pgd = ffffffc9747f0000
[00000000] *pgd=00000009f402e003, *pud=00000009f402e003,
 *pmd=0000000000000000
Internal error: Oops: 96000046 [#1] PREEMPT SMP
Modules linked in:
CPU: 0 PID: 1592 Comm: bash Not tainted 4.7.0-rc1+ #1712
Hardware name: ARM Juno development board (r0) (DT)
task: ffffffc078fe0080 ti: ffffffc974178000 task.ti: ffffffc974178000
PC is at __memset+0x1ac/0x200
LR is at tmc_enable_etr_sink+0xf8/0x304
pc : [<ffffff80083a002c>] lr : [<ffffff800859be44>] pstate: 400001c5
sp : ffffffc97417bc00
x29: ffffffc97417bc00 x28: ffffffc974178000

Call trace:
Exception stack(0xffffffc97417ba40 to 0xffffffc97417bb60)
ba40: 0000000000000001 ffffffc974a5d098 ffffffc97417bc00 ffffff80083a002c
ba60: ffffffc974a5d118 0000000000000000 0000000000000000 0000000000000000
ba80: 0000000000000001 0000000000000000 ffffff800859bdec 0000000000000040
baa0: ffffff8008b45b58 00000000000001c0 ffffffc97417baf0 ffffff80080eddb4
bac0: 0000000000000003 ffffffc078fe0080 ffffffc078fe0960 ffffffc078fe0940
bae0: 0000000000000000 0000000000000000 00000000007fffc0 0000000000000004
bb00: 0000000000000000 0000000000000040 000000000000003f 0000000000000000
bb20: 0000000000000000 0000000000000000 0000000000000000 0000000000000001
bb40: ffffffc078fe0960 0000000000000018 ffffffffffffffff 0008669628000000
[<ffffff80083a002c>] __memset+0x1ac/0x200
[<ffffff8008599814>] coresight_enable_path+0xa8/0x1dc
[<ffffff8008599b10>] coresight_enable+0x88/0x1b8
[<ffffff8008599d88>] enable_source_store+0x3c/0x6c
[<ffffff800845eaf4>] dev_attr_store+0x18/0x28
[<ffffff80082829e8>] sysfs_kf_write+0x54/0x64
[<ffffff8008281c30>] kernfs_fop_write+0x148/0x1d8
[<ffffff8008200128>] __vfs_write+0x28/0x110
[<ffffff8008200e88>] vfs_write+0xa0/0x198
[<ffffff80082021b0>] SyS_write+0x44/0xa0
[<ffffff8008084e70>] el0_svc_naked+0x24/0x28
Code: 91010108 54ffff4a 8b040108 cb050042 (d50b7428)

This patch fixes the issue by clearing the drvdata->vaddr while we free
the allocated buffer at the end of a session, so that we allocate the
memory again.

Cc: mathieu.poirier@linaro.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 8e215298a15d5b93c6fa22895c406da538769bca)

8 years agocoresight: Fix NULL pointer dereference in _coresight_build_path
Suzuki K Poulose [Tue, 14 Jun 2016 17:17:12 +0000 (11:17 -0600)]
coresight: Fix NULL pointer dereference in _coresight_build_path

_coresight_build_path assumes that all the connections of a csdev
has the child_dev initialised. This may not be true if the particular
component is not supported by the kernel config(e.g TPIU) but is
present in the DT. In which case, building a path can cause a crash like this :

  Unable to handle kernel NULL pointer dereference at virtual address 00000010
  pgd = ffffffc9750dd000
  [00000010] *pgd=00000009f5e90003, *pud=00000009f5e90003, *pmd=0000000000000000
  Internal error: Oops: 96000006 [#1] PREEMPT SMP
  Modules linked in:
  CPU: 4 PID: 1348 Comm: bash Not tainted 4.6.0-next-20160517 #1646
  Hardware name: ARM Juno development board (r0) (DT)
  task: ffffffc97517a280 ti: ffffffc9762c4000 task.ti: ffffffc9762c4000
  PC is at _coresight_build_path+0x18/0xe4
  LR is at _coresight_build_path+0xc0/0xe4
  pc : [<ffffff80083d5130>] lr : [<ffffff80083d51d8>] pstate: 20000145
  sp : ffffffc9762c7ba0

  [<ffffff80083d5130>] _coresight_build_path+0x18/0xe4
  [<ffffff80083d51d8>] _coresight_build_path+0xc0/0xe4
  [<ffffff80083d51d8>] _coresight_build_path+0xc0/0xe4
  [<ffffff80083d51d8>] _coresight_build_path+0xc0/0xe4
  [<ffffff80083d51d8>] _coresight_build_path+0xc0/0xe4
  [<ffffff80083d51d8>] _coresight_build_path+0xc0/0xe4
  [<ffffff80083d5cdc>] coresight_build_path+0x40/0x68
  [<ffffff80083d5e14>] coresight_enable+0x74/0x1bc
  [<ffffff80083d60a0>] enable_source_store+0x3c/0x6c
  [<ffffff800830b17c>] dev_attr_store+0x18/0x28
  [<ffffff80081ca9c4>] sysfs_kf_write+0x40/0x50
  [<ffffff80081c9e38>] kernfs_fop_write+0x140/0x1cc
  [<ffffff8008163ec8>] __vfs_write+0x28/0x110
  [<ffffff8008164bf0>] vfs_write+0xa0/0x174
  [<ffffff8008165d18>] SyS_write+0x44/0xa0
  [<ffffff8008084e70>] el0_svc_naked+0x24/0x28

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit ec48a1d981fe90ecb5bcfaaf1ae2c69d842cbbbc)

8 years agocoresight: etb10: adjust read pointer only when needed
Mathieu Poirier [Tue, 3 May 2016 17:34:01 +0000 (11:34 -0600)]
coresight: etb10: adjust read pointer only when needed

The read pointer (read_ptr) needs to be adjusted only if its value
has gone beyond the length of the memory buffer.

Reported-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit bedffda8cad46bedb6880bb98c23c51c715216c3)

8 years agocoresight: configuring ETF in FIFO mode when acting as link
Mathieu Poirier [Tue, 3 May 2016 17:34:00 +0000 (11:34 -0600)]
coresight: configuring ETF in FIFO mode when acting as link

When part of a path but not identified as a sink, the EFT has to
be configured as a link and placed in HW FIFO mode.  As such when
enabling a path, call the right configuration function based on
the role the ETF if playing in this trace run.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit dc2c4ef141c5c14cb8d968ba16c74b4f3c373e2c)

8 years agocoresight: tmc: implementing TMC-ETF AUX space API
Mathieu Poirier [Tue, 3 May 2016 17:33:59 +0000 (11:33 -0600)]
coresight: tmc: implementing TMC-ETF AUX space API

This patch implement the AUX area interfaces required to
use the TMC (configured as an ETF) from the Perf sub-system.

The heuristic is heavily borrowed from the ETB10 implementation.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 2e499bbc1a929ac87dcb9832d11000fc055f8bc6)

8 years agocoresight: moving struct cs_buffers to header file
Mathieu Poirier [Tue, 3 May 2016 17:33:58 +0000 (11:33 -0600)]
coresight: moving struct cs_buffers to header file

That way we can re-use the structure in other drivers.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit a02e81f7a32b49f3cb70c5ebd2eab5608a088514)

8 years agocoresight: tmc: keep track of memory width
Mathieu Poirier [Tue, 3 May 2016 17:33:57 +0000 (11:33 -0600)]
coresight: tmc: keep track of memory width

Accessing the HW configuration register each time the memory
width is needed simply doesn't make sense.  It is much more
efficient to read the value once and keep a reference for
later use.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 4f1ff3de925d741b0b77c59bc1387cb940ad7c73)

8 years agocoresight: tmc: make sysFS and Perf mode mutually exclusive
Mathieu Poirier [Tue, 3 May 2016 17:33:56 +0000 (11:33 -0600)]
coresight: tmc: make sysFS and Perf mode mutually exclusive

The sysFS and Perf access methods can't be allowed to interfere
with one another.  As such introducing guards to access
functions that prevents moving forward if a TMC is already
being used.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit b217601e9adce4d2dccc95a9e6814bdbf5a4a815)

8 years agocoresight: tmc: dump system memory content only when needed
Mathieu Poirier [Tue, 3 May 2016 17:33:55 +0000 (11:33 -0600)]
coresight: tmc: dump system memory content only when needed

Calling tmc_etf/etr_dump_hw() is required only when operating from
sysFS.  When working from Perf, the system memory is harvested
from the AUX trace API.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit a40318fb01e98e72175bd9891208541148633d42)

8 years agocoresight: tmc: adding mode of operation for link/sinks
Mathieu Poirier [Tue, 3 May 2016 17:33:54 +0000 (11:33 -0600)]
coresight: tmc: adding mode of operation for link/sinks

Moving tmc_drvdata::enable to a local_t mode.  That way the
sink interface is aware of it's orgin and the foundation for
mutual exclusion between the sysFS and Perf interface can be
laid out.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit f2facc3366d77e78dbc8bf865f1e4a6227a7f0e5)

8 years agocoresight: tmc: getting rid of multiple read access
Mathieu Poirier [Tue, 3 May 2016 17:33:53 +0000 (11:33 -0600)]
coresight: tmc: getting rid of multiple read access

Allowing multiple readers to access the trace data simultaniously
via sysFS provides no shortage of opportunity for race condition,
mandates two variable to be maintained (drvdata::read_count and
drvdata::reading), makes the code complex and provide little
advantages, if any.

This patch streamlines the read process by restricting trace data
access to a single user.  That way drvdata::read_count can
be eliminated and race conditions (along with faulty error handling)
in function tmc_open() and tmc_release() eliminated.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit f74debbea0885ebb65fb3fa4e598323f40b03f5f)

8 years agocoresight: tmc: allocating memory when needed
Mathieu Poirier [Tue, 3 May 2016 17:33:52 +0000 (11:33 -0600)]
coresight: tmc: allocating memory when needed

In it's current form the TMC probe() function allocates
trace buffer memory at boot time, event if coresight isn't
used.  This is highly inefficient since trace buffers can
occupy a lot of memory that could be used otherwised.

This patch allocates trace buffers on the fly, when the
coresight subsystem is solicited.  Allocated buffers are
released when traces are read using the device descriptors
under /dev.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit de5461970b3e9e19470b821f5feaa3235ceb35f5)

8 years agocoresight: tmc: making prepare/unprepare functions generic
Mathieu Poirier [Tue, 3 May 2016 17:33:51 +0000 (11:33 -0600)]
coresight: tmc: making prepare/unprepare functions generic

Dealing with HW related matters in tmc_read_prepare/unprepare
becomes convoluted when many cases need to be handled distinctively.

As such moving processing related to HW setup to individual driver
files and keep the core driver generic.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 4525412a5046692abb7a0588589d8ed2c20585e0)

8 years agocoresight: tmc: splitting driver in ETB/ETF and ETR components
Mathieu Poirier [Tue, 3 May 2016 17:33:50 +0000 (11:33 -0600)]
coresight: tmc: splitting driver in ETB/ETF and ETR components

The TMC block can operate in 3 modes (ETB, ETF and ETR) and accessed
via two interfaces (sysFS and Perf).  That makes 6 mode to cover, which
is way too much coupling for a single file.

This patch splits the original TMC driver in 2 halves, one for ETB/ETF
and another one for ETR mode.  A common core is kept for functionality
common to all 3 modes.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 6c6ed1e244c0530fb76a8b52024f199f398ef100)

8 years agocoresight: tmc: cleaning up header file
Mathieu Poirier [Tue, 3 May 2016 17:33:49 +0000 (11:33 -0600)]
coresight: tmc: cleaning up header file

This patch first move the TMC_STS_TMCREADY_BIT and
TMC_FFCR_FLUSHMAN_BIT defines to their respective section.
It also removes TMC_FFCR_FLUSHMAN, since the same result
can easily be obtained using the BIT() macro.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit a8ab4268e0db93c564ee6ccb770bb3d53af24be9)

8 years agocoresight: tmc: introducing new header file
Mathieu Poirier [Tue, 3 May 2016 17:33:48 +0000 (11:33 -0600)]
coresight: tmc: introducing new header file

The amount of #define, enumeration and structure definition
is big enough to justify moving them to a new header file.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 4c324b5f0e8a692c8d077da9d18533820c2ab636)

8 years agocoresight: tmc: clearly define number of transfers per burst
Mathieu Poirier [Tue, 3 May 2016 17:33:47 +0000 (11:33 -0600)]
coresight: tmc: clearly define number of transfers per burst

This patch makes the name of the define reflect the amount of
data tranfers per burst, in this case 16.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit ebba56e7b2bd2c9c2bbe02fad8808feef18e1519)

8 years agocoresight: tmc: re-implementing tmc_read_prepare/unprepare() functions
Mathieu Poirier [Tue, 3 May 2016 17:33:46 +0000 (11:33 -0600)]
coresight: tmc: re-implementing tmc_read_prepare/unprepare() functions

In their current implementation the tmc_read_prepare/unprepare()
are a lump of if/else that is difficult to read.  This patch is
alleviating that by using a switch statement.  The latter also
allows for a better control on the error path.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit b1789b793eb4627928f55a6acea8da7c25e5c6b4)

8 years agocoresight: tmc: waiting for TMCReady bit before programming
Mathieu Poirier [Tue, 3 May 2016 17:33:45 +0000 (11:33 -0600)]
coresight: tmc: waiting for TMCReady bit before programming

According to the TRM before programming the TMC in circular
buffer mode (and that for any configuration, ETB, ETR, ETF),
the TMCReady bit in the status register has to be set.

This patch adds a check to make sure the state machine is in
a state where it can be configured, and complains otherwise.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 358f42184e97f9a216b927a5a744597b98e0eee1)

8 years agocoresight: tmc: modifying naming convention
Mathieu Poirier [Tue, 3 May 2016 17:33:44 +0000 (11:33 -0600)]
coresight: tmc: modifying naming convention

According to the TMC architectural state machine, the 'stopped'
state is reached when bit 2 (TMCReady) of the TMC Status register
turns to '1'.  The code is correct but the naming convention isn't.

The 'Triggered' bit occupies position '1' of the TMC Status register
and has nothing to do with the indication of the TMC entering the
stopped state. As such renaming function "tmc_wait_for_triggered()"
and changing the #define to reflect what the code is really doing.

This patch has no effect other than clarifying the semantic.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 580ff804ecaf5bc59835fec26e17325bcd53fc91)

8 years agocoresight: tmc: adding sysFS management entries
Mathieu Poirier [Tue, 3 May 2016 17:33:43 +0000 (11:33 -0600)]
coresight: tmc: adding sysFS management entries

Adding management registers that convey implementation
specific characteristics.  Those are useful for trace
configuration and collection along with general trouble
shooting.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 7d83d17795efce95def54a13ccd6c3f80de6e8f0)

8 years agocoresight: etm4x: add tracer ID for A72 Maia processor.
Li Pengcheng [Tue, 3 May 2016 17:33:42 +0000 (11:33 -0600)]
coresight: etm4x: add tracer ID for A72 Maia processor.

This patch adds a cellID for the ETMv4 tracer found on
HiSillicon's A72 Maia processor.

Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
Signed-off-by: Li Zhong <lizhong11@hisilicon.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 960e30959988e0f37e0eeb22b6cdb65b94d5d2e7)

8 years agocoresight: etb10: fixing the right amount of words to read
Mathieu Poirier [Tue, 3 May 2016 17:33:41 +0000 (11:33 -0600)]
coresight: etb10: fixing the right amount of words to read

This patch rectifies the amount of words to read when the internal
buffer is deemed bigger than the amount of space available in the
perf ring buffer.

The amount to read is set to the amount of space in the perf ring
buffer rather than being subtracted by it.

Reported-by: Suzuki K Poulose <Suzuki.Poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit b5af0a26da84b75376706a92c7a58036a0bf3541)

8 years agocoresight: stm: adding driver for CoreSight STM component
Pratik Patel [Tue, 3 May 2016 17:33:40 +0000 (11:33 -0600)]
coresight: stm: adding driver for CoreSight STM component

This driver adds support for the STM CoreSight IP block, allowing any
system compoment (HW or SW) to log and aggregate messages via a
single entity.

The CoreSight STM exposes an application defined number of channels
called stimulus port.  Configuration is done using entries in sysfs
and channels made available to userspace via configfs.

Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Michael Williams <michael.williams@arm.com>
Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 237483aa5cf43105d148d3f03b29eed47c3e6cf9)

8 years agocoresight: adding path for STM device
Mathieu Poirier [Tue, 3 May 2016 17:33:38 +0000 (11:33 -0600)]
coresight: adding path for STM device

>From a core framework point of view an STM device is a source that is
treated the same way as any other tracers.  Unlike tracers though STM
devices are not associated with a CPU.  As such it doesn't make sense
to associate the path from an STM device to its sink with a per-cpu
variable as it is done for tracers.

This patch simply adds another global variable to keep STM paths and the
processing in coresight_enable/disable() is updated to deal with STM
devices properly.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit a685d68328f14579b2e68d6a3a2066089cffbf98)

8 years agocoresight: etm4x: modify q_support type
Li Pengcheng [Tue, 3 May 2016 17:33:36 +0000 (11:33 -0600)]
coresight: etm4x: modify q_support type

Because this operation exceed the range of boolean,
so we should modify q_support to unit8 bit.
drvdata->q_support = BMVAL(etmidr0, 15, 16)

Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
Signed-off-by: Li Zhong <lizhong11@hisilicon.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 6327a454a8ab0dcab24a647367d216c1b84020c6)

8 years agocoresight: no need to do the forced type conversion
Li Pengcheng [Tue, 3 May 2016 17:33:35 +0000 (11:33 -0600)]
coresight: no need to do the forced type conversion

activated and enable are already unsigned type,
no need to change them to unsigned.

Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
Signed-off-by: Li Zhong <lizhong11@hisilicon.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit e8dc27d0ee458f9622b50e2d9476719b3a0e686b)

8 years agocoresight: removing gratuitous boot time log messages
Mathieu Poirier [Tue, 5 Apr 2016 17:53:52 +0000 (11:53 -0600)]
coresight: removing gratuitous boot time log messages

Removing boot time log for drivers that don't report useful information
other than they came up properly.  The same information can be found in
sysFS once the system has booted and as such doesn't provide any value
in the boot log.

Reported-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit ef0fd640e3312b8164ec43e1eff24769a7c08b7f)

8 years agocoresight: etb10: splitting sysFS "status" entry
Mathieu Poirier [Tue, 5 Apr 2016 17:53:51 +0000 (11:53 -0600)]
coresight: etb10: splitting sysFS "status" entry

The sysFS "status" entry conveys a wealth of information about
the status of the HW but goes agains the sysFS rule of one topic
per file.

This patch rectify the situation by adding read-only entries for
each of the field formaly displayed by "status".  The ABI
documentation is kept up to date.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit ad352acbb9d606a5facff31fd96b05d0346726b1)

8 years agocoresight: moving coresight_simple_func() to header file
Mathieu Poirier [Tue, 5 Apr 2016 17:53:50 +0000 (11:53 -0600)]
coresight: moving coresight_simple_func() to header file

Macro "coresight_simple_func()" can be used by several drivers.
As such making the structure type generic and moving to a
globally available header file.  That way individual drivers
can use the functionality by simply specifying the structure
they need to work with.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 154f3520fe1cdef9009909dc62828eb2d7635631)

8 years agocoresight: etm4x: implementing the perf PMU API
Mathieu Poirier [Tue, 5 Apr 2016 17:53:49 +0000 (11:53 -0600)]
coresight: etm4x: implementing the perf PMU API

Adding a set of API allowing the Perf core to treat ETMv4
tracers like other PMUs.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 37fbbdbde9ad3722a7a18beab936825a6ff322bf)

8 years agocoresight: etm4x: implementing user/kernel mode tracing
Mathieu Poirier [Tue, 5 Apr 2016 17:53:48 +0000 (11:53 -0600)]
coresight: etm4x: implementing user/kernel mode tracing

Adding new mode to limit tracing to kernel or user space.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 4f6fce54528e0382281cf199635d098e4b108357)

8 years agocoresight: etm4x: moving etm_drvdata::enable to atomic field
Mathieu Poirier [Tue, 5 Apr 2016 17:53:47 +0000 (11:53 -0600)]
coresight: etm4x: moving etm_drvdata::enable to atomic field

Similarly to ETMv3, moving etmv4_drvdata::enable to an atomic
type that gives the 'mode' of a tracer and prevents multiple,
simultanious access by different subsystems.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit c38a9ec2b2c12c38abca0b7954ed793f26969835)

8 years agocoresight: etm4x: unlocking tracers in default arch init
Mathieu Poirier [Tue, 5 Apr 2016 17:53:46 +0000 (11:53 -0600)]
coresight: etm4x: unlocking tracers in default arch init

As with the ETMv3.x driver, calling 'smp_call_function_single()'
twice in a row is highly ineffective.  As such moving function
'etm4_os_unlock()' before the default initialisation takes
place, which results in the same outcome.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 66bbbb77540e846b9aac4c9467aca936128951bf)

8 years agocoresight: etm4x: splitting etmv4 default configuration
Mathieu Poirier [Tue, 5 Apr 2016 17:53:45 +0000 (11:53 -0600)]
coresight: etm4x: splitting etmv4 default configuration

Splitting and updating the default initialisation for each etmv4
configuration so that it can be called at the beginning of each
session rather than initialisation time only.

Since the trace ID isn't expected to change with every session,
moving it with the default tracer initialisation.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit fc208abef39279903887bea955139f64bf0bbb12)

8 years agocoresight: etm4x: splitting struct etmv4_drvdata
Mathieu Poirier [Tue, 5 Apr 2016 17:53:44 +0000 (11:53 -0600)]
coresight: etm4x: splitting struct etmv4_drvdata

Similar to what was done on etm3x, splitting driver structure
etmv4_drvdata in two.  One half is concerned with the HW
characteristics that are generally static in nature.  The other
half deals with user configuration and will change from one
trace session to another.

No gain/loss of functionality is incurred from this patch.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 54ff892b76c68ea3fa0ba53a0cdc4508b35aee6f)

8 years agocoresight: etm4x: adding config and traceid registers
Mathieu Poirier [Tue, 5 Apr 2016 17:53:43 +0000 (11:53 -0600)]
coresight: etm4x: adding config and traceid registers

Adding new sysFS management interface to query the configuration
and the traceid registers.  Both are required to convey information
to the perf cmd line tools when using ETMv4 tracers as PMU.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 7c38aa4b03b3fc6ce17e5a00327f8c0be18daf8a)

8 years agocoresight: etm4x: moving sysFS entries to a dedicated file
Mathieu Poirier [Tue, 5 Apr 2016 17:53:42 +0000 (11:53 -0600)]
coresight: etm4x: moving sysFS entries to a dedicated file

As with the etm3x driver, sysFS entries are big enough to justify
their own file. As such moving all sysFS related declarations to
a dedicated location.

No gain/loss of functionality is incurred from this patch.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit a77de2637c9eb4794c6234b40cee2a243c548875)

8 years agostm class: Support devices that override software assigned masters
Alexander Shishkin [Tue, 3 May 2016 17:33:37 +0000 (11:33 -0600)]
stm class: Support devices that override software assigned masters

Some STM devices adjust software assigned master numbers depending on
the trace source and its runtime state and whatnot. This patch adds
a sysfs attribute to inform the trace-side software that master numbers
assigned to software sources will not match those in the STP stream,
so that, for example, master/channel allocation policy can be adjusted
accordingly.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 8e996a2874bbbed30e8dfe881453825fc6b7654e)

8 years agostm class: Remove unnecessary pointer increment
Alexander Shishkin [Fri, 4 Mar 2016 14:55:12 +0000 (16:55 +0200)]
stm class: Remove unnecessary pointer increment

Readability: a postfix increment is used on a pointer which is not
used anywhere afterwards, which may send the reader looking through
the function one extra time. Drop the unnecessary increment.

Reported-by: Alan Cox <alan.cox@intel.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Laurent Fert <laurent.fert@intel.com>
(cherry picked from commit fb0801904bbbc7b109d4009520c7fa34bcfb7450)

8 years agostm class: Fix stm device initialization order
Alexander Shishkin [Fri, 4 Mar 2016 14:48:14 +0000 (16:48 +0200)]
stm class: Fix stm device initialization order

Currently, stm_register_device() makes the device visible and then
proceeds to initializing spinlocks and other properties, which leaves
a window when the device can already be opened but is not yet fully
operational.

Fix this by reversing the initialization order.

Reported-by: Alan Cox <alan.cox@intel.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Laurent Fert <laurent.fert@intel.com>
(cherry picked from commit 389b6699a2aa0b457aa69986e9ddf39f3b4030fd)

8 years agostm class: Do not leak the chrdev in error path
Alexander Shishkin [Fri, 4 Mar 2016 14:36:10 +0000 (16:36 +0200)]
stm class: Do not leak the chrdev in error path

Currently, the error path of stm_register_device() forgets to unregister
the chrdev. Fix this.

Reported-by: Alan Cox <alan.cox@intel.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Laurent Fert <laurent.fert@intel.com>
(cherry picked from commit cbe4a61d1ddc4790d950ca8c33ef79ee68ef5e2b)

8 years agostm class: Remove a pointless line
Alexander Shishkin [Fri, 4 Mar 2016 14:30:24 +0000 (16:30 +0200)]
stm class: Remove a pointless line

No point in explicitly setting something to zero right after we
explicitly checked that it is zero. Fix this.

Reported-by: Alan Cox <alan.cox@intel.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Laurent Fert <laurent.fert@intel.com>
(cherry picked from commit 8fa11d1c1322f3de40a0e3f3f3e57436a204fcc4)

8 years agostm class: stm_heartbeat: Make nr_devs parameter read-only
Alexander Shishkin [Fri, 4 Mar 2016 14:22:33 +0000 (16:22 +0200)]
stm class: stm_heartbeat: Make nr_devs parameter read-only

Changing nr_devs after the module has been loaded doesn't actually
change anything, so just make it read-only.

Reported-by: Alan Cox <alan.cox@intel.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Laurent Fert <laurent.fert@intel.com>
(cherry picked from commit c8be4899449c0b27bc5daf71742cd601b2b3b4e3)

8 years agostm class: dummy_stm: Make nr_dummies parameter read-only
Alexander Shishkin [Fri, 4 Mar 2016 14:22:33 +0000 (16:22 +0200)]
stm class: dummy_stm: Make nr_dummies parameter read-only

Changing nr_dummies after the module has been loaded doesn't actually
change anything, so just make it read-only.

Reported-by: Alan Cox <alan.cox@intel.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Laurent Fert <laurent.fert@intel.com>
(cherry picked from commit 118b4515aa6916ee7751f29c8b2a3af95abc9783)

8 years agoMAINTAINERS: Add a git tree for the stm class
Alexander Shishkin [Thu, 31 Mar 2016 13:30:15 +0000 (16:30 +0300)]
MAINTAINERS: Add a git tree for the stm class

So that people know where their patches go.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: Laurent Fert <laurent.fert@intel.com>
(cherry picked from commit e787bc463cc1fe3f51b0cd7bf540236318f69cf1)

8 years agoperf/ring_buffer: Document AUX API usage
Alexander Shishkin [Fri, 4 Mar 2016 13:42:47 +0000 (15:42 +0200)]
perf/ring_buffer: Document AUX API usage

In order to ensure safe AUX buffer management, we rely on the assumption
that pmu::stop() stops its ongoing AUX transaction and not just the hw.

This patch documents this requirement for the perf_aux_output_{begin,end}()
APIs.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: vince@deater.net
Link: http://lkml.kernel.org/r/1457098969-21595-4-git-send-email-alexander.shishkin@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
(cherry picked from commit af5bb4ed1254a378b6028c09e58bdcc1cd9bf5b3)

8 years agoperf/core: Free AUX pages in unmap path
Alexander Shishkin [Wed, 2 Dec 2015 16:41:11 +0000 (18:41 +0200)]
perf/core: Free AUX pages in unmap path

Now that we can ensure that when ring buffer's AUX area is on the way
to getting unmapped new transactions won't start, we only need to stop
all events that can potentially be writing aux data to our ring buffer.

Having done that, we can safely free the AUX pages and corresponding
PMU data, as this time it is guaranteed to be the last aux reference
holder.

This partially reverts:

  57ffc5ca679 ("perf: Fix AUX buffer refcounting")

... which was made to defer deallocation that was otherwise possible
from an NMI context. Now it is no longer the case; the last call to
rb_free_aux() that drops the last AUX reference has to happen in
perf_mmap_close() on that AUX area.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: vince@deater.net
Link: http://lkml.kernel.org/r/87d1qtz23d.fsf@ashishki-desk.ger.corp.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
(cherry picked from commit 95ff4ca26c492fc1ed7751f5dd7ab7674b54f4e0)

8 years agoperf/ring_buffer: Refuse to begin AUX transaction after rb->aux_mmap_count drops
Alexander Shishkin [Fri, 4 Mar 2016 13:42:45 +0000 (15:42 +0200)]
perf/ring_buffer: Refuse to begin AUX transaction after rb->aux_mmap_count drops

When ring buffer's AUX area is unmapped and rb->aux_mmap_count drops to
zero, new AUX transactions into this buffer can still be started,
even though the buffer in en route to deallocation.

This patch adds a check to perf_aux_output_begin() for rb->aux_mmap_count
being zero, in which case there is no point starting new transactions,
in other words, the ring buffers that pass a certain point in
perf_mmap_close will not have their events sending new data, which
clears path for freeing those buffers' pages right there and then,
provided that no active transactions are holding the AUX reference.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: vince@deater.net
Link: http://lkml.kernel.org/r/1457098969-21595-2-git-send-email-alexander.shishkin@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
(cherry picked from commit dcb10a967ce82d5ad20570693091139ae716ff76)

8 years agoperf auxtrace: Add perf_evlist pointer to *info_priv_size()
Mathieu Poirier [Thu, 14 Jan 2016 21:46:15 +0000 (14:46 -0700)]
perf auxtrace: Add perf_evlist pointer to *info_priv_size()

On some architecture the size of the private header may be dependent on
the number of tracers used in the session.  As such adding a "struct
perf_evlist *" parameter, which should contain all the required
information.

Also adjusting the existing client of the interface to take the new
parameter into account.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Al Grant <al.grant@arm.com>
Cc: Chunyan Zhang <zhang.chunyan@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-doc@vger.kernel.org
Cc: Mike Leach <mike.leach@arm.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Rabin Vincent <rabin@rab.in>
Cc: Tor Jeremiassen <tor@ti.com>
Link: http://lkml.kernel.org/r/1452807977-8069-22-git-send-email-mathieu.poirier@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
(cherry picked from commit 14a05e13a044c1cd6aaa3eb1a5fcdad7b4f6c990)

8 years agoperf session: Simplify tool stubs
Adrian Hunter [Mon, 7 Mar 2016 19:44:39 +0000 (16:44 -0300)]
perf session: Simplify tool stubs

Some of the stubs are identical so just have one function for them.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1457005856-6143-3-git-send-email-adrian.hunter@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
(cherry picked from commit 5fb0ac16c5091f48eecf1a77e461f6957a463d61)

8 years agoperf inject: Hit all DSOs for AUX data in JIT and other cases
Adrian Hunter [Mon, 7 Mar 2016 19:44:38 +0000 (16:44 -0300)]
perf inject: Hit all DSOs for AUX data in JIT and other cases

Currently, when injecting build ids, if there is AUX data then 'perf
inject' hits all DSOs because it is not known which DSOs the trace data
would hit.

That needs to be done for JIT injection also, and in fact there is no
reason to distinguish what kind of injection is being done.  That is,
any time there is AUX data and the HEADER_BUID_ID feature flag is set,
and the AUX data is not being processed, then hit all DSOs.  This patch
does that.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1457005856-6143-2-git-send-email-adrian.hunter@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
(cherry picked from commit 640dad47988ec4b734d71934be103bb6e931279f)

8 years agoperf tools: tracepoint_error() can receive e=NULL, robustify it
Adrian Hunter [Tue, 26 Jan 2016 12:05:20 +0000 (14:05 +0200)]
perf tools: tracepoint_error() can receive e=NULL, robustify it

Fixes segmentation fault using, for instance:

  (gdb) run record -I -e intel_pt/tsc=1,noretcomp=1/u /bin/ls
  Starting program: /home/acme/bin/perf record -I -e intel_pt/tsc=1,noretcomp=1/u /bin/ls
  Missing separate debuginfos, use: dnf debuginfo-install glibc-2.22-7.fc23.x86_64
  [Thread debugging using libthread_db enabled]
  Using host libthread_db library "/lib64/libthread_db.so.1".

 Program received signal SIGSEGV, Segmentation fault.
  0 x00000000004b9ea5 in tracepoint_error (e=0x0, err=13, sys=0x19b1370 "sched", name=0x19a5d00 "sched_switch") at util/parse-events.c:410
  (gdb) bt
  #0  0x00000000004b9ea5 in tracepoint_error (e=0x0, err=13, sys=0x19b1370 "sched", name=0x19a5d00 "sched_switch") at util/parse-events.c:410
  #1  0x00000000004b9fc5 in add_tracepoint (list=0x19a5d20, idx=0x7fffffffb8c0, sys_name=0x19b1370 "sched", evt_name=0x19a5d00 "sched_switch", err=0x0, head_config=0x0)
      at util/parse-events.c:433
  #2  0x00000000004ba334 in add_tracepoint_event (list=0x19a5d20, idx=0x7fffffffb8c0, sys_name=0x19b1370 "sched", evt_name=0x19a5d00 "sched_switch", err=0x0, head_config=0x0)
      at util/parse-events.c:498
  #3  0x00000000004bb699 in parse_events_add_tracepoint (list=0x19a5d20, idx=0x7fffffffb8c0, sys=0x19b1370 "sched", event=0x19a5d00 "sched_switch", err=0x0, head_config=0x0)
      at util/parse-events.c:936
  #4  0x00000000004f6eda in parse_events_parse (_data=0x7fffffffb8b0, scanner=0x19a49d0) at util/parse-events.y:391
  #5  0x00000000004bc8e5 in parse_events__scanner (str=0x663ff2 "sched:sched_switch", data=0x7fffffffb8b0, start_token=258) at util/parse-events.c:1361
  #6  0x00000000004bca57 in parse_events (evlist=0x19a5220, str=0x663ff2 "sched:sched_switch", err=0x0) at util/parse-events.c:1401
  #7  0x0000000000518d5f in perf_evlist__can_select_event (evlist=0x19a3b90, str=0x663ff2 "sched:sched_switch") at util/record.c:253
  #8  0x0000000000553c42 in intel_pt_track_switches (evlist=0x19a3b90) at arch/x86/util/intel-pt.c:364
  #9  0x00000000005549d1 in intel_pt_recording_options (itr=0x19a2c40, evlist=0x19a3b90, opts=0x8edf68 <record+232>) at arch/x86/util/intel-pt.c:664
  #10 0x000000000051e076 in auxtrace_record__options (itr=0x19a2c40, evlist=0x19a3b90, opts=0x8edf68 <record+232>) at util/auxtrace.c:539
  #11 0x0000000000433368 in cmd_record (argc=1, argv=0x7fffffffde60, prefix=0x0) at builtin-record.c:1264
  #12 0x000000000049bec2 in run_builtin (p=0x8fa2a8 <commands+168>, argc=5, argv=0x7fffffffde60) at perf.c:390
  #13 0x000000000049c12a in handle_internal_command (argc=5, argv=0x7fffffffde60) at perf.c:451
  #14 0x000000000049c278 in run_argv (argcp=0x7fffffffdcbc, argv=0x7fffffffdcb0) at perf.c:495
  #15 0x000000000049c60a in main (argc=5, argv=0x7fffffffde60) at perf.c:618
(gdb)

Intel PT attempts to find the sched:sched_switch tracepoint but that seg
faults if tracefs is not readable, because the error reporting structure
is null, as errors are not reported when automatically adding
tracepoints.  Fix by checking before using.

Committer note:

This doesn't take place in a kernel that supports
perf_event_attr.context_switch, that is the default way that will be
used for tracking context switches, only in older kernels, like 4.2, in
a machine with Intel PT (e.g. Broadwell) for non-priviledged users.

Further info from a similar patch by Wang:

The error is in tracepoint_error: it assumes the 'e' parameter is valid.

However, there are many situation a parse_event() can be called without
parse_events_error. See result of

  $ grep 'parse_events(.*NULL)' ./tools/perf/ -r'

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Tong Zhang <ztong@vt.edu>
Cc: Wang Nan <wangnan0@huawei.com>
Cc: stable@vger.kernel.org # v4.4+
Fixes: 196581717d85 ("perf tools: Enhance parsing events tracepoint error output")
Link: http://lkml.kernel.org/r/1453809921-24596-2-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
(cherry picked from commit ec183d22cc284a7a1e17f0341219d8ec8ca070cc)

8 years agoperf evlist: Make perf_evlist__open() open evsels with their cpus and threads (like...
Adrian Hunter [Thu, 7 Jan 2016 09:13:59 +0000 (10:13 +0100)]
perf evlist: Make perf_evlist__open() open evsels with their cpus and threads (like perf record does)

'perf record' uses perf_evsel__open() to open events and passes the
evsel->cpus and evsel->threads.  Many tests and some tools instead use
perf_evlist__open() which passes instead evlist->cpus and
evlist->threads.

Make perf_evlist__open() follow the 'perf record' behaviour so that a
consistent approach is taken.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Noel Grandin <noelgrandin@gmail.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1452158050-28061-3-git-send-email-jolsa@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
(cherry picked from commit 23df7f798435796aff07d641456326b81cb34a77)

8 years agoperf evsel: Introduce disable() method
Jiri Olsa [Thu, 3 Dec 2015 09:06:41 +0000 (10:06 +0100)]
perf evsel: Introduce disable() method

Adding perf_evsel__disable function to have complement for
perf_evsel__enable function. Both will be used in following patch to
factor perf_evlist__(enable|disable).

Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1449133606-14429-3-git-send-email-jolsa@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
(cherry picked from commit e98a4cbb01e0ba1110eba5166a425b3eab9b2244)

8 years agoperf cpumap: Auto initialize cpu__max_{node,cpu}
Arnaldo Carvalho de Melo [Tue, 26 Jan 2016 18:51:46 +0000 (15:51 -0300)]
perf cpumap: Auto initialize cpu__max_{node,cpu}

Since it was always checking if the initialization was done, use that
branch to do the initialization if not done already.

With this we reduce the number of exported globals from these files.

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: David Ahern <dsahern@gmail.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Wang Nan <wangnan0@huawei.com>
Link: http://lkml.kernel.org/r/20160125212955.GG22501@kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
(cherry picked from commit 5ac76283b32b116c58e362e99542182ddcfc8262)

8 years agodrivers/hwtracing: make coresight-etm-perf.c explicitly non-modular
Paul Gortmaker [Sat, 27 Feb 2016 20:21:47 +0000 (15:21 -0500)]
drivers/hwtracing: make coresight-etm-perf.c explicitly non-modular

In commit 941943cf519f7cacbbcecee5c4ef4b77b466bd5c ("drivers/hwtracing:
make coresight-* explicitly non-modular") we removed all uses of
modular functions/macros in favour of their built-in equivlents in
this subsystem.

However that commit and commit 0bcbf2e30ff2271b54f54c8697a185f7d86ec6e4
("coresight: etm-perf: new PMU driver for ETM tracers") were in flight
at the same time, and hence one new non-modular user of module_init
crept back in.  Fix it up like we did all the others.

Since module_init translates to device_initcall in the non-modular
case, the init ordering remains unchanged with this commit.

Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit ca48fa22c3ed3b7b062bc6fa7b72493c00571e33)

8 years agodrivers/hwtracing: make coresight-* explicitly non-modular
Paul Gortmaker [Thu, 18 Feb 2016 00:52:03 +0000 (17:52 -0700)]
drivers/hwtracing: make coresight-* explicitly non-modular

None of the Kconfig currently controlling compilation of any of
the files here are tristate, meaning that none of it currently
is being built as a module by anyone.

We need not be concerned about .remove functions and blocking the
unbind sysfs operations, since that was already done in a recent
commit.

Lets remove any remaining modular references, so that when reading the
drivers there is no doubt they are builtin-only.

All drivers get mostly the same changes, so they are handled in batch.
Changes are (1) convert to builtin_amba_driver, (2) delete module.h
include where unused, and (3) relocate the description into the
comments so we don't need MODULE_DESCRIPTION and associated tags.

The etm3x and etm4x use module_param_named, and have been adjusted
to just include moduleparam.h for that purpose.

In commit f309d4443130bf814e991f836e919dca22df37ae ("platform_device:
better support builtin boilerplate avoidance") we introduced the
builtin_driver macro.

Here we use that support and extend it to amba driver registration,
so where a driver is clearly non-modular and builtin-only, we can
update with the simple mapping of

     module_amba_driver(...)  ---> builtin_amba_driver(...)

Since module_amba_driver() uses the same init level priority as
builtin_amba_driver() the init ordering remains unchanged with
this commit.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 941943cf519f7cacbbcecee5c4ef4b77b466bd5c)

8 years agocoresight: introducing a global trace ID function
Mathieu Poirier [Thu, 18 Feb 2016 00:52:02 +0000 (17:52 -0700)]
coresight: introducing a global trace ID function

TraceID values have to be unique for all tracers and
consistent between drivers and user space.  As such
introducing a central function to be used whenever a
traceID value is required.

The patch also account for data traceIDs, which are usually
I(N) + 1.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 17534ceb835a1a96eb921a2a80df168723d6570a)

8 years agocoresight: etm-perf: new PMU driver for ETM tracers
Mathieu Poirier [Thu, 18 Feb 2016 00:52:01 +0000 (17:52 -0700)]
coresight: etm-perf: new PMU driver for ETM tracers

Perf is a well known and used tool for performance monitoring
and much more. A such it is an ideal candidate for integration
with coresight based HW tracing.

This patch introduces a PMU that represent a coresight tracer to
the Perf core.

Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 0bcbf2e30ff2271b54f54c8697a185f7d86ec6e4)

8 years agocoresight: etb10: implementing AUX API
Mathieu Poirier [Thu, 18 Feb 2016 00:52:00 +0000 (17:52 -0700)]
coresight: etb10: implementing AUX API

Adding an ETB10 specific AUX area operations to be used
by the perf framework when events are initialised.

Part of this operation involves modeling the mmap'ed area
based on the specific ways a sink buffer gathers information.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 2997aa4063d97fdb39450c6078bd81a7b0504f22)

8 years agocoresight: etb10: adding operation mode for sink->enable()
Mathieu Poirier [Thu, 18 Feb 2016 00:51:59 +0000 (17:51 -0700)]
coresight: etb10: adding operation mode for sink->enable()

Adding an operation mode to the sink->enable() API in order
to prevent simultaneous access from different callers.

TPIU and TMC won't be supplemented with the AUX area
API immediately and as such ignore the new mode.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit e827d4550aa3225b8965ce4c266208cfe0297509)

8 years agocoresight: etb10: moving to local atomic operations
Mathieu Poirier [Thu, 18 Feb 2016 00:51:58 +0000 (17:51 -0700)]
coresight: etb10: moving to local atomic operations

Moving to use local atomic operations to take advantage of the
lockless implementation, something that will come handy when
the ETB is accessed from the Perf subsystem. Also changing the
name of the variable to something more meaningful.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 27b10da8fff27d74b755707e61637f6ab488c617)

8 years agocoresight: etm3x: implementing perf_enable/disable() API
Mathieu Poirier [Thu, 18 Feb 2016 00:51:57 +0000 (17:51 -0700)]
coresight: etm3x: implementing perf_enable/disable() API

That way traces can be enabled and disabled automatically
from the Perf subystem using the PMU abstraction.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 882d5e112491c875ab7c8c336b8beaeec54d0509)

8 years agocoresight: etm3x: implementing user/kernel mode tracing
Mathieu Poirier [Thu, 18 Feb 2016 00:51:56 +0000 (17:51 -0700)]
coresight: etm3x: implementing user/kernel mode tracing

Adding new mode to limit tracing to kernel or user space.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 2127154d115d4fe8f18300e5ef6f566581359d56)

8 years agocoresight: etm3x: consolidating initial config
Mathieu Poirier [Thu, 18 Feb 2016 00:51:55 +0000 (17:51 -0700)]
coresight: etm3x: consolidating initial config

There is really no point in having two functions to take care
of doing the initial tracer configuration.  As such moving
everything to 'etm_set_default()'.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit c528a25ac7c4dacba9e4d98d5f06846939c5966f)

8 years agocoresight: etm3x: changing default trace configuration
Mathieu Poirier [Thu, 18 Feb 2016 00:51:54 +0000 (17:51 -0700)]
coresight: etm3x: changing default trace configuration

Changing default configuration to include the entire address
range rather than just the kernel.  That way traces are more
inclusive and it is easier to narrow down if needed.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit e19217299caf1a54c55081ab6339b3baccec63b0)

8 years agocoresight: etm3x: set progbit to stop trace collection
Mathieu Poirier [Thu, 18 Feb 2016 00:51:53 +0000 (17:51 -0700)]
coresight: etm3x: set progbit to stop trace collection

There is no need to use the event enable's "always false" event to
stop trace collection.  For that purpose setting the programming bit
(ETMCR:10) is enough.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 47cd066cd00a65902ee3bd57da5bd395cb83aff9)

8 years agocoresight: etm3x: adding operation mode for etm_enable()
Mathieu Poirier [Thu, 18 Feb 2016 00:51:52 +0000 (17:51 -0700)]
coresight: etm3x: adding operation mode for etm_enable()

Adding a new mode to source API enable() in order to
distinguish where the request comes from.  That way it is
possible to perform different operations based on where
the request was issued from.

The ETM4x driver is also modified to keep in sync with the
new interface.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 22fd532eaa0c24d86e23d8e9e3b7feac4a8cac80)

8 years agocoresight: etm3x: splitting struct etm_drvdata
Mathieu Poirier [Thu, 18 Feb 2016 00:51:51 +0000 (17:51 -0700)]
coresight: etm3x: splitting struct etm_drvdata

Splitting "etm_drvdata" in two sections, one for the HW specific
data and another for user configuration.

That way it is easier to manipulate and zero out the configuration
data when more than one concurrent tracing session configuration
is active.

Also taking care of up-lifting all the code affected by this new
arrangement.  No loss or gain of functionality (other than what is
mentioned above) is introduced by this patch.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 1925a470ce69cdfa2b82ac1565d58dfd39cd877d)

8 years agocoresight: etm3x: unlocking tracers in default arch init
Mathieu Poirier [Thu, 18 Feb 2016 00:51:50 +0000 (17:51 -0700)]
coresight: etm3x: unlocking tracers in default arch init

Calling function 'smp_call_function_single()' to unlock a
tracer and calling it again right after to perform the
default initialisation doesn't make sense.

Moving 'etm_os_unlock()' just before making the default
initialisation results in the same outcome while saving
one call to 'smp_call_function_single()'.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit ae69a1da399fccaed406932f5cbee55a6f9d4425)

8 years agocoresight: etm3x: moving sysFS entries to dedicated file
Mathieu Poirier [Thu, 18 Feb 2016 00:51:49 +0000 (17:51 -0700)]
coresight: etm3x: moving sysFS entries to dedicated file

SysFS entries are big enough to justify their own file.
As such moving all sysFS related declarations to a dedicated
location.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit c04148e708c0d8d7eabc447946b712a66b468b47)

8 years agocoresight: etm3x: moving etm_readl/writel to header file
Mathieu Poirier [Thu, 18 Feb 2016 00:51:48 +0000 (17:51 -0700)]
coresight: etm3x: moving etm_readl/writel to header file

Moving functions etm_readl/writel to file "coresight-etm.h"
so that the main ETM3x driver can be split in more than one
file.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit c1f8e57c9e6692f6e8c6c1f9eab7a46264ac4245)

8 years agocoresight: moving PM runtime operations to core framework
Mathieu Poirier [Thu, 18 Feb 2016 00:51:47 +0000 (17:51 -0700)]
coresight: moving PM runtime operations to core framework

Moving PM runtime operations in Coresight devices enable() and
disable() API to the framework core when a path is setup.  That
way the runtime core doesn't have to be involved everytime a
path is enabled.  It also avoids calling runtime PM operations
in IRQ context.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 5da5325fa85658ee793792b5285dd5fdb76ccfb7)

8 years agocoresight: add API to get sink from path
Mathieu Poirier [Thu, 18 Feb 2016 00:51:46 +0000 (17:51 -0700)]
coresight: add API to get sink from path

Add an API allowing external code to quickly get a handle on the
sink within a path.  The sink is always last, but adding an API allows
to keep the path's node structure private and remove redundant checks.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit b6404e21f023e4aa208a0ba03d55a9c8a57cb940)

8 years agocoresight: associating path with session rather than tracer
Mathieu Poirier [Thu, 18 Feb 2016 00:51:45 +0000 (17:51 -0700)]
coresight: associating path with session rather than tracer

When using the Coresight framework from the sysFS interface a
tracer is always handling a single session and as such, a path
can be associated with a tracer.  But when supporting multiple
session per tracer there is no guarantee that sessions will always
have the same path from source to sink.

This patch is removing the automatic association between path and
tracers.  The building of a path and enablement of the components
in the path are decoupled, allowing for the association of a path
with a session rather than a tracer.

To keep backward functionality with the current sysFS access methods
a per-cpu place holder is used to keep a handle on the path built when
tracers are enabled.  Lastly APIs to build paths and enable tracers are
made public so that other subsystem can interact with the Coresight
framework.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit b3e94405941e6916d5e365454d74560c2bea47ca)

8 years agocoresight: etm4x: Check every parameter used by dma_xx_coherent.
Eric Long [Thu, 18 Feb 2016 00:51:44 +0000 (17:51 -0700)]
coresight: etm4x: Check every parameter used by dma_xx_coherent.

The dma_alloc_coherent return an "void *" not an "void __iomen *".
It uses the wrong parameters when calls dma_free_coherent function.

The sparse tool output logs as the following:
coresight-tmc.c:199:23:    expected void *<noident>
coresight-tmc.c:199:23:    got void [noderef] <asn:2>*vaddr
coresight-tmc.c:336:30: warning: incorrect type in assignment
(different address spaces)
coresight-tmc.c:336:30:    expected char *buf
coresight-tmc.c:336:30:    got void [noderef] <asn:2>*
coresight-tmc.c:769:50: warning: incorrect type in argument 4
(different base types)
coresight-tmc.c:769:50:    expected unsigned long long
[unsigned] [usertype] dma_handle
coresight-tmc.c:769:50:    got restricted gfp_t

Signed-off-by: Eric Long <eric.long@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 61390593f72377c3a8f41ef998462e2d3985adac)

8 years agocoresight: "DEVICE_ATTR_RO" should defined as static.
Eric Long [Thu, 18 Feb 2016 00:51:43 +0000 (17:51 -0700)]
coresight: "DEVICE_ATTR_RO" should defined as static.

"DEVICE_ATTR_RO(name)" should be defined as static. And
there is an unnecessary space at the front of the code.

The sparse tool output logs as the following:
coresight-etm4x.c:2224:1: warning: symbol 'dev_attr_trcoslsr' was
not declared. Should it be static?
coresight-etm4x.c:2225:1: warning: symbol 'dev_attr_trcpdcr' was
not declared. Should it be static?
coresight-etm4x.c:2226:1: warning: symbol 'dev_attr_trcpdsr' was
not declared. Should it be static?
And the smatch tool output logs as the following:
of_coresight.c:89 of_coresight_alloc_memory() warn:
inconsistent indenting

Signed-off-by: Eric Long <eric.long@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit bf16e5b8cdeabc1fe6565af0be475bb2084dc388)

8 years agocoresight: implementing 'cpu_id()' API
Mathieu Poirier [Tue, 2 Feb 2016 21:14:01 +0000 (14:14 -0700)]
coresight: implementing 'cpu_id()' API

Other than plainly parsing the device tree there is no way to
know which CPU a tracer is affined to.  As such adding an
interface to lookup the CPU field enclosed in the etm_drvdata
structure that was initialised at boot time.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit 52210c8745e418f82f3f0aeeee01d7bc4858812a)

8 years agocoresight: removing bind/unbind options from sysfs
Mathieu Poirier [Tue, 2 Feb 2016 21:14:00 +0000 (14:14 -0700)]
coresight: removing bind/unbind options from sysfs

The coresight drivers have absolutely no control over bind and unbind
operations triggered from sysfs. The operations simply can't be
cancelled or denied event when one or several tracing sessions are
under way.  Since the memory associated to individual device is
invariably freed, the end result is a kernel crash when the path from
source to sink is travelled again as demonstrated here[1].

One solution could be to keep track of all the path (i.e tracing
session) that get created and iterate through the elements of those path
looking for the coresight device that is being removed.  This proposition
doesn't scale well since there is no upper bound on the amount of
concurrent trace session that can be created.

With the above in mind, this patch prevent devices from being unbounded
from their driver by using the driver->suppress_bind_attr option.  That way
trace sessions can be managed without fearing to loose devices.

Since device can't be removed anymore the xyz_remove() functions found in
each driver is also removed.

[1]. http://www.spinics.net/lists/arm-kernel/msg474952.html

Reported-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit b15f0fb657e040401d875d11ae13b269af8a16e0)

8 years agocoresight: remove csdev's link from topology
Mathieu Poirier [Tue, 2 Feb 2016 21:13:59 +0000 (14:13 -0700)]
coresight: remove csdev's link from topology

In function 'coresight_unregister()', all references to the csdev that
is being taken away need to be removed from the topology.  Otherwise
building the next coresight path from source to sink may use memory
that has been released.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit ad725aee070caf8fa93d84d6fb78321f9642db18)

8 years agocoresight: release reference taken by 'bus_find_device()'
Mathieu Poirier [Tue, 2 Feb 2016 21:13:58 +0000 (14:13 -0700)]
coresight: release reference taken by 'bus_find_device()'

The reference count taken by function bus_find_device() needs
to be released if a child device is found, something this patch
is adding.

Reported-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit f2dfab3568fc32afeac8b698481e80e7ab2dc658)