oota-llvm.git
9 years agoDebugInfoFinder: Check for null imported entities
Duncan P. N. Exon Smith [Fri, 20 Mar 2015 19:13:53 +0000 (19:13 +0000)]
DebugInfoFinder: Check for null imported entities

Don't use the accessors in `DIImportedEntity` on a null pointer.  (A WIP
patch to make `DIDescriptor` accessors more strict crashes here
otherwise.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232833 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSanitizerCoverage: Check for null DebugLocs
Duncan P. N. Exon Smith [Fri, 20 Mar 2015 18:48:45 +0000 (18:48 +0000)]
SanitizerCoverage: Check for null DebugLocs

After a WIP patch to make `DIDescriptor` accessors more strict, this
started asserting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232832 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSelectionDAGBuilder: Rangeify a loop. NFC.
Hans Wennborg [Fri, 20 Mar 2015 18:48:40 +0000 (18:48 +0000)]
SelectionDAGBuilder: Rangeify a loop. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232831 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSelectionDAGBuilder::handleJTSwitchCase, simplify loop; NFC
Hans Wennborg [Fri, 20 Mar 2015 18:48:31 +0000 (18:48 +0000)]
SelectionDAGBuilder::handleJTSwitchCase, simplify loop; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232830 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRewrite test/Feature/md_on_instruction.ll
Duncan P. N. Exon Smith [Fri, 20 Mar 2015 18:34:53 +0000 (18:34 +0000)]
Rewrite test/Feature/md_on_instruction.ll

This test is supposed to be testing whether metadata attachments to
instructions work, but it was using invalid debug info to do so.  (This
was causing assertion failures in the `DebugInfoFinder` with a WIP patch
to be more strict about `DIDescriptor` accessors.)

Rather than fix the debug info -- which is better tested elsewhere --
just test the IR feature directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232828 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoCorrectly estimate SROA savings for store operands in inline cost analysis.
Wei Mi [Fri, 20 Mar 2015 18:33:12 +0000 (18:33 +0000)]
Correctly estimate SROA savings for store operands in inline cost analysis.

When estimating SROA savings, we want to see if an address is derived
off an alloca in the caller. For store instructions, operand 1 is the
address operand, but the current code uses operand 0.  Use
getPointerOperand for loads and stores to fix this.

Patch by Easwaran Raman.
http://reviews.llvm.org/D8425

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232827 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSmall optimization to avoid getting pass info when we will not run loop
Daniel Berlin [Fri, 20 Mar 2015 18:05:49 +0000 (18:05 +0000)]
Small optimization to avoid getting pass info when we will not run loop

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232826 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM] Fix handling of thumb1 out-of-range frame offsets
John Brawn [Fri, 20 Mar 2015 17:20:07 +0000 (17:20 +0000)]
[ARM] Fix handling of thumb1 out-of-range frame offsets

LocalStackSlotPass assumes that isFrameOffsetLegal doesn't change its
answer when the base register changes. Unfortunately this isn't true
in thumb1, where SP-based loads allow a larger offset than
non-SP-based loads, and this causes the base register reuse code to
generate instructions that are unencodable, causing an assertion
failure.

Solve this by adding a BaseReg parameter to isFrameOffsetLegal, which
ARMBaseRegisterInfo can then make use of to give the correct answer.

Differential Revision: http://reviews.llvm.org/D8419

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232825 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoStripped trailing whitespace. NFC.
Simon Pilgrim [Fri, 20 Mar 2015 16:08:17 +0000 (16:08 +0000)]
Stripped trailing whitespace. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232822 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRewrite StackMap location handling to pre-compute the dwarf register
Eric Christopher [Fri, 20 Mar 2015 16:03:42 +0000 (16:03 +0000)]
Rewrite StackMap location handling to pre-compute the dwarf register
numbers before emission.

This removes a dependency on being able to access TRI at the module
level and is similar to the DwarfExpression handling. I've modified
the debug support into print/dump routines that'll do the same dumping
but is now callable anywhere and if TRI isn't available will go ahead
and just print out raw register numbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232821 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAt the beginning of doFinalization set the MachineFunction to
Eric Christopher [Fri, 20 Mar 2015 16:03:39 +0000 (16:03 +0000)]
At the beginning of doFinalization set the MachineFunction to
nullptr so that users get an earlier dereferencing error and
so that we can use it to conditionalize access to MachineFunction
specific data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232820 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTypo.
Chad Rosier [Fri, 20 Mar 2015 15:45:14 +0000 (15:45 +0000)]
Typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232819 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Refactor VOP2 instruction defs
Tom Stellard [Fri, 20 Mar 2015 15:14:23 +0000 (15:14 +0000)]
R600/SI: Refactor VOP2 instruction defs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232817 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Refactor VOP1 instruction defs
Tom Stellard [Fri, 20 Mar 2015 15:14:21 +0000 (15:14 +0000)]
R600/SI: Refactor VOP1 instruction defs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232816 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReduce indentation after return. NFC.
Rafael Espindola [Fri, 20 Mar 2015 14:33:25 +0000 (14:33 +0000)]
Reduce indentation after return. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232814 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse early returns. NFC.
Rafael Espindola [Fri, 20 Mar 2015 14:23:46 +0000 (14:23 +0000)]
Use early returns. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232813 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFold a llvm_unreachable into an assert. NFC.
Rafael Espindola [Fri, 20 Mar 2015 13:50:15 +0000 (13:50 +0000)]
Fold a llvm_unreachable into an assert. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232811 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoclang-format a function. NFC.
Rafael Espindola [Fri, 20 Mar 2015 13:47:40 +0000 (13:47 +0000)]
clang-format a function. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232810 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[MBP] Don't outline short optional branches
Daniel Jasper [Fri, 20 Mar 2015 10:00:37 +0000 (10:00 +0000)]
[MBP] Don't outline short optional branches

With the option -outline-optional-branches, LLVM will place optional
branches out of line (more details on r231230).

With this patch, this is not done for short optional branches. A short
optional branch is a branch containing a single block with an
instruction count below a certain threshold (defaulting to 3). Still
everything is guarded under -outline-optional-branches).

Outlining a short branch can't significantly improve code locality. It
can however decrease performance because of the additional jmp and in
cases where the optional branch is hot. This fixes a compile time
regression I have observed in a benchmark.

Review: http://reviews.llvm.org/D8108

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232802 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Tablegen] Attempt to add support for patterns containing nodes with multiple results.
Craig Topper [Fri, 20 Mar 2015 05:09:06 +0000 (05:09 +0000)]
[Tablegen] Attempt to add support for patterns containing nodes with multiple results.

This is needed for AVX512 masked scatter/gather support.

The R600 change is necessary to remove a hack that was working around the lack of multiple results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232798 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Add missing CHECK-LABEL lines to a test
Tom Stellard [Fri, 20 Mar 2015 03:12:42 +0000 (03:12 +0000)]
R600/SI: Add missing CHECK-LABEL lines to a test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232797 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix comment from r232794. NFC
Nick Lewycky [Fri, 20 Mar 2015 02:52:23 +0000 (02:52 +0000)]
Fix comment from r232794. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232796 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[bpf] fix build
Alexei Starovoitov [Fri, 20 Mar 2015 02:35:29 +0000 (02:35 +0000)]
[bpf] fix build

fix BPF backend build broken by r232699

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232795 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoWhen simplifying a SCEV truncate by distributing, consider it a simplification to...
Nick Lewycky [Fri, 20 Mar 2015 02:25:00 +0000 (02:25 +0000)]
When simplifying a SCEV truncate by distributing, consider it a simplification to replace a cast, even if we end up with a trunc around the term. Fixes PR22960!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232794 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSampleProfile: Check for missing debug locations
Duncan P. N. Exon Smith [Fri, 20 Mar 2015 00:56:55 +0000 (00:56 +0000)]
SampleProfile: Check for missing debug locations

Don't use `DebugLoc` accessors if we're pointing at null, which will be
a problem after a WIP patch to make the `DIDescriptor` accessors more
strict.  Caught by Frontend/profile-sample-use-loc-tracking.c (in
clang).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232792 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoVerifier: Remove the separate DebugInfoVerifier class
Duncan P. N. Exon Smith [Fri, 20 Mar 2015 00:48:23 +0000 (00:48 +0000)]
Verifier: Remove the separate DebugInfoVerifier class

Remove the separate `DebugInfoVerifier` class, as a partial step toward
better integrating debug info verification with the `Verifier`.

Right now, verification of debug info is kind of a mess.

  - There are `DIDescriptor::Verify()` checks live in `DebugInfo.cpp`.
    These return `bool`, and there's no way to see (except by opening a
    debugger) why they fail.
  - We rely on `DebugInfoFinder` to traverse the debug info graph and
    dig up nodes.  However, the regular `Verifier` visits many of these
    nodes when it calls into debug info intrinsic operands.  Visiting
    twice and running different checks is kind of absurd.
  - Moreover, `DebugInfoFinder` asserts on failed type resolution -- the
    verifier should never assert!

By integrating the two verifiers, I'm aiming at solving these problems
(work to be done, obviously).  Verification can be localized to the
`Verifier`; we can use a naive `MDNode` operand traversal to find all
the nodes; we can verify type references instead of asserting on
failure.

There are `assert()`s sprinkled throughout the optimizer and dwarf
backend on `DIDescriptor::Verify()` checks.  This is a hangover from
when the debug info verifier was off, so I plan to remove them as I go
(once I confirm that the checks are done at verification time).

Note: to keep the behaviour of only running the debug info verifier when
-verify succeeds, I've added an `EverBroken` flag.  Once the
`DebugInfoFinder` assertions are gone and the two traversals have been
merged, I expect to be able to remove this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232790 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRewrite SelectionDAGBuilder::Clusterify to run in linear time. NFC.
Hans Wennborg [Fri, 20 Mar 2015 00:41:03 +0000 (00:41 +0000)]
Rewrite SelectionDAGBuilder::Clusterify to run in linear time. NFC.

It was previously repeatedly erasing elements from the middle of a vector,
causing O(n^2) worst-case run-time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232789 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agotest: Make a start on a test suite for libLTO.
Peter Collingbourne [Thu, 19 Mar 2015 23:55:38 +0000 (23:55 +0000)]
test: Make a start on a test suite for libLTO.

This works in a similar way to the gold plugin tests. We search for a compatible
linker on $PATH and use it to run tests against our just-built libLTO. To start
with, test the just added opt level functionality.

Differential Revision: http://reviews.llvm.org/D8472

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232785 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse the cached subtarget on the MachineFunction when the AsmPrinter
Eric Christopher [Thu, 19 Mar 2015 23:27:42 +0000 (23:27 +0000)]
Use the cached subtarget on the MachineFunction when the AsmPrinter
will have a MachineFunction, i.e. in places other than the module
level doInitialize/doFinalize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232783 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse the cached subtarget off of the machine function.
Eric Christopher [Thu, 19 Mar 2015 23:06:21 +0000 (23:06 +0000)]
Use the cached subtarget off of the machine function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232782 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agomove insert, extract, concat helper functions closer to related helper functions...
Sanjay Patel [Thu, 19 Mar 2015 23:04:25 +0000 (23:04 +0000)]
move insert, extract, concat helper functions closer to related helper functions; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232781 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix a nasty bug in DAGCombine of STORE nodes.
Owen Anderson [Thu, 19 Mar 2015 22:48:57 +0000 (22:48 +0000)]
Fix a nasty bug in DAGCombine of STORE nodes.

This is very related to the bug fixed in r174431.  The problem is that
SelectionDAG does not include alignment in the uniquing of loads and
stores.  When an otherwise no-op DAGCombine would increase the alignment
of a load or store, the original node would be returned (with the
alignment increased), which would cause the node not to be processed by
any further DAGCombines.

I don't have a direct testcase for this that manifests on an in-tree
target, but I did see some noise in the tests for other targets and have
updated them for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232780 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove unused headers.
Eric Christopher [Thu, 19 Mar 2015 22:36:38 +0000 (22:36 +0000)]
Remove unused headers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232777 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd an MCSubtargetInfo variable to the TargetMachine.
Eric Christopher [Thu, 19 Mar 2015 22:36:37 +0000 (22:36 +0000)]
Add an MCSubtargetInfo variable to the TargetMachine.

This enables us to remove calls to the subtarget from the TargetMachine
and with a small hack for backends that require global subtarget
information for module level code generation, e.g. mips abi flags, as
mentioned in a fixme in the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232776 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a TargetMachine local MCRegisterInfo and MCInstrInfo so that
Eric Christopher [Thu, 19 Mar 2015 22:36:32 +0000 (22:36 +0000)]
Add a TargetMachine local MCRegisterInfo and MCInstrInfo so that
they can be used without a subtarget in constructing subtarget
independent passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232775 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoWinEH: Make llvm.eh.actions emission match the EH docs
Reid Kleckner [Thu, 19 Mar 2015 22:31:02 +0000 (22:31 +0000)]
WinEH: Make llvm.eh.actions emission match the EH docs

This switches the sense of the i32 values and updates the test cases.

We can also use CHECK-SAME to clean up some tests, and reduce the visual
noise from bitcasts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232774 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86, AVX] use blends instead of insert128 with index 0
Sanjay Patel [Thu, 19 Mar 2015 22:29:40 +0000 (22:29 +0000)]
[X86, AVX] use blends instead of insert128 with index 0

Another case of x86-specific shuffle strength reduction:
avoid generating insert*128 instructions with index 0 because
they are slower than their non-lane-changing blend equivalents.

Shuffle lowering already catches most of these cases, but
the zero vector case and some other paths such as in the
modified test in vector-shuffle-256-v32.ll were getting
through.

Differential Revision: http://reviews.llvm.org/D8366

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232773 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoVerifier: Remove the separate -verify-di pass
Duncan P. N. Exon Smith [Thu, 19 Mar 2015 22:24:17 +0000 (22:24 +0000)]
Verifier: Remove the separate -verify-di pass

Remove `DebugInfoVerifierLegacyPass` and the `-verify-di` pass.
Instead, call into the `DebugInfoVerifier` from inside
`VerifierLegacyPass::finalizeModule()`.  This better matches the logic
in `verifyModule()` (used by the new PassManager), avoids requiring two
separate passes to verify the IR, and makes the API for "add a pass to
verify the IR" simple.

Note: the `-verify-debug-info` flag still works (for now, at least;
eventually it might make sense to just remove it).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232772 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix build failure.
Peter Collingbourne [Thu, 19 Mar 2015 22:12:08 +0000 (22:12 +0000)]
Fix build failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232771 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLowerBitSets: Avoid reusing byte set addresses.
Peter Collingbourne [Thu, 19 Mar 2015 22:02:10 +0000 (22:02 +0000)]
LowerBitSets: Avoid reusing byte set addresses.

Each use of the byte array uses a different alias. This makes the
backend less likely to reuse previously computed byte array addresses,
improving the security of the CFI mechanism based on this pass.

Differential Revision: http://reviews.llvm.org/D8455

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232770 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agolibLTO, llvm-lto, gold: Introduce flag for controlling optimization level.
Peter Collingbourne [Thu, 19 Mar 2015 22:01:00 +0000 (22:01 +0000)]
libLTO, llvm-lto, gold: Introduce flag for controlling optimization level.

This change also introduces a link-time optimization level of 1. This
optimization level runs only the globaldce pass as well as cleanup passes for
passes that run at -O0, specifically simplifycfg which cleans up lowerbitsets.

http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20150316/266951.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232769 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPassManagerBuilder: Remove effectively dead 'StripDebug' option
Duncan P. N. Exon Smith [Thu, 19 Mar 2015 21:37:17 +0000 (21:37 +0000)]
PassManagerBuilder: Remove effectively dead 'StripDebug' option

`StripDebug` was only used by tools/opt/opt.cpp in
`AddStandardLinkPasses()`, but opt.cpp adds the same pass based on its
command-line flag before it calls `AddStandardLinkPasses()`.  Stripping
debug info twice isn't very useful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232765 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSwitch lowering: extract NextBlock function. NFC.
Hans Wennborg [Thu, 19 Mar 2015 20:41:48 +0000 (20:41 +0000)]
Switch lowering: extract NextBlock function. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232759 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUnxfail test/CodeGen/Generic/vector.ll now passing on Hexagon
Krzysztof Parzyszek [Thu, 19 Mar 2015 20:22:17 +0000 (20:22 +0000)]
Unxfail test/CodeGen/Generic/vector.ll now passing on Hexagon

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232758 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agogold: Make powerpc support optional for the tests.
Peter Collingbourne [Thu, 19 Mar 2015 18:23:31 +0000 (18:23 +0000)]
gold: Make powerpc support optional for the tests.

Differential Revision: http://reviews.llvm.org/D8400

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232744 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoGlobalDCE: Improve performance for large modules containing comdats.
Peter Collingbourne [Thu, 19 Mar 2015 18:23:29 +0000 (18:23 +0000)]
GlobalDCE: Improve performance for large modules containing comdats.

When we encounter a global with a comdat, rather than iterating over
every global in the module to find globals in the same comdat, store the
members in a multimap. This effectively lowers the complexity to O(N log N),
improving performance significantly for large modules such as might be
encountered during LTO.

It looks like we used to do something like this until r219191.

No functional change.

Differential Revision: http://reviews.llvm.org/D8431

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232743 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agodocs: Update llvm-cov docs for the -use-color flag
Justin Bogner [Thu, 19 Mar 2015 18:22:46 +0000 (18:22 +0000)]
docs: Update llvm-cov docs for the -use-color flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232742 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd support for __nvvm_reflect changes in libdevice in CUDA-7.0
Artem Belevich [Thu, 19 Mar 2015 17:05:35 +0000 (17:05 +0000)]
Add support for __nvvm_reflect changes in libdevice in CUDA-7.0

Summary:
CUDA 7.0's libdevice uses slightly different IR to call __nvvm_reflect
and that triggers an assertion in nvvm_reflect optimization pass. This
change allows nvvm_reflect pass to deal with both old and new ways to
pass an argument to __nvvm_reflect.

Test Plan: ninja check-all

Reviewers: eliben, echristo

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8399

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232732 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixing dependencies for native tablegen.
Chris Bieneman [Thu, 19 Mar 2015 16:49:44 +0000 (16:49 +0000)]
Fixing dependencies for native tablegen.

The dependencies for cross-built tablegen were a bit confused. This fixes that. The following dependencies are now enforced:

(1) Tablegen tasks depend on the native tablegen
(2) Native tablegen depends on the cross-compiled tablegen

Although the native tablegen doesn't actually require the cross tablegen, having this dependency forces the native tablegen to rebuild whenever the cross tablegen changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232730 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSwitch lowering: remove unnecessary ConstantInt casts. NFC.
Hans Wennborg [Thu, 19 Mar 2015 16:42:21 +0000 (16:42 +0000)]
Switch lowering: remove unnecessary ConstantInt casts. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232729 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Add support for vector instructions
Krzysztof Parzyszek [Thu, 19 Mar 2015 16:33:08 +0000 (16:33 +0000)]
[Hexagon] Add support for vector instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232728 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[CMake] Don't pass in MSVC warning flags as definitions.
Greg Bedwell [Thu, 19 Mar 2015 16:32:47 +0000 (16:32 +0000)]
[CMake] Don't pass in MSVC warning flags as definitions.

NFC currently but required as a prerequisite for using
the Microsoft resource compiler in conjunction with
CMake's ninja generator, which knows how to filter flags
appropriately, but not definitions.

Differential Revision: http://reviews.llvm.org/D8188

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232727 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] ENDLOOP is a non-reversible conditional branch
Krzysztof Parzyszek [Thu, 19 Mar 2015 15:18:57 +0000 (15:18 +0000)]
[Hexagon] ENDLOOP is a non-reversible conditional branch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232725 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoInternalize PEI. NFC.
Benjamin Kramer [Thu, 19 Mar 2015 14:09:20 +0000 (14:09 +0000)]
Internalize PEI. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232722 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[sparc] Small fix to r232719 to make 2007-12-17-InvokeAsm.ll pass on the buildbot.
Daniel Sanders [Thu, 19 Mar 2015 11:27:23 +0000 (11:27 +0000)]
[sparc] Small fix to r232719 to make 2007-12-17-InvokeAsm.ll pass on the buildbot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232720 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[sparc] Only support the 'm' inline assembly memory constraint. NFC.
Daniel Sanders [Thu, 19 Mar 2015 11:26:05 +0000 (11:26 +0000)]
[sparc] Only support the 'm' inline assembly memory constraint. NFC.

Summary:
SPARC doesn't seem to support any additional constraints. Therefore remove
the target hook.

No functional change intended.

Reviewers: venkatra

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8214

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232719 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[InstCombine] Don't fold a GEP into itself through a PHI node
Daniel Jasper [Thu, 19 Mar 2015 11:05:08 +0000 (11:05 +0000)]
[InstCombine] Don't fold a GEP into itself through a PHI node

This can only occur (I think) through the back-edge of the loop.

However, folding a GEP into itself means that the value of the previous
iteration needs to be stored in the meantime, thus requiring an
additional register variable to be live, but not actually achieving
anything (the gep still needs to be executed once per loop iteration).

The attached test case is derived from:
  typedef unsigned uint32;
  typedef unsigned char uint8;
  inline uint8 *f(uint32 value, uint8 *target) {
    while (value >= 0x80) {
      value >>= 7;
      ++target;
    }
    ++target;
    return target;
  }
  uint8 *g(uint32 b, uint8 *target) {
    target = f(b, f(42, target));
    return target;
  }

What happens is that the GEP stored in incptr2 is folded into itself
through the loop's back-edge and the phi-node stored in loopptr,
effectively incrementing the ptr by "2" in each iteration instead of "1".

In this case, it is actually increasing the number of GEPs required as
the GEP before the loop can't be folded away anymore. For comparison:

With this patch:
  define i8* @test4(i32 %value, i8* %buffer) {
  entry:
    %cmp = icmp ugt i32 %value, 127
    br i1 %cmp, label %loop.header, label %exit

  loop.header:                                      ; preds = %entry
    br label %loop.body

  loop.body:                                        ; preds = %loop.body, %loop.header
    %buffer.pn = phi i8* [ %buffer, %loop.header ], [ %loopptr, %loop.body ]
    %newval = phi i32 [ %value, %loop.header ], [ %shr, %loop.body ]
    %loopptr = getelementptr inbounds i8, i8* %buffer.pn, i64 1
    %shr = lshr i32 %newval, 7
    %cmp2 = icmp ugt i32 %newval, 16383
    br i1 %cmp2, label %loop.body, label %loop.exit

  loop.exit:                                        ; preds = %loop.body
    br label %exit

  exit:                                             ; preds = %loop.exit, %entry
    %0 = phi i8* [ %loopptr, %loop.exit ], [ %buffer, %entry ]
    %incptr3 = getelementptr inbounds i8, i8* %0, i64 2
    ret i8* %incptr3
  }

Without this patch:
  define i8* @test4(i32 %value, i8* %buffer) {
  entry:
    %incptr = getelementptr inbounds i8, i8* %buffer, i64 1
    %cmp = icmp ugt i32 %value, 127
    br i1 %cmp, label %loop.header, label %exit

  loop.header:                                      ; preds = %entry
    br label %loop.body

  loop.body:                                        ; preds = %loop.body, %loop.header
    %0 = phi i8* [ %buffer, %loop.header ], [ %loopptr, %loop.body ]
    %loopptr = phi i8* [ %incptr, %loop.header ], [ %incptr2, %loop.body ]
    %newval = phi i32 [ %value, %loop.header ], [ %shr, %loop.body ]
    %shr = lshr i32 %newval, 7
    %incptr2 = getelementptr inbounds i8, i8* %0, i64 2
    %cmp2 = icmp ugt i32 %newval, 16383
    br i1 %cmp2, label %loop.body, label %loop.exit

  loop.exit:                                        ; preds = %loop.body
    br label %exit

  exit:                                             ; preds = %loop.exit, %entry
    %ptr2 = phi i8* [ %incptr2, %loop.exit ], [ %incptr, %entry ]
    %incptr3 = getelementptr inbounds i8, i8* %ptr2, i64 1
    ret i8* %incptr3
  }

Review: http://reviews.llvm.org/D8245

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232718 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Rename -color={always|never} to -use-color[=0]
Justin Bogner [Thu, 19 Mar 2015 04:45:16 +0000 (04:45 +0000)]
llvm-cov: Rename -color={always|never} to -use-color[=0]

This is an ugly hack to fix the configure --enable-shared build. It
turns out that *every cl::opt in LLVM* shows up in *every tool* in
that configuration, which is hopelessly broken. This skirts around the
issue by not colliding with another option's name, for now.

I've also simplified the option implementation - the other "color"
option used cl::boolOrDefault and was much nicer than what I'd written
before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232704 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoNote that we don't support COFF on PPC.
Rafael Espindola [Thu, 19 Mar 2015 02:40:56 +0000 (02:40 +0000)]
Note that we don't support COFF on PPC.

Should bring back the windows bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232701 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Continue trying to appease a bot
Justin Bogner [Thu, 19 Mar 2015 02:00:54 +0000 (02:00 +0000)]
llvm-cov: Continue trying to appease a bot

This bot doesn't like me. I don't know why:

    http://lab.llvm.org:8011/builders/clang-hexagon-elf/builds/24425

Move the color option enum's definition out of the function that
creates the cl::opt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232700 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSplit the object streamer callback in one per file format.
Rafael Espindola [Thu, 19 Mar 2015 01:50:16 +0000 (01:50 +0000)]
Split the object streamer callback in one per file format.

There are two main advantages to doing this

* Targets that only need to handle one of the formats specially don't have
  to worry about the others. For example, x86 now only registers a
  constructor for the COFF streamer.

* Changes to the arguments passed to one format constructor will not impact
  the other formats.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232699 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Try to appease a bot
Justin Bogner [Thu, 19 Mar 2015 01:07:22 +0000 (01:07 +0000)]
llvm-cov: Try to appease a bot

The clang-hexagon elf bot was complaining that "Option 'color'
registered more than once!":

    http://lab.llvm.org:8011/builders/clang-hexagon-elf/builds/24425

I don't understand why this error is happening, and I don't see it on
any other bots or on my own machine, so I'm kind of grasping at
straws. Try using an unscoped enum and specifying a cl::init to see if
they help.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232698 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSelectionDAGBuilder: update comment in HandlePHINodesInSuccessorBlocks.
Hans Wennborg [Thu, 19 Mar 2015 00:57:51 +0000 (00:57 +0000)]
SelectionDAGBuilder: update comment in HandlePHINodesInSuccessorBlocks.

From what I can tell, the code is checking for PHIs that expect any value from
this block, not just constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232697 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDo not track subregister liveness when it brings no benefits
Matthias Braun [Thu, 19 Mar 2015 00:21:58 +0000 (00:21 +0000)]
Do not track subregister liveness when it brings no benefits

Some subregisters are only to indicate different access sizes, while not
providing any way to actually divide the register up into multiple
disjunct parts. Avoid tracking subregister liveness in these cases as it
is not beneficial.

Differential Revision: http://reviews.llvm.org/D8429

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232695 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Only emit colour by default if the output is a tty
Justin Bogner [Thu, 19 Mar 2015 00:02:23 +0000 (00:02 +0000)]
llvm-cov: Only emit colour by default if the output is a tty

This replaces the -no-color flag with a -color={auto|always|never}
option, with auto as the default, which is much saner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232693 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSelectionDAGIsel: Fix comment about terminators being "handled below".
Hans Wennborg [Thu, 19 Mar 2015 00:02:22 +0000 (00:02 +0000)]
SelectionDAGIsel: Fix comment about terminators being "handled below".

That changed in r102128.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232692 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[CodeGenPrepare] Remove broken, dead, code.
Quentin Colombet [Wed, 18 Mar 2015 23:17:28 +0000 (23:17 +0000)]
[CodeGenPrepare] Remove broken, dead, code.
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232690 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agotwo or more, use a for.
Rafael Espindola [Wed, 18 Mar 2015 23:15:49 +0000 (23:15 +0000)]
two or more, use a for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232688 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFixed failing test due to missing target triple causing different results on differen...
Simon Pilgrim [Wed, 18 Mar 2015 22:51:45 +0000 (22:51 +0000)]
Fixed failing test due to missing target triple causing different results on different buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232685 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTeach getDefaultFormat that we only support ELF on some architectures.
Rafael Espindola [Wed, 18 Mar 2015 22:19:16 +0000 (22:19 +0000)]
Teach getDefaultFormat that we only support ELF on some architectures.

This should bring the windows bots back.

It is a bit ugly, but it is better than what we had before: The triple would
say that the object format was COFF, but llc/llvm-mc would produce an ELF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232683 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86][SSE] Avoid scalarization of v2i64 vector shifts (REAPPLIED)
Simon Pilgrim [Wed, 18 Mar 2015 22:18:51 +0000 (22:18 +0000)]
[X86][SSE] Avoid scalarization of v2i64 vector shifts (REAPPLIED)

Fixed broken tests.

Differential Revision: http://reviews.llvm.org/D8416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232682 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PowerPC] Correct typo in PPCInstrAltivec.td
Bill Schmidt [Wed, 18 Mar 2015 22:13:03 +0000 (22:13 +0000)]
[PowerPC] Correct typo in PPCInstrAltivec.td

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232681 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUpdate 3.7 Release Note mentionning the non-optionality of the DataLayout
Mehdi Amini [Wed, 18 Mar 2015 22:01:44 +0000 (22:01 +0000)]
Update 3.7 Release Note mentionning the non-optionality of the DataLayout

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232677 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Generate targets for each lit suite."
Chris Bieneman [Wed, 18 Mar 2015 21:53:29 +0000 (21:53 +0000)]
Revert "Generate targets for each lit suite."

This change broke Polly. I'll track down the failure when I have a chance and re-apply the change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232676 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoGenerate targets for each lit suite.
Chris Bieneman [Wed, 18 Mar 2015 21:19:06 +0000 (21:19 +0000)]
Generate targets for each lit suite.

Summary:
This change makes CMake scan for lit suites and generate a target for each lit test suite. The targets follow the format check-<project>-<suite path>.

For example:
check-llvm-unit - Runs the LLVM unit tests
check-llvm-codegen-arm - Runs the ARM codeine tests

Note: These targets are not generated during multi-configuration generators (i.e. Xcode and Visual Studio) because target clutter impacts UI usability.

Reviewers: chandlerc

Subscribers: aemerson, llvm-commits

Differential Revision: http://reviews.llvm.org/D8380

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232671 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "[X86][SSE] Avoid scalarization of v2i64 vector shifts" as it
Eric Christopher [Wed, 18 Mar 2015 21:01:00 +0000 (21:01 +0000)]
Revert "[X86][SSE] Avoid scalarization of v2i64 vector shifts" as it
appears to have broken tests/bots.

This reverts commit r232660.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232670 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Add a TargetMachine local MCRegisterInfo and MCInstrInfo so that"
Eric Christopher [Wed, 18 Mar 2015 20:41:44 +0000 (20:41 +0000)]
Revert "Add a TargetMachine local MCRegisterInfo and MCInstrInfo so that"
Committed too early.

This reverts commit r232666.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232667 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a TargetMachine local MCRegisterInfo and MCInstrInfo so that
Eric Christopher [Wed, 18 Mar 2015 20:37:36 +0000 (20:37 +0000)]
Add a TargetMachine local MCRegisterInfo and MCInstrInfo so that
they can be used without a subtarget in constructing subtarget
independent passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232666 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Migrate the AArch64 TargetRegisterInfo to its TargetMachine"
Eric Christopher [Wed, 18 Mar 2015 20:37:30 +0000 (20:37 +0000)]
Revert "Migrate the AArch64 TargetRegisterInfo to its TargetMachine"
as we don't necessarily need to do this yet - though we could move
the base class to the TargetMachine as it isn't subtarget dependent.

This reverts commit r232103.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232665 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse WinEHPrepare to outline SEH finally blocks
Reid Kleckner [Wed, 18 Mar 2015 20:26:53 +0000 (20:26 +0000)]
Use WinEHPrepare to outline SEH finally blocks

No outlining is necessary for SEH catch blocks. Use the blockaddr of the
handler in place of the usual outlined function.

Reviewers: majnemer, andrew.w.kaylor

Differential Revision: http://reviews.llvm.org/D8370

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232664 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix cmake build.
Rafael Espindola [Wed, 18 Mar 2015 20:21:06 +0000 (20:21 +0000)]
Fix cmake build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232663 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoCMake: Disable ENABLE_EXPORTS for executables with MSVC
Reid Kleckner [Wed, 18 Mar 2015 20:09:13 +0000 (20:09 +0000)]
CMake: Disable ENABLE_EXPORTS for executables with MSVC

The MSVC linker won't produce a .lib file for an executable that doesn't
export anything, and LLVM doesn't maintain dllexport annotations or .def
files listing all C++ symbols. It also doesn't support exporting all
symbols, like binutils ld.

CMake 3.2 changed the Ninja generator to list both the .exe and .lib
files as outputs of executable build targets. Ninja would always re-link
executables with ENABLE_EXPORTS because the .lib output file was not
present, and therefore the target was out of date.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232662 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix use of uninitialized valued.
Rafael Espindola [Wed, 18 Mar 2015 19:49:29 +0000 (19:49 +0000)]
Fix use of uninitialized valued.

Should bring the bots back.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232661 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86][SSE] Avoid scalarization of v2i64 vector shifts
Simon Pilgrim [Wed, 18 Mar 2015 19:35:31 +0000 (19:35 +0000)]
[X86][SSE] Avoid scalarization of v2i64 vector shifts

Currently v2i64 vectors shifts (non-equal shift amounts) are scalarized, costing 4 x extract, 2 x x86-shifts and 2 x insert instructions - and it gets even more awkward on 32-bit targets.

This patch separately shifts the vector by both shift amounts and then shuffles the partial results back together, costing 2 x shuffles and 2 x sse-shifts instructions (+ 2 movs on pre-AVX hardware).

Note - this patch only improves the SHL / LSHR logical shifts as only these are supported in SSE hardware.

Differential Revision: http://reviews.llvm.org/D8416

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232660 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Objdump] DumpBytes of uint8_t from ArrayRef<uint8_t> instead of char from StringRef...
Colin LeMahieu [Wed, 18 Mar 2015 19:27:31 +0000 (19:27 +0000)]
[Objdump] DumpBytes of uint8_t from ArrayRef<uint8_t> instead of char from StringRef.  Removing reinterpret_casts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232659 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a default implementation of createObjectStreamer.
Rafael Espindola [Wed, 18 Mar 2015 19:08:20 +0000 (19:08 +0000)]
Add a default implementation of createObjectStreamer.

This removes duplicated code from backends that don't need to do anything
fancy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232658 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Use pseudo-instructions for true/false predicate values
Krzysztof Parzyszek [Wed, 18 Mar 2015 19:07:53 +0000 (19:07 +0000)]
[Hexagon] Use pseudo-instructions for true/false predicate values

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232657 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "[Hexagon] Use pseudo-instructions for true/false predicate values"
Krzysztof Parzyszek [Wed, 18 Mar 2015 18:50:06 +0000 (18:50 +0000)]
Revert "[Hexagon] Use pseudo-instructions for true/false predicate values"

This reverts r232650.

Missed a piece of code in the previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232656 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Objdump] Removing size limit on DumpBytes and changing to range based for loop.
Colin LeMahieu [Wed, 18 Mar 2015 18:41:23 +0000 (18:41 +0000)]
[Objdump] Removing size limit on DumpBytes and changing to range based for loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232654 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTableGen: Fix register class lane masks being too conservative.
Matthias Braun [Wed, 18 Mar 2015 17:56:09 +0000 (17:56 +0000)]
TableGen: Fix register class lane masks being too conservative.

When calculating the lanemask of a register class we have to include the
masks of subregisters supported by any of the class members, not just
the ones supported by all class members.

This fixes problems when coalescing towards a subclass with additional
subregisters available.

The attached testcase works fine as is, but does crash if you enable
subregister liveness on x86 without this change applied.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232652 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoHandle X86::reloc_riprel_4byte in 32 bits mode.
Rafael Espindola [Wed, 18 Mar 2015 17:33:40 +0000 (17:33 +0000)]
Handle X86::reloc_riprel_4byte in 32 bits mode.

We can get there with .code64.

Fixes pr22349.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232651 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Use pseudo-instructions for true/false predicate values
Krzysztof Parzyszek [Wed, 18 Mar 2015 17:20:51 +0000 (17:20 +0000)]
[Hexagon] Use pseudo-instructions for true/false predicate values

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232650 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse utils/update_llc_test_checks.py to update all CHECKs
Sanjay Patel [Wed, 18 Mar 2015 16:38:44 +0000 (16:38 +0000)]
Use utils/update_llc_test_checks.py to update all CHECKs

The checks here were so vague that we could nuke intrinsics
from existence and still pass the test because we'd match
the function name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232647 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Intrinsics for circular and bit-reversed loads and stores
Krzysztof Parzyszek [Wed, 18 Mar 2015 16:23:44 +0000 (16:23 +0000)]
[Hexagon] Intrinsics for circular and bit-reversed loads and stores

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232645 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agofixed to test features, not CPU model
Sanjay Patel [Wed, 18 Mar 2015 16:07:10 +0000 (16:07 +0000)]
fixed to test features, not CPU model

The 'vmovntdq' was only passing due to a fluke in
SandyBridge codegen that splits 32-byte stores in half,
but that meant that the test was not correctly checking
for the 32-byte store that we thought we were generating.

The lax checking in this file will be addressed in
another commit. There are bigger problems here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232644 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Handle ENDLOOP0 in InsertBranch and RemoveBranch
Krzysztof Parzyszek [Wed, 18 Mar 2015 15:56:43 +0000 (15:56 +0000)]
[Hexagon] Handle ENDLOOP0 in InsertBranch and RemoveBranch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232643 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd support for .ifnes psuedo-op.
Sid Manning [Wed, 18 Mar 2015 14:20:54 +0000 (14:20 +0000)]
Add support for .ifnes psuedo-op.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232636 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoclang-format these lines to fix Visual C++ warning.
Yaron Keren [Wed, 18 Mar 2015 12:50:00 +0000 (12:50 +0000)]
clang-format these lines to fix Visual C++ warning.

Visual C++ 2013 complains "warning C4138: '*/' found outside of comment"
about the code

 CallInst */*CI*/

but compiles OK. clang-formatting these lines adds an extra space and
makes Visual C++ satisfied.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232630 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoChange test to accept an additional critical edge split.
Daniel Jasper [Wed, 18 Mar 2015 12:45:45 +0000 (12:45 +0000)]
Change test to accept an additional critical edge split.

The two hot blocks are right next to each other and I verified that
there is no performance regression by compressing/uncompressing some
files with a minigzip built with the different options.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232629 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM] Align stack objects passed to memory intrinsics
John Brawn [Wed, 18 Mar 2015 12:01:59 +0000 (12:01 +0000)]
[ARM] Align stack objects passed to memory intrinsics

Memcpy, and other memory intrinsics, typically tries to use LDM/STM if
the source and target addresses are 4-byte aligned. In CodeGenPrepare
look for calls to memory intrinsics and, if the object is on the
stack, 4-byte align it if it's large enough that we expect that memcpy
would want to use LDM/STM to copy it.

Differential Revision: http://reviews.llvm.org/D7908

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232627 91177308-0d34-0410-b5e6-96231b3b80d8