Elena Demikhovsky [Tue, 14 Jan 2014 15:10:08 +0000 (15:10 +0000)]
AVX-512: optimized scalar compare patterns
removed AVX512SI format, since it is similar to AVX512BI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199217
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Patrik Hagglund [Tue, 14 Jan 2014 14:09:00 +0000 (14:09 +0000)]
Fix valgrind warning for gcc builds.
Sorry, I don't understand why the warning is generated (a gcc
bug?). Anyhow, the change should improve readablity. No functionality
change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199214
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Andrea Di Biagio [Tue, 14 Jan 2014 13:17:12 +0000 (13:17 +0000)]
[X86] Fix assertion failure caused by a wrong folding of vector shifts by immediate count.
This fixes a regression intruced by r198113.
Revision r198113 introduced an algorithm that tries to fold a vector shift
by immediate count into a build_vector if the input vector is a known vector
of constants.
However the algorithm only worked under the assumption that the input vector
type and the shift type are exactly the same.
This patch disables the folding of vector shift by immediate count if the
input vector type and the shift value type are not the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199213
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Tim Northover [Tue, 14 Jan 2014 13:05:47 +0000 (13:05 +0000)]
ARM: add constraint that RdLo != Rn != RdHi for v5 MLA insts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199212
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Tim Northover [Tue, 14 Jan 2014 13:05:42 +0000 (13:05 +0000)]
ARM: remove unused UMAALv5 node
It was incorrect anyway, since it didn't have accumulator inputs and wasn't
even supported on v5.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199211
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Nico Rieck [Tue, 14 Jan 2014 12:38:32 +0000 (12:38 +0000)]
Revert "Decouple dllexport/dllimport from linkage"
Revert this for now until I fix an issue in Clang with it.
This reverts commit r199204.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199207
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Nico Rieck [Tue, 14 Jan 2014 12:36:54 +0000 (12:36 +0000)]
Revert "Handle dllexport for global aliases"
This reverts commit r199205.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199206
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Nico Rieck [Tue, 14 Jan 2014 11:55:40 +0000 (11:55 +0000)]
Handle dllexport for global aliases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199205
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Nico Rieck [Tue, 14 Jan 2014 11:55:03 +0000 (11:55 +0000)]
Decouple dllexport/dllimport from linkage
Representing dllexport/dllimport as distinct linkage types prevents using
these attributes on templates and inline functions.
Instead of introducing further mixed linkage types to include linkonce and
weak ODR, the old import/export linkage types are replaced with a new
separate visibility-like specifier:
define available_externally dllimport void @f() {}
@Var = dllexport global i32 1, align 4
Linkage for dllexported globals and functions is now equal to their linkage
without dllexport. Imported globals and functions must be either
declarations with external linkage, or definitions with
AvailableExternallyLinkage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199204
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Nico Rieck [Tue, 14 Jan 2014 11:53:26 +0000 (11:53 +0000)]
Fix fastcall mangling of dllimported symbols
fastcall requires @ as global prefix instead of _ but getNameWithPrefix
wrongly assumes the OutName buffer is empty and replaces at index 0.
For imported functions this buffer is pre-filled with "__imp_" resulting
in broken "@_imp_foo@0" mangling.
Instead replace at the proper index. We also never have to prepend the
@-prefix because this fastcall mangling is only used on 32-bit Windows
targets which have _ has global prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199203
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NAKAMURA Takumi [Tue, 14 Jan 2014 09:40:18 +0000 (09:40 +0000)]
Revert r199191, "LTO: add API to set strategy for -internalize"
Please update also Other/link-opts.ll, in next time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199197
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Craig Topper [Tue, 14 Jan 2014 08:07:10 +0000 (08:07 +0000)]
Remove stray comma in enum to satisfy -Wpedantic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199194
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Craig Topper [Tue, 14 Jan 2014 07:41:20 +0000 (07:41 +0000)]
Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix and the current mode from the concept of SSE instructions using 0x66 prefix as part of their encoding without being affected by the mode.
This should allow SSE instructions to be encoded correctly in 16-bit mode which r198586 probably broke.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199193
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Duncan P. N. Exon Smith [Tue, 14 Jan 2014 06:37:26 +0000 (06:37 +0000)]
LTO: add API to set strategy for -internalize
Add API to LTOCodeGenerator to specify a strategy for the -internalize
pass.
This is a new attempt at Bill's change in r185882, which he reverted in
r188029 due to problems with the gold linker. This puts the onus on the
linker to decide whether (and what) to internalize.
In particular, running internalize before outputting an object file may
change a 'weak' symbol into an internal one, even though that symbol
could be needed by an external object file --- e.g., with arclite.
This patch enables three strategies:
- LTO_INTERNALIZE_FULL: the default (and the old behaviour).
- LTO_INTERNALIZE_NONE: skip -internalize.
- LTO_INTERNALIZE_HIDDEN: only -internalize symbols with hidden
visibility.
LTO_INTERNALIZE_FULL should be used when linking an executable.
Outputting an object file (e.g., via ld -r) is more complicated, and
depends on whether hidden symbols should be internalized. E.g., for
ld -r, LTO_INTERNALIZE_NONE can be used when -keep_private_externs, and
LTO_INTERNALIZE_HIDDEN can be used otherwise. However,
LTO_INTERNALIZE_FULL is inappropriate, since the output object file will
eventually need to link with others.
lto_codegen_set_internalize_strategy() sets the strategy for subsequent
calls to lto_codegen_write_merged_modules() and lto_codegen_compile*().
<rdar://problem/
14334895>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199191
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Jakob Stoklund Olesen [Tue, 14 Jan 2014 06:18:38 +0000 (06:18 +0000)]
Always let value types influence register classes.
When creating a virtual register for a def, the value type should be
used to pick the register class. If we only use the register class
constraint on the instruction, we might pick a too large register class.
Some registers can store values of different sizes. For example, the x86
xmm registers can hold f32, f64, and 128-bit vectors. The three
different value sizes are represented by register classes with identical
register sets: FR32, FR64, and VR128. These register classes have
different spill slot sizes, so it is important to use the right one.
The register class constraint on an instruction doesn't necessarily care
about the size of the value its defining. The value type determines
that.
This fixes a problem where InstrEmitter was picking 32-bit register
classes for 64-bit values on SPARC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199187
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Jakob Stoklund Olesen [Tue, 14 Jan 2014 06:18:34 +0000 (06:18 +0000)]
Switch the NEON register class from QPR to DPair.
The already allocatable DPair superclass contains odd-even D register
pair in addition to the even-odd pairs in the QPR register class. There
is no reason to constrain the set of D register pairs that can be used
for NEON values. Any NEON instructions that require a Q register will
automatically constrain the register class to QPR.
The allocation order for DPair begins with the QPR registers, so
register allocation is unlikely to change much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199186
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Chandler Carruth [Tue, 14 Jan 2014 05:50:19 +0000 (05:50 +0000)]
[PM] Fix stale header blocker, found by Duncan Smith in code review!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199185
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Chandler Carruth [Tue, 14 Jan 2014 05:05:18 +0000 (05:05 +0000)]
Remove the last weird subproject, 'privbracket'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199183
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Chandler Carruth [Tue, 14 Jan 2014 05:02:38 +0000 (05:02 +0000)]
Add checks to configure for sufficiently modern host compilers. This
requires Clang 3.1 or GCC 4.7. If the compiler isn't Clang or GCC, we
don't try to do any sanity checking, but this give us at least
a reasonable baseline of modern compilers.
Also, I'm not claiming that this is the best way to do compiler version
tests. I'm happy for anyone to suggest better ways of doing this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199182
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Rafael Espindola [Tue, 14 Jan 2014 04:25:13 +0000 (04:25 +0000)]
Replace .mips_hack_stocg with ".set micromips" and ".set nomicromips".
This matches what gnu as does and implementing this is easier than arguing
about it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199181
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Mark Seaborn [Tue, 14 Jan 2014 04:20:01 +0000 (04:20 +0000)]
Fix llc to not reuse spill slots in functions that invoke setjmp()
We need to ensure that StackSlotColoring.cpp does not reuse stack
spill slots in functions that call "returns_twice" functions such as
setjmp(), otherwise this can lead to miscompiled code, because a stack
slot would be clobbered when it's still live.
This was already handled correctly for functions that call setjmp()
(though this wasn't covered by a test), but not for functions that
invoke setjmp().
We fix this by changing callsFunctionThatReturnsTwice() to check for
invoke instructions.
This fixes PR18244.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199180
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Chandler Carruth [Tue, 14 Jan 2014 04:01:01 +0000 (04:01 +0000)]
Ok, really, for the last time, llvm-gcc is dead Jim.
Also, so is stacker, llvm-tv, etc. Wow.
But will someone please fess up to what projects/privbracket is and why
our autoconf build supports it?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199179
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Chandler Carruth [Tue, 14 Jan 2014 03:46:00 +0000 (03:46 +0000)]
llvm-gcc is dead. REALLY. IT'S DEAD JIM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199178
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Rafael Espindola [Tue, 14 Jan 2014 01:21:46 +0000 (01:21 +0000)]
Make getTargetStreamer return a possibly null pointer.
This will allow it to be called from target independent parts of the main
streamer that don't know if there is a registered target streamer or not. This
in turn will allow targets to perform extra actions at specified points in the
interface: add extra flags for some labels, extra work during finalization, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199174
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Duncan P. N. Exon Smith [Mon, 13 Jan 2014 23:11:48 +0000 (23:11 +0000)]
Remove extra } in documentation comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199162
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Cameron McInally [Mon, 13 Jan 2014 22:37:35 +0000 (22:37 +0000)]
Clean up RUN command for Assembler/getInt.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199158
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Chandler Carruth [Mon, 13 Jan 2014 22:21:34 +0000 (22:21 +0000)]
Factor the option and checking of compiler version better. Put the
option with the others in the top level CMakeLists, and put the check in
HandleLLVMOptions. This will also let it be used from the standalone
Clang builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199149
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Chandler Carruth [Mon, 13 Jan 2014 22:05:20 +0000 (22:05 +0000)]
Raise the minimum CMake version to 2.8.8 -- we have a report that the
compiler version checking doesn't work on 2.8.7. This feature was
documented in 2.8.10, but existed for an unknown amount of time before
that.
I'm actually happy to revert this and remove the use of the feature if
there is anyone with a specific problem updating CMake. Please just let
me know. I don't want to re-implement this CMake functionality unless
there is a reason, and this is the only real way to find that out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199148
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Cameron McInally [Mon, 13 Jan 2014 22:04:55 +0000 (22:04 +0000)]
Fix uninitialized warning in llvm/lib/IR/DataLayout.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199147
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Juergen Ributzka [Mon, 13 Jan 2014 21:49:25 +0000 (21:49 +0000)]
[DAG] Refactor ReassociateOps - no functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199146
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Chandler Carruth [Mon, 13 Jan 2014 21:47:35 +0000 (21:47 +0000)]
Add a check that the host compiler is modern to CMake, take 1. This is
likely to be reverted and re-applied a few times. The minimum versions
we're aiming at:
GCC 4.7
Clang 3.1
MSVC 17.0 (Visual Studio 2012)
Let me know if something breaks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199145
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Juergen Ributzka [Mon, 13 Jan 2014 20:51:35 +0000 (20:51 +0000)]
[DAG] Teach DAG to also reassociate vector operations
This commit teaches DAG to reassociate vector ops, which in turn enables
constant folding of vector op chains that appear later on during custom lowering
and DAG combine.
Reviewed by Andrea Di Biagio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199135
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Andrew Trick [Mon, 13 Jan 2014 20:08:27 +0000 (20:08 +0000)]
Hide the pre-RA-sched= option.
This is a very confusing option for a feature that will go away.
-enable-misched is exposed instead to help triage issues with the new
scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199133
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Weiming Zhao [Mon, 13 Jan 2014 18:47:54 +0000 (18:47 +0000)]
Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks
The issue is caused when Post-RA scheduler reorders a bundle instruction
(IT block). However, it only flips the CPSR liveness of the bundle instruction,
leaves the instructions inside the bundle unchanged, which causes inconstancy and crashes
Thumb2SizeReduction.cpp::ReduceMBB().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199127
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Rafael Espindola [Mon, 13 Jan 2014 18:31:04 +0000 (18:31 +0000)]
Update getLazyBitcodeModule to use ErrorOr for error handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199125
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Andrea Di Biagio [Mon, 13 Jan 2014 16:51:00 +0000 (16:51 +0000)]
[AArch64] Fix assertion failure caused by an invalid comparison between APInt values.
APInt only knows how to compare values with the same BitWidth and asserts
in all other cases.
With this fix, function PerformORCombine does not use the APInt equality
operator if the APInt values returned by 'isConstantSplat' differ in BitWidth.
In that case they are different and no comparison is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199119
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Joerg Sonnenberger [Mon, 13 Jan 2014 15:50:36 +0000 (15:50 +0000)]
Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199118
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Richard Sandiford [Mon, 13 Jan 2014 15:44:44 +0000 (15:44 +0000)]
[SystemZ] Flesh out stackrestore test (frame-11.ll)
...so that it does something vaguely sensible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199117
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Richard Sandiford [Mon, 13 Jan 2014 15:42:16 +0000 (15:42 +0000)]
[SystemZ] Add "volatile" to a dead store in variable-loc.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199116
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Richard Sandiford [Mon, 13 Jan 2014 15:40:25 +0000 (15:40 +0000)]
[SystemZ] Improve risbg-01.ll test
The old mask in f24 wasn't well chosen because the lshr would always be zero.
CodeGen didn't detect this but InstCombine would. The new mask ensures
that both shifts are needed.
f26 is specifically testing for a wrap-around mask. The AND can be applied
to just the shift left, either before or after the shift. Again, CodeGen
kept it in the original form but InstCombine would mask after the shift
instead. The exact choice of NILF isn't important for the test so I just
dropped it and kept the rotate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199115
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Richard Sandiford [Mon, 13 Jan 2014 15:17:53 +0000 (15:17 +0000)]
[SystemZ] Optimize (sext (ashr (shl ...), ...))
...into (ashr (shl (anyext X), ...), ...), which requires one fewer
instruction. The (anyext X) can sometimes be simplified too.
I didn't do this in DAGCombiner because widening shifts isn't a win
on all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199114
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Chris Lattner [Mon, 13 Jan 2014 15:10:11 +0000 (15:10 +0000)]
fix a -Wdocumentation warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199113
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Tim Northover [Mon, 13 Jan 2014 14:20:25 +0000 (14:20 +0000)]
ARM: add test for r199108. Oops.
rdar://problem/
15800156
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199109
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Tim Northover [Mon, 13 Jan 2014 14:19:17 +0000 (14:19 +0000)]
ARM: constrain Thumb LDRLIT pseudo-instructions to r0-r7.
Previously we only used GPR for the destination placeholder in "ldr rD, [pc,
incorrect codegen under the integrated assembler.
This should fix both issues (which probably only affect MachO targets at the
moment).
rdar://problem/
15800156
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199108
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David Woodhouse [Mon, 13 Jan 2014 14:05:59 +0000 (14:05 +0000)]
[x86] Fix retq/retl handling in 64-bit mode
This finishes the job started in r198756, and creates separate opcodes for
64-bit vs. 32-bit versions of the rest of the RET instructions too.
LRETL/LRETQ are interesting... I can't see any justification for their
existence in the SDM. There should be no 'LRETL' in 64-bit mode, and no
need for a REX.W prefix for LRETQ. But this is what GAS does, and my
Sandybridge CPU and an Opteron 6376 concur when tested as follows:
asm __volatile__("pushq $0x1234\nmovq $0x33,%rax\nsalq $32,%rax\norq $1f,%rax\npushq %rax\nlretl $8\n1:");
asm __volatile__("pushq $1234\npushq $0x33\npushq $1f\nlretq $8\n1:");
asm __volatile__("pushq $0x33\npushq $1f\nlretq\n1:");
asm __volatile__("pushq $0x1234\npushq $0x33\npushq $1f\nlretq $8\n1:");
cf. PR8592 and commit r118903, which added LRETQ. I only added LRETIQ to
match it.
I don't quite understand how the Intel syntax parsing for ret
instructions is working, despite r154468 allegedly fixing it. Aren't the
explicitly sized 'retw', 'retd' and 'retq' supposed to work? I have at
least made the 'lretq' work with (and indeed *require*) the 'q'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199106
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Chandler Carruth [Mon, 13 Jan 2014 13:07:17 +0000 (13:07 +0000)]
[PM] Split DominatorTree into a concrete analysis result object which
can be used by both the new pass manager and the old.
This removes it from any of the virtual mess of the pass interfaces and
lets it derive cleanly from the DominatorTreeBase<> template. In turn,
tons of boilerplate interface can be nuked and it turns into a very
straightforward extension of the base DominatorTree interface.
The old analysis pass is now a simple wrapper. The names and style of
this split should match the split between CallGraph and
CallGraphWrapperPass. All of the users of DominatorTree have been
updated to match using many of the same tricks as with CallGraph. The
goal is that the common type remains the resulting DominatorTree rather
than the pass. This will make subsequent work toward the new pass
manager significantly easier.
Also in numerous places things became cleaner because I switched from
re-running the pass (!!! mid way through some other passes run!!!) to
directly recomputing the domtree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199104
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Chandler Carruth [Mon, 13 Jan 2014 13:06:58 +0000 (13:06 +0000)]
[PM][cleanup] Clean up comments and use modern doxygen in this file.
This is a precursor to breaking the pass that computes the DominatorTree
apart from the concrete DominatorTree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199103
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Elena Demikhovsky [Mon, 13 Jan 2014 12:55:03 +0000 (12:55 +0000)]
AVX-512: Embedded Rounding Control - encoding and printing
Changed intrinsics for vrcp14/vrcp28 vrsqrt14/vrsqrt28 - aligned with GCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199102
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Chandler Carruth [Mon, 13 Jan 2014 11:58:34 +0000 (11:58 +0000)]
[PM] Fix the const-correctness of the generic DominatorTreeBase to
support notionally const queries even though they may trigger DFS
numbering updates.
The updating of DFS numbers and tracking of slow queries do not mutate
the observable state of the domtree. They should be const to
differentiate them from the APIs which mutate the tree directly to do
incremental updates.
This will make it possible in a world where the DominatorTree is not
a pass but merely the result of running a pass to derive DominatorTree
from the base class as it was originally designed, removing a huge
duplication of API in DominatorTree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199101
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Chandler Carruth [Mon, 13 Jan 2014 10:52:56 +0000 (10:52 +0000)]
[PM] Pull the generic graph algorithms and data structures for dominator
trees into the Support library.
These are all expressed in terms of the generic GraphTraits and CFG,
with no reliance on any concrete IR types. Putting them in support
clarifies that and makes the fact that the static analyzer in Clang uses
them much more sane. When moving the Dominators.h file into the IR
library I claimed that this was the right home for it but not something
I planned to work on. Oops.
So why am I doing this? It happens to be one step toward breaking the
requirement that IR verification can only be performed from inside of
a pass context, which completely blocks the implementation of
verification for the new pass manager infrastructure. Fixing it will
also allow removing the concept of the "preverify" step (WTF???) and
allow the verifier to cleanly flag functions which fail verification in
a way that precludes even computing dominance information. Currently,
that results in a fatal error even when you ask the verifier to not
fatally error. It's awesome like that.
The yak shaving will continue...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199095
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Tim Northover [Mon, 13 Jan 2014 10:49:11 +0000 (10:49 +0000)]
Revert "ReMat: fix overly cavalier attitude to sub-register indices"
Very sorry, this was a premature patch that I still need to investigate and
finish off (for some reason beyond me at the moment it doesn't actually fix the
issue in all cases).
This reverts commit r199091.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199093
91177308-0d34-0410-b5e6-
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Tim Northover [Mon, 13 Jan 2014 10:47:04 +0000 (10:47 +0000)]
Docs: fix sign of division and increase equivocation on code generated.
I should have been a politician.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199092
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Tim Northover [Mon, 13 Jan 2014 10:47:01 +0000 (10:47 +0000)]
ReMat: fix overly cavalier attitude to sub-register indices
There are two attempted optimisations in reMaterializeTrivialDef, trying to
avoid promoting the size of a register too much when rematerializing.
Unfortunately, both appear to be flawed. First, we see if the original register
would have worked, but this is inadequate. Consider:
v1 = SOMETHING (v1 is QQ)
v2:Q0 = COPY v1:Q1 (v1, v2 are QQ)
...
uses of v2
In this case even though v2 *could* be used directly as the output of
SOMETHING, this would set the wrong bits of the QQ register involved. The
correct rematerialization must be:
v2:Q0_Q1 = SOMETHING (v2 promoted to QQQ)
...
uses of v2:Q1_Q2
For the second optimisation, if the correct remat is "v2:idx = SOMETHING" then
we can't necessarily expect v2 itself to be valid for SOMETHING, but we do try
to hunt for a class between v1 and v2 that works. Unfortunately, this is also
wrong:
v1 = SOMETHING (v1 is QQ)
v2:Q0_Q1 = COPY v1 (v1 is QQ, v2 is QQQ)
...
uses of v2 as a QQQ
The canonical rematerialization here is "v2:Q0_Q1 = SOMETHING". However current
logic would decide that v2 could be a QQ (no interest is taken in later uses).
This patch, therefore, always accepts the widened register class without trying
to be clever. Generally there is no penalty to this (e.g. in the common GR32 <
GR64 case, expanding the width doesn't matter because it's not like you were
going to do anything else with the high bits of a GR32 register). It can
increase register pressure in cases like the ARM VFP regs though (multiple
non-overlapping but equivalent subregisters). Hopefully this situation is rare
enough that it won't matter.
Unfortunately, no in-tree targets actually expose this as far as I can tell
(there are so few isAsCheapAsAMove instructions for it to trigger on) so I've
been unable to produce a test. It was exposed in our ARM64 SPEC tests though,
and I will be adding a test there that we should be able to contribute
soon(TM).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199091
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Chandler Carruth [Mon, 13 Jan 2014 09:58:03 +0000 (09:58 +0000)]
[cleanup] Re-sort the examples #include lines with my sort_includes
script.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199089
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Chandler Carruth [Mon, 13 Jan 2014 09:53:45 +0000 (09:53 +0000)]
[cleanup] Fix the includes in the examples for r199082.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199087
91177308-0d34-0410-b5e6-
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Chandler Carruth [Mon, 13 Jan 2014 09:31:09 +0000 (09:31 +0000)]
[cleanup] Switch comments to use '\brief' style instead of '@brief'
style, and remove some unnecessary comments (the code is perfectly
self-documenting here). Also clang-format the function declarations as
they wrap cleanly now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199084
91177308-0d34-0410-b5e6-
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Chandler Carruth [Mon, 13 Jan 2014 09:26:24 +0000 (09:26 +0000)]
[cleanup] Move the Dominators.h and Verifier.h headers into the IR
directory. These passes are already defined in the IR library, and it
doesn't make any sense to have the headers in Analysis.
Long term, I think there is going to be a much better way to divide
these matters. The dominators code should be fully separated into the
abstract graph algorithm and have that put in Support where it becomes
obvious that evn Clang's CFGBlock's can use it. Then the verifier can
manually construct dominance information from the Support-driven
interface while the Analysis library can provide a pass which both
caches, reconstructs, and supports a nice update API.
But those are very long term, and so I don't want to leave the really
confusing structure until that day arrives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199082
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Chandler Carruth [Mon, 13 Jan 2014 08:09:47 +0000 (08:09 +0000)]
[cleanup] Add a missing include exposed by resorting other includes.
Should fix the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199081
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Chandler Carruth [Mon, 13 Jan 2014 08:04:33 +0000 (08:04 +0000)]
Re-sort #include lines again, prior to moving headers around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199080
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Chandler Carruth [Mon, 13 Jan 2014 07:38:24 +0000 (07:38 +0000)]
[PM] Wire up support for writing bitcode with new PM.
This moves the old pass creation functionality to its own header and
updates the callers of that routine. Then it adds a new PM supporting
bitcode writer to the header file, and wires that up in the opt tool.
A test is added that round-trips code into bitcode and back out using
the new pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199078
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NAKAMURA Takumi [Mon, 13 Jan 2014 05:55:10 +0000 (05:55 +0000)]
llvm/test/ExecutionEngine/MCJIT/load-object-a.ll: Put together rm(1) and mkdir(1) at the top.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199077
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NAKAMURA Takumi [Mon, 13 Jan 2014 05:25:13 +0000 (05:25 +0000)]
[CMake] Move BUG_REPORT_URL from clang to llvm.
It was too late to set BUG_REPORT_URL after configure_file(config.h).
BUG_REPORT_URL in config.h.cmake would be updated at 2nd run of cmake.
It caused many recompilations.
FYI, configure handles BUG_REPORT_URL in llvm side.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199076
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Chandler Carruth [Mon, 13 Jan 2014 05:16:45 +0000 (05:16 +0000)]
[PM] Wire up support for printing assembly output from the opt command.
This lets us round-trip IR in the expected manner with the opt tool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199075
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Chandler Carruth [Mon, 13 Jan 2014 03:08:40 +0000 (03:08 +0000)]
[PM] Add an enum for describing the desired output strategy, and run
that through the interface rather than a simple bool. This should allow
starting to wire up real output to round-trip IR through opt with the
new pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199071
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Kevin Qin [Mon, 13 Jan 2014 01:58:38 +0000 (01:58 +0000)]
[AArch64 NEON] Add missing patterns for bitcast from or to v1f64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199070
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Kevin Qin [Mon, 13 Jan 2014 01:56:29 +0000 (01:56 +0000)]
[AArch64 NEON] Add more scenarios to use perm instructions when lowering shuffle_vector
This patch covered 2 more scenarios:
1. Two operands of shuffle_vector are the same, like
%shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2. One of operands is undef, like
%shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
After this patch, perm instructions will have chance to be emitted instead of lots of INS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199069
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Saleem Abdulrasool [Mon, 13 Jan 2014 01:15:39 +0000 (01:15 +0000)]
correct target directive handling error handling
The target specific parser should return `false' if the target AsmParser handles
the directive, and `true' if the generic parser should handle the directive.
Many of the target specific directive handlers would `return Error' which does
not follow these semantics. This change simply changes the target specific
routines to conform to the semantis of the ParseDirective correctly.
Conformance to the semantics improves diagnostics emitted for the invalid
directives. X86 is taken as a sample to ensure that multiple diagnostics are
not presented for a single error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199068
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Jakob Stoklund Olesen [Sun, 12 Jan 2014 19:24:08 +0000 (19:24 +0000)]
Handle bundled terminators in isBlockOnlyReachableByFallthrough.
Targets like SPARC and MIPS have delay slots and normally bundle the
delay slot instruction with the corresponding terminator.
Teach isBlockOnlyReachableByFallthrough to find any MBB operands on
bundled terminators so SPARC doesn't need to specialize this function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199061
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NAKAMURA Takumi [Sun, 12 Jan 2014 17:42:43 +0000 (17:42 +0000)]
[CMake] Add a comment to tablegen's copy_if_different. Ninja reports every action by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199058
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NAKAMURA Takumi [Sun, 12 Jan 2014 16:14:24 +0000 (16:14 +0000)]
raw_fd_ostream: Don't change STDERR to O_BINARY, or w*printf() (in assert()) would barf wide chars after llvm::errs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199057
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Nico Rieck [Sun, 12 Jan 2014 15:57:38 +0000 (15:57 +0000)]
Make test independent of scheduling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199055
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NAKAMURA Takumi [Sun, 12 Jan 2014 14:44:46 +0000 (14:44 +0000)]
raw_stream formatter: [Win32] Use std::signbit() if available, instead of _fpclass().
FIXME: It should be generic to C++11. For now, it is dedicated to mingw-w64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199052
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NAKAMURA Takumi [Sun, 12 Jan 2014 14:41:41 +0000 (14:41 +0000)]
llvm/test/CodeGen/X86/shl_undef.ll: Tweak to satisfy r199050.
Use intel syntax, or "shl" might hit "pushl".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199051
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Nico Rieck [Sun, 12 Jan 2014 14:09:17 +0000 (14:09 +0000)]
Fix non-deterministic SDNodeOrder-dependent codegen
Reset SelectionDAGBuilder's SDNodeOrder to ensure deterministic code
generation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199050
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Chandler Carruth [Sun, 12 Jan 2014 12:15:39 +0000 (12:15 +0000)]
[PM] Add module and function printing passes for the new pass manager.
This implements the legacy passes in terms of the new ones. It adds
basic testing using explicit runs of the passes. Next up will be wiring
the basic output mechanism of opt up when the new pass manager is
engaged unless bitcode writing is requested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199049
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Chandler Carruth [Sun, 12 Jan 2014 11:41:43 +0000 (11:41 +0000)]
[PM] Revert an accidental commit of total BS code. This was halfway
through being editted, and I forgot to delete it before committing.
What's more awesome is that it compiles cleanly!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199048
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Chandler Carruth [Sun, 12 Jan 2014 11:40:03 +0000 (11:40 +0000)]
[PM] Simplify the IR printing passes significantly now that a narrower
API is exposed.
This removes the support for deleting the ostream, switches the member
and constructor order arround to be consistent with the creation
routines, and switches to using references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199047
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Chandler Carruth [Sun, 12 Jan 2014 11:39:04 +0000 (11:39 +0000)]
[PM] Update one user of the printing pass API that I missed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199046
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Chandler Carruth [Sun, 12 Jan 2014 11:30:46 +0000 (11:30 +0000)]
[PM] Simplify the interface exposed for IR printing passes.
Nothing was using the ability of the pass to delete the raw_ostream it
printed to, and nothing was trying to pass it a pointer to the
raw_ostream. Also, the function variant had a different order of
arguments from all of the others which was just really confusing. Now
the interface accepts a reference, doesn't offer to delete it, and uses
a consistent order. The implementation of the printing passes haven't
been updated with this simplification, this is just the API switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199044
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Chandler Carruth [Sun, 12 Jan 2014 11:16:01 +0000 (11:16 +0000)]
[PM] Run clang-format and remove redundant or obvious comments before
the heavy factoring needed to share logic between the new pass manager
and the old.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199043
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Chandler Carruth [Sun, 12 Jan 2014 11:10:32 +0000 (11:10 +0000)]
[PM] Rename the IR printing pass header to a more generic and correct
name to match the source file which I got earlier. Update the include
sites. Also modernize the comments in the header to use the more
recommended doxygen style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199041
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Chandler Carruth [Sun, 12 Jan 2014 10:56:57 +0000 (10:56 +0000)]
[PM] Un-indent this file-level namespace. It's far more common to not
indent the outer-most llvm namespace in header files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199040
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Chandler Carruth [Sun, 12 Jan 2014 10:02:02 +0000 (10:02 +0000)]
[PM] Fix a bunch of bugs I spotted by inspection when working on this
code. Copious tests added to cover these cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199039
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Chandler Carruth [Sun, 12 Jan 2014 09:34:22 +0000 (09:34 +0000)]
[PM] Add support for parsing function passes and function pass manager
nests to the opt commandline support. This also showcases the
implicit-initial-manager support which will be most useful for testing.
There are several bugs that I spotted by inspection here that I'll fix
with test cases in subsequent commits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199038
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Saleem Abdulrasool [Sun, 12 Jan 2014 05:25:44 +0000 (05:25 +0000)]
ARM IAS: fix diagnostics of improper qualification
An improper qualifier would result in a superfluous error due to the parser not
consuming the remainder of the statement. Simply consume the remainder of the
statement to avoid the error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199035
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Venkatraman Govindaraju [Sun, 12 Jan 2014 04:48:54 +0000 (04:48 +0000)]
[Sparc] Add support for parsing floating point instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199033
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Saleem Abdulrasool [Sun, 12 Jan 2014 04:36:01 +0000 (04:36 +0000)]
ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructions
The implicit immediate 0 forms are assembly aliases, not distinct instruction
encodings. Fix the initial implementation introduced in r198914 to an alias to
avoid two separate instruction definitions for the same encoding.
An InstAlias is insufficient in this case as the necessary due to the need to
add a new additional operand for the implicit zero. By using the AsmPsuedoInst,
fall back to the C++ code to transform the instruction to the equivalent
_POST_IMM form, inserting the additional implicit immediate 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199032
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Venkatraman Govindaraju [Sun, 12 Jan 2014 04:34:31 +0000 (04:34 +0000)]
[Sparc] Replace (unsigned)-1 with ~OU as suggested by Reid Kleckner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199031
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Jakob Stoklund Olesen [Sun, 12 Jan 2014 04:13:17 +0000 (04:13 +0000)]
The SPARCv9 ABI returns a float in %f0.
This is different from the argument passing convention which puts the
first float argument in %f1.
With this patch, all returned floats are treated as if the 'inreg' flag
were set. This means multiple float return values get packed in %f0,
%f1, %f2, ...
Note that when returning a struct in registers, clang will set the
'inreg' flag on the return value, so that behavior is unchanged. This
also happens when returning a float _Complex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199028
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Joerg Sonnenberger [Sun, 12 Jan 2014 03:38:30 +0000 (03:38 +0000)]
Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199027
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Joerg Sonnenberger [Sun, 12 Jan 2014 03:35:18 +0000 (03:35 +0000)]
Add missing mul aliases for armv4 support. Add checks that armv4 can
assemble the various mul instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199026
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Hans Wennborg [Sun, 12 Jan 2014 00:44:41 +0000 (00:44 +0000)]
Switch-to-lookup tables: Don't require a result for the default
case when the lookup table doesn't have any holes.
This means we can build a lookup table for switches like this:
switch (x) {
case 0: return 1;
case 1: return 2;
case 2: return 3;
case 3: return 4;
default: exit(1);
}
The default case doesn't yield a constant result here, but that doesn't matter,
since a default result is only necessary for filling holes in the lookup table,
and this table doesn't have any holes.
This makes us transform 505 more switches in a clang bootstrap, and shaves 164 KB
off the resulting clang binary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199025
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Venkatraman Govindaraju [Sat, 11 Jan 2014 23:56:13 +0000 (23:56 +0000)]
[Sparc] Add missing processor types: v7 and niagara
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199024
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Saleem Abdulrasool [Sat, 11 Jan 2014 23:03:48 +0000 (23:03 +0000)]
ARM IAS: support emitting constant values in target expressions
A 32-bit immediate value can be formed from a constant expression and loaded
into a register. Add support to emit this into an object file. Because this
value is a constant, a relocation must *not* be produced for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199023
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Benjamin Kramer [Sat, 11 Jan 2014 21:06:00 +0000 (21:06 +0000)]
Fix broken CHECK lines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199016
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Arnold Schwaighofer [Sat, 11 Jan 2014 20:40:34 +0000 (20:40 +0000)]
LoopVectorizer: Enable strided memory accesses versioning per default
I saw no compile or execution time regressions on x86_64 -mavx -O3.
radar://
13075509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199015
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Venkatraman Govindaraju [Sat, 11 Jan 2014 19:38:03 +0000 (19:38 +0000)]
[Sparc] Bundle instruction with delay slow and its filler. Now, we can use -verify-machineinstrs with SPARC backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199014
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Alp Toker [Sat, 11 Jan 2014 14:34:18 +0000 (14:34 +0000)]
lit: Provide source locations in cfg files with older Python versions
This commit prospectively brings the benefits of r198766 to older supported
Python versions (2.5+).
Tested with Python 2.6, 2.7, 3.1 and 3.3 (!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199009
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Alp Toker [Sat, 11 Jan 2014 14:01:43 +0000 (14:01 +0000)]
Fix 'ned' typo in doc comment
Patch by Jasper Neumann!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199007
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Alp Toker [Sat, 11 Jan 2014 13:27:28 +0000 (13:27 +0000)]
lit: execfile() isn't present in Python 3.3
On the other hand, exec(compile()) doesn't work in older Python versions in the
2.x series.
This commit introduces exec(compile()) with a fallback to plain exec(). That'll
hopefully hit the sweet spot in terms of version support.
Followup to r198766 which added enhanced source locations for lit cfg parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199006
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