rk3368: clk: fix rk3368 apll set_rate

In rk3368, apll enter slow mode before changing settings
and return to normal mode after changing settings.

Signed-off-by: dkl <dkl@rock-chips.com>

arm64: rockchip: rockchip_defconfig enable some ARM64 feature

+DISABLE_CPU_SCHED_DOMAIN_BALANCE
+SCHED_HMP
+HMP_VARIABLE_SCALE
+HMP_FREQUENCY_INVARIANT_SCALE
+SCHED_HMP_LITTLE_PACKING
+ARM_BIG_LITTLE_CPUFREQ
+ARM_DT_BL_CPUFREQ
+ARM64_CPUIDLE
+SERIAL_ROCKCHIP_CONSOLE
+RK30_CAMERA_ONEFRAME

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

arm64: rockchip: fix tb_8846 boot

uart_dbg status default disabled
disabe wireless-wlan
bootargs remove vmalloc=512M console=ttyS2
remove memory node

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

arm64: rockchip: add rk3368-tb_8846.dts

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

arm64: rockchip: rk3368.dtsi add more configure

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

rk3368 lcdc: support win mirror and update NO_DUAL mode

Signed-off-by: hjc <hjc@rock-chips.com>

rk3368: clk: add CLKOPS_RATE_RK3368_DCLK_LCDC for dclk_vop0

Signed-off-by: dkl <dkl@rock-chips.com>

rk3368: dts: clk: fix some errors

Adjust vip clks, rename clk_gpu_core "clk_gpu" and remove wrong clk4x_ddr.

Signed-off-by: dkl <dkl@rock-chips.com>

Merge branch develop-3.10 into develop-3.10-next

Revert "rk3368 lcdc: support win mirror and update NO_DUAL mode"

This reverts commit fd18d428fa43fba8f42c6be7649cd857263c8c8e.

ARM: rk: build resource.img with logo_kernel.bmp

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

rk3368: reset: add soft_reset id

Signed-off-by: dkl <dkl@rock-chips.com>

rk fb: delete unused message

Signed-off-by: hjc <hjc@rock-chips.com>

cif: set CONFIG_RK30_CAMERA_ONEFRAME default as yes in rockchip_defconfig

clk: rockchip: fix some code style problems in clk-pll.c

Signed-off-by: dkl <dkl@rock-chips.com>

clk: rockchip: fix pll_clk_get_best_set() for rk3188plus type pll

When selecting a best setting for rk3188plus type pll, consider a
larger NO first(means larger VCO freq), and a smaller NR later.

Signed-off-by: dkl <dkl@rock-chips.com>

rk32: disabled ohci in dt

ARM: rockchip: rockchip_defconfig add USB_OHCI_HCD

rk312x: add support for ehci to all rk312x series

rk32: ehci: work-around for abnormal ohci

Revert "USB: Fix EHCI bug if connect with FS or LS device."

This reverts commit f65cb6fc5a364f0efba4fc9f0039c4ddb34ef4dd.

rk fb: box is use NO_DUAL mode,so fb have to disable dsp_black

Signed-off-by: hjc <hjc@rock-chips.com>

rk: Makefile set default CROSS_COMPILE when ARCH is arm64

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

rk_fb: logo: get kernel logo addr from protect memory region

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

rk: mem: protect memory region that specified by uboot on kernel booting

rk: ion: cma reserve 640MB at anywhere by default on rk32xx

rk: arm64: support build kernel.img and resource.img

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

ARM64: rockchip: rockchip_defconfig disable HDMI_RK3288

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

rk3368 lcdc: support win mirror and update NO_DUAL mode

Signed-off-by: hjc <hjc@rock-chips.com>

Merge branch develop-3.10 into develop-3.10-next

ARM64: rockchip: update rockchip_defconfig

-MEMCG
-RD_BZIP2
-RD_LZMA
PANIC_TIMEOUT=1
+BLOCK_RKNAND
+ARMV7_COMPAT
+SECCOMP
-MALI_MIDGARD
+LCDC_RK3368
+SND_DYNAMIC_MINORS
+BOOTPARAM_HARDLOCKUP_PANIC
+BOOTPARAM_SOFTLOCKUP_PANIC
DEFAULT_HUNG_TASK_TIMEOUT=10
+DYNAMIC_DEBUG

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

ARM64: rockchip: add mach-rockchip

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

ARM: rockchip: move common config to Kconfig.common

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

ARM: rockchip: common files support ARM64

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

media: rk30_camera_oneframe: fix link error

`.exit.text' referenced in section `.data.rel.local' of drivers/built-in.o: defined in discarded section `.exit.text' of drivers/built-in.o

Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

ARM: rockchip: common: covert dsb() to dsb(sy)

usb: dwc_otg_310: covert dsb() to dsb(sy)

video: rockchip: rk3288_hdmi: covert dsb() to dsb(sy)

video: rockchip: iep: covert dsb() to dsb(sy)

video: rk3368_lcdc: covert dsb() to dsb(sy)

media: rk30_camera_oneframe: covert dsb() to dsb(sy)

rk_serial: covert dsb() to dsb(sy)

clocksource: rockchip_timer: covert dsb() to dsb(sy)

pwm: rockchip: covert dsb() to dsb(sy)

irqchip: gic: covert dsb() to dsb(sy)

mmc: rockchip: covert dsb() to dsb(sy)

rockchip: clk: covert dsb() to dsb(sy)

ethernet: gmac: covert dsb() to dsb(sy)

Revert "mmc: auto-pin when pm call for udbg"

This reverts commit 4ac86774c95b8f8cd8d80605fc332010cc02714e.

rk3288 hdmi: add config for hdmi

Signed-off-by: hjc <hjc@rock-chips.com>

rk312x lcdc: fix no used function call.

Signed-off-by: hjc <hjc@rock-chips.com>

rk3128-box:update dts according to pm.c

rk_fb: rk312x: direct power on lcdc when do fb_unblank

when do fb blank, we diretcly off the lcdc, so I think
we should power on lcdc in pairs.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

rk3288:umask dma support for spi

rk312x: usb: cleanup ohci-rockchip.c and make it support rk312x

rk312x: usb: Skip DWC HOST for rk3126/3128 and usb phy tuning

1.Use EHCI/OHCI for all rk312x series
2.Set Host disconnect trigger point to 600mv, default is 650mv

phy: backport generic phy framework from kernel-3.18

rk3036:add CONFIG_SWITCH again

i2s: compatible with rk3126/rk3126b/rk3128.

because i2s controller is different between rk3126 and rk3126b,
but require the same dtb, so add runtime compatible.

rk3368 dtsi: modify dtsi for display module

Signed-off-by: hjc <hjc@rock-chips.com>

rk3368 lcdc: add lcdc driver

Signed-off-by: hjc <hjc@rock-chips.com>

rk31xx lvds: add support rk3368 lvds transmitter

Signed-off-by: hjc <hjc@rock-chips.com>

Merge branch develop-3.10 into develop-3.10-next

rk312x lcdc: fix vop csc config error

rk_fb: logo: support display bmp logo from uboot

get bmp file data from bootargs "kernel_logo=xxxxxx", decoder bmp
file to framebuffer.

now support rle 8bit bmp files and 24bit bmp files.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

rk fb: update fb config done info.
       this commit depend on hwc update,
       including the following directory:

       hardware/rk29/hwcomposer_rga/
       hardware/rk29/libgralloc_ump/
       hardware/libhardware/

RK3126/3126B DDR:fix ddr DQS1 drv set err

Merge branch 'develop-3.10' of ssh://10.10.10.29/rk/kernel into rk30/box/4.4_r1/develop

i2s: compatable with rk3126/rk3126b/rk3128.

Revert "rk3126/rk3126b: i2s: use i2s_2ch."

This reverts commit 942d98b30dd2c9907b4f53c160a16ee4216745a0.

Merge tag 'lsk-v3.10-android-14.11'

LSK Android 14.11 v3.10

Conflicts:
arch/arm/include/asm/cputype.h

usb: cleanup useless struct usb20otg_pdata_id

RK3126B: RK3126B delete the EBC

Signed-off-by: 许盛飞 <xsf@rock-chips.com>

wifi->esp8089:  add wifi mac address user-defined function.

rk3126/rk3126b: i2s: use i2s_2ch.

rk3128 & rk3036 : change the led color when power up and down

Signed-off-by:blb <blb@rockchips.com>

rk: ion: fix dts parse failure on arm64

wifi->esp8089:
     ESP8089 driver update to V1.9 (11272014).
     Update the V2.3 esp_prealloc program.

     This update is mainly as follows:
        1.To increase the new MAC address and MAC address customized version of the support;
        2.Enhance the robustness of the code;
        3.The increase of pure drive consistency under Linux and android;
        4.Enhance compatibility of non-standard AP;
        5.Improve the stability of the P2P mode.

rk fb: mid not support uboot display hdmi, so wo identify box and mid at switch screen

rockchip: avoid change ddr freq before lcd driver is inited

Signed-off-by: cl <cl@rock-chips.com>

rk3288: arm pvtm add RK3288_PROCESS_V2

Signed-off-by: cl <cl@rock-chips.com>

rk3368: clk: fix address expression and some errors

Signed-off-by: dkl <dkl@rock-chips.com>

rk3368: clk: add clocks-init and clocks-enable in DTS

Signed-off-by: dkl <dkl@rock-chips.com>

rk3368: clk: add codes to make npll only used by dclk_vop

Signed-off-by: dkl <dkl@rock-chips.com>

rk3368: clk: add rk3368_apllb_table/rk3368_aplll_table

Signed-off-by: dkl <dkl@rock-chips.com>

Merge branch develop-3.10 into develop-3.10-next

rk_fb: sysfs: make use vmap/vunmap in pairs.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

rk_fb: sysfs: add dump_buffer func to fb sysfs

Due to some time we want to know which buffer vop scaning, use "io"
cammand to dump buffer is too complex, so we add a sys node to help
buffer dump.

how to use it:
- echo bin > /sys/class/graphics/fb0/disp_info
  it will create bin file at /data/xxx.bin
- or echo bmp > /sys/class/graphics/fb0/disp_info
  it will create bmp file at /data/xxx.bmp,
  this file is normal bmp file.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

ion: export ion handle get/put

use ion handle get/put, we can easyly protect the buffer when we
use it.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

rk_fb: use front_regs instead of some global variable

front_regs means this config is scaning on the vop devices

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

usb: dwc_otg: fix incorrect bit operation

RK3126B DDR:add supporting DDR change freq

hevc, add scaling list table patch in kernel, fix bug in scaling list enable hevc video playback

rk_fb: fix iommu problem when hdmi plug or unplug.

There are two thread will update the win config,
one is update_regs handler, another is hdmi hotplug
thread, win config maybe modify by another thread
unexpectly, then vop scan umap address, cause iommu
crash, so we need use a mutex to protect win config.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

camera : cif : v0.1.a  Support rk3288 cif driver

vcodec iommu, fix some vp8 source decode cause
iommu pagefault. omit some iommu table creation.

Signed-off-by: ljf <ljf@rock-chips.com>

rk: ion: change ion's debug node for other r/w

rk_fb: rk3128: fix crash when boot when with hdmi plug

enable iommu when first ion buffer take effect.

rk3036/rk3128 hdmi:
According to HDMI CTS 7-19, GCP SB1~SB6 value must be zero
if color mode is 24bit. So we enable reg04 bit4 which will
set CD[0:3] of SB1 to zero.

rk312xdts: reconfiguration the rk3126-sdk.dts

Signed-off-by: 许盛飞 <xsf@rock-chips.com>