oota-llvm.git
11 years ago[asan] workaround for PR16277: don't instrument AllocaInstr with alignment more than...
Kostya Serebryany [Wed, 26 Jun 2013 09:49:52 +0000 (09:49 +0000)]
[asan] workaround for PR16277: don't instrument AllocaInstr with alignment more than the redzone size

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184928 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[asan] add option -asan-keep-uninstrumented-functions
Kostya Serebryany [Wed, 26 Jun 2013 09:18:17 +0000 (09:18 +0000)]
[asan] add option -asan-keep-uninstrumented-functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184927 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoProvide bootstrap support to build only llvm+clang when using cmake.
Andy Gibbs [Wed, 26 Jun 2013 08:05:08 +0000 (08:05 +0000)]
Provide bootstrap support to build only llvm+clang when using cmake.

Where a source tree is complete with lld, lldb and polly, it may not be possible to use cmake to configure build scripts if the host compiler it not capable of compiling these sub-projects.  This change makes it possible to first build a bootstrap clang compiler when can then be used to build a complete llvm toolchain.  An example bootstrap build sequence could be as follows:

$ mkdir bootstrap
$ cd bootstrap
$ cmake -G 'Unix Makefiles'
        -DCMAKE_BUILD_TYPE:STRING=Release
        -DCMAKE_PREFIX_PATH:STRING=$(pwd)
        -DLLVM_TARGETS_TO_BUILD:STRING=host
        -DLLVM_INCLUDE_TOOLS:STRING=bootstrap-only
        ../source
$ make clang  # build clang only for host

$ cd ..
$ export CC=$(realpath bootstrap/bin)/clang
$ export CXX=$(realpath bootstrap/bin)/clang++

$ mkdir final
$ cd final
$ cmake -G 'Unix Makefiles' ../source
$ make all check-all

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184924 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSupport using "host" as a target in LLVM_TARGETS_TO_BUILD when using cmake.
Andy Gibbs [Wed, 26 Jun 2013 07:57:53 +0000 (07:57 +0000)]
Support using "host" as a target in LLVM_TARGETS_TO_BUILD when using cmake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184923 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove calls to Path in #ifdefs that don't seem to be used in any of the bots :-(
Rafael Espindola [Wed, 26 Jun 2013 06:10:32 +0000 (06:10 +0000)]
Remove calls to Path in #ifdefs that don't seem to be used in any of the bots :-(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184920 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a simpler version of remove_all.
Rafael Espindola [Wed, 26 Jun 2013 06:06:54 +0000 (06:06 +0000)]
Add a simpler version of remove_all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184919 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix the build when __APPLE__ is defined.
Rafael Espindola [Wed, 26 Jun 2013 05:25:44 +0000 (05:25 +0000)]
Fix the build when __APPLE__ is defined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184917 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove sys::GetMainExecutable.
Rafael Espindola [Wed, 26 Jun 2013 05:05:37 +0000 (05:05 +0000)]
Remove sys::GetMainExecutable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184916 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPort GetMainExecutable over to PathV2.
Rafael Espindola [Wed, 26 Jun 2013 05:01:35 +0000 (05:01 +0000)]
Port GetMainExecutable over to PathV2.

I will remove the V1 version as soon as I change clang in the next commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184914 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove PathWithStatus.
Rafael Espindola [Wed, 26 Jun 2013 04:15:55 +0000 (04:15 +0000)]
Remove PathWithStatus.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184910 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agodbgs() << Instruction doesn't print a newline on the end any more. Update these
Nick Lewycky [Wed, 26 Jun 2013 00:30:18 +0000 (00:30 +0000)]
dbgs() << Instruction doesn't print a newline on the end any more. Update these
debug statements to add a missing newline. Also canonicalize to '\n' instead of
"\n"; the latter calls a function with a loop the former does not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184897 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agos/C++0x/C++11/
Adrian Prantl [Tue, 25 Jun 2013 23:42:37 +0000 (23:42 +0000)]
s/C++0x/C++11/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184892 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMerge isReachable into isBackedge.
Jakob Stoklund Olesen [Tue, 25 Jun 2013 23:32:10 +0000 (23:32 +0000)]
Merge isReachable into isBackedge.

Prefer using RPO.lookup() instead of RPO[] which can mutate the map.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184891 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSLPVectorizer: support slp-vectorization of PHINodes between basic blocks
Nadav Rotem [Tue, 25 Jun 2013 23:04:09 +0000 (23:04 +0000)]
SLPVectorizer: support slp-vectorization of PHINodes between basic blocks

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184888 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPrint block frequencies in decimal form.
Jakob Stoklund Olesen [Tue, 25 Jun 2013 21:57:38 +0000 (21:57 +0000)]
Print block frequencies in decimal form.

This is easier to read than the internal fixed-point representation.

If anybody knows the correct algorithm for converting fixed-point
numbers to base 10, feel free to fix it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184881 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Use new getNamedOperandIdx function generated by TableGen
Tom Stellard [Tue, 25 Jun 2013 21:22:18 +0000 (21:22 +0000)]
R600: Use new getNamedOperandIdx function generated by TableGen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184880 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTableGen: Generate a function for getting operand indices based on their defined...
Tom Stellard [Tue, 25 Jun 2013 21:22:09 +0000 (21:22 +0000)]
TableGen: Generate a function for getting operand indices based on their defined names

This patch modifies TableGen to generate a function in
${TARGET}GenInstrInfo.inc called getNamedOperandIdx(), which can be used
to look up indices for operands based on their names.

In order to activate this feature for an instruction, you must set the
UseNamedOperandTable bit.

For example, if you have an instruction like:

def ADD : TargetInstr <(outs GPR:$dst), (ins GPR:$src0, GPR:$src1)>;

You can look up the operand indices using the new function, like this:

Target::getNamedOperandIdx(Target::ADD, Target::OpName::dst)  => 0
Target::getNamedOperandIdx(Target::ADD, Target::OpName::src0) => 1
Target::getNamedOperandIdx(Target::ADD, Target::OpName::src1) => 2

The operand names are case sensitive, so $dst and $DST are considered
different operands.

This change is useful for R600 which has instructions with a large number
of operands, many of which model single bit instruction configuration
values.  These configuration bits are common across most instructions,
but may have a different operand index depending on the instruction type.
It is useful to have a convenient way to look up the operand indices,
so these bits can be generically set on any instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184879 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoX86 cost model: Vectorizing integer division is a bad idea
Arnold Schwaighofer [Tue, 25 Jun 2013 19:14:09 +0000 (19:14 +0000)]
X86 cost model: Vectorizing integer division is a bad idea

radar://14057959

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184872 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix SROA to avoid unnecessary scalar conversions for 1-element vectors.
Bob Wilson [Tue, 25 Jun 2013 19:09:50 +0000 (19:09 +0000)]
Fix SROA to avoid unnecessary scalar conversions for 1-element vectors.

When a 1-element vector alloca is promoted, a store instruction can often be
rewritten without converting the value to a scalar and using an insertelement
instruction to stuff it into the new alloca.  This patch just adds a check
to skip that conversion when it is unnecessary.  This turns out to be really
important for some ARM Neon operations where <1 x i64> is used to get around
the fact that i64 is not a legal type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184870 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove unused code. No functionality change.
Manman Ren [Tue, 25 Jun 2013 18:49:55 +0000 (18:49 +0000)]
Remove unused code. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184866 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoThe GCDA 402 format won't have a second checksum either.
Bill Wendling [Tue, 25 Jun 2013 18:13:52 +0000 (18:13 +0000)]
The GCDA 402 format won't have a second checksum either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184864 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Support @got modifier
Ulrich Weigand [Tue, 25 Jun 2013 16:49:50 +0000 (16:49 +0000)]
[PowerPC] Support @got modifier

Add VK_... values and relocation types necessary to support
the @got family of modifiers.  Used by the asm parser only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184860 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMove GetEXESuffix to the one place it is used.
Rafael Espindola [Tue, 25 Jun 2013 14:42:30 +0000 (14:42 +0000)]
Move GetEXESuffix to the one place it is used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184853 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove sys::PathSeparator.
Rafael Espindola [Tue, 25 Jun 2013 14:32:45 +0000 (14:32 +0000)]
Remove sys::PathSeparator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184852 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Consolidate expansion of v2i32/v4i32 ops for EG/SI
Aaron Watry [Tue, 25 Jun 2013 13:55:57 +0000 (13:55 +0000)]
R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI

By default, we expand these operations for both EG and SI. Move the
duplicated code into a common space for now. If the targets ever actually
implement these operations as instructions, we can override that in the relevant
target.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184848 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Add v2i32 test for vselect
Aaron Watry [Tue, 25 Jun 2013 13:55:54 +0000 (13:55 +0000)]
R600: Add v2i32 test for vselect

Note: Only adding test for evergreen, not SI yet.

When I attempted to expand vselect for SI, I got the following:
llc: /home/awatry/src/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:522:
llvm::SDValue llvm::DAGTypeLegalizer::PromoteIntRes_SETCC(llvm::SDNode*):
Assertion `SVT.isVector() == N->getOperand(0).getValueType().isVector() &&
"Vector compare must return a vector result!"' failed.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184847 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Expand xor v2i32/v4i32
Aaron Watry [Tue, 25 Jun 2013 13:55:52 +0000 (13:55 +0000)]
R600/SI: Expand xor v2i32/v4i32

Add test cases for both vector sizes on SI and also add v2i32 test for EG.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184846 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Add v2i32 test for setcc on evergreen
Aaron Watry [Tue, 25 Jun 2013 13:55:49 +0000 (13:55 +0000)]
R600: Add v2i32 test for setcc on evergreen

No test/expansion for SI has been added yet. Attempts to expand this
operation for SI resulted in a stacktrace in (IIRC) LegalizeIntegerTypes
which was complaining about vector comparisons being required to return
a vector type.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184845 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Expand urem of v2i32/v4i32 for SI
Aaron Watry [Tue, 25 Jun 2013 13:55:46 +0000 (13:55 +0000)]
R600/SI: Expand urem of v2i32/v4i32 for SI

Also add lit test for both cases on SI, and v2i32 for evergreen.

Note: I followed the guidance of the v4i32 EG check... UREM produces really
complex code, so let's just check that the instruction was lowered
successfully.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184844 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Expand udiv v[24]i32 for SI and v2i32 for EG
Aaron Watry [Tue, 25 Jun 2013 13:55:43 +0000 (13:55 +0000)]
R600/SI: Expand udiv v[24]i32 for SI and v2i32 for EG

Also add lit test for both cases on SI, and v2i32 for evergreen.

Note: I followed the guidance of the v4i32 EG check... UDIV produces really
complex code, so let's just check that the instruction was lowered
successfully.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184843 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Expand ashr of v2i32/v4i32 for SI
Aaron Watry [Tue, 25 Jun 2013 13:55:40 +0000 (13:55 +0000)]
R600/SI: Expand ashr of v2i32/v4i32 for SI

Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184842 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Expand srl of v2i32/v4i32 for SI
Aaron Watry [Tue, 25 Jun 2013 13:55:37 +0000 (13:55 +0000)]
R600/SI: Expand srl of v2i32/v4i32 for SI

Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184841 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Expand shl of v2i32/v4i32 for SI
Aaron Watry [Tue, 25 Jun 2013 13:55:32 +0000 (13:55 +0000)]
R600/SI: Expand shl of v2i32/v4i32 for SI

Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184840 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Expand or of v2i32/v4i32 for SI
Aaron Watry [Tue, 25 Jun 2013 13:55:29 +0000 (13:55 +0000)]
R600/SI: Expand or of v2i32/v4i32 for SI

Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184839 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Expand mul of v2i32/v4i32 for SI
Aaron Watry [Tue, 25 Jun 2013 13:55:26 +0000 (13:55 +0000)]
R600/SI: Expand mul of v2i32/v4i32 for SI

Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184838 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Expand and of v2i32/v4i32 for SI
Aaron Watry [Tue, 25 Jun 2013 13:55:23 +0000 (13:55 +0000)]
R600/SI: Expand and of v2i32/v4i32 for SI

Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184837 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoBlockFrequency: Bump up the entry frequency a bit.
Benjamin Kramer [Tue, 25 Jun 2013 13:34:40 +0000 (13:34 +0000)]
BlockFrequency: Bump up the entry frequency a bit.

This is a band-aid to fix the most severe regressions we're seeing from basing
spill decisions on block frequencies, until we have a better solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184835 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Add extended rotate/shift mnemonics
Ulrich Weigand [Tue, 25 Jun 2013 13:17:41 +0000 (13:17 +0000)]
[PowerPC] Add extended rotate/shift mnemonics

This adds all missing extended rotate/shift mnemonics to the asm parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184834 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Add rldcr/rldic instructions
Ulrich Weigand [Tue, 25 Jun 2013 13:17:10 +0000 (13:17 +0000)]
[PowerPC] Add rldcr/rldic instructions

This adds pattern for the rldcr and rldic instructions (the last instruction
from the rotate/shift family that were missing).  They are currently used
only by the asm parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184833 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Add extended subtract mnemonics
Ulrich Weigand [Tue, 25 Jun 2013 13:16:48 +0000 (13:16 +0000)]
[PowerPC] Add extended subtract mnemonics

This adds support for the extended subtract mnemonics to the asm parser:
   subi
   subis
   subic
   subic.
   sub
   sub.
   subc
   subc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184832 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[NVPTX] Default pointer type doesn't make sense for getParamSymbol()
Justin Holewinski [Tue, 25 Jun 2013 12:22:21 +0000 (12:22 +0000)]
[NVPTX] Default pointer type doesn't make sense for getParamSymbol()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184831 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix a typo in the code that collected the costs recursively.
Nadav Rotem [Tue, 25 Jun 2013 05:30:56 +0000 (05:30 +0000)]
Fix a typo in the code that collected the costs recursively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184827 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agokeep only the StringRef version of getFileOrSTDIN.
Rafael Espindola [Tue, 25 Jun 2013 05:28:34 +0000 (05:28 +0000)]
keep only the StringRef version of getFileOrSTDIN.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184826 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't assume ResultPath is null terminated.
Rafael Espindola [Tue, 25 Jun 2013 04:23:46 +0000 (04:23 +0000)]
Don't assume ResultPath is null terminated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184824 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert "Temporarily enable MI-Sched on X86."
Andrew Trick [Tue, 25 Jun 2013 02:48:58 +0000 (02:48 +0000)]
Revert "Temporarily enable MI-Sched on X86."

This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184823 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Report unaligned memory accesses as legal for > 32-bit types
Tom Stellard [Tue, 25 Jun 2013 02:39:35 +0000 (02:39 +0000)]
R600/SI: Report unaligned memory accesses as legal for > 32-bit types

In reality, some unaligned memory accesses are legal for 32-bit types and
smaller too, but it all depends on the address space.  Allowing
unaligned loads/stores for > 32-bit types is mainly to prevent the
legalizer from splitting one load into multiple loads of smaller types.

https://bugs.freedesktop.org/show_bug.cgi?id=65873

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184822 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Add support for i32 loads from the constant address space on Cayman
Tom Stellard [Tue, 25 Jun 2013 02:39:30 +0000 (02:39 +0000)]
R600: Add support for i32 loads from the constant address space on Cayman

Tested-By: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184821 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600/SI: Add support for v4i32 and v4f32 kernel args
Tom Stellard [Tue, 25 Jun 2013 02:39:25 +0000 (02:39 +0000)]
R600/SI: Add support for v4i32 and v4f32 kernel args

Tested-By: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184820 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Fix typo in R600Schedule.td
Tom Stellard [Tue, 25 Jun 2013 02:39:20 +0000 (02:39 +0000)]
R600: Fix typo in R600Schedule.td

This should only make a difference in programs that use a lot of the
vector ALU instructions like BFI_INT and BIT_ALIGN.  There is a slight
improvement in the phatk bitcoin mining kernel with this patch on
Evergreen (vector size == 1):

Before:
1173 Instruction Groups / 9520 dwords

After:
1167 Instruction Groups / 9510 dwords

Reviewed-by: Reviewed-by: Vincent Lejeune<vljn at ovi.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184819 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPCAsmParser.cpp: Quote "@l/@ha" in comments. [-Wdocumentation]
NAKAMURA Takumi [Tue, 25 Jun 2013 01:14:20 +0000 (01:14 +0000)]
PPCAsmParser.cpp: Quote "@l/@ha" in comments. [-Wdocumentation]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184809 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd an autoconf option for turning on -gsplit-dwarf by default
Eric Christopher [Tue, 25 Jun 2013 01:12:25 +0000 (01:12 +0000)]
Add an autoconf option for turning on -gsplit-dwarf by default
when building llvm. This saves quite a bit of time and space when
linking. Please report any problems via bugzilla.

Caveats:

a) This will only work on linux
b) This requires a fairly new binutils
c) This requires a fairly new gdb

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184808 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCreate a replacement for sys::Path::PathSeparator.
Rafael Espindola [Tue, 25 Jun 2013 01:10:36 +0000 (01:10 +0000)]
Create a replacement for sys::Path::PathSeparator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184806 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCleanup in unique_file when we only want the name.
Rafael Espindola [Tue, 25 Jun 2013 00:49:40 +0000 (00:49 +0000)]
Cleanup in unique_file when we only want the name.

This is really ugly, but it is no worse than what we have in clang right now and
it is better to get it working first and clean/optimize it afterwards.

Will be tested from clang in the next patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184802 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAs far as I know no linker needs or wants the -g flag.
Eric Christopher [Tue, 25 Jun 2013 00:40:03 +0000 (00:40 +0000)]
As far as I know no linker needs or wants the -g flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184800 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove all non-linker oriented compile options from the linker
Eric Christopher [Mon, 24 Jun 2013 23:20:04 +0000 (23:20 +0000)]
Remove all non-linker oriented compile options from the linker
command line. Change the darwin universal binary options to
be TargetCommonOpts so that they'll be passed to the linker since
-arch at least is still needed.

Someone on darwin with a buildit based build should probably verify
that this doesn't break anything there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184793 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago80-column and tab character fixes.
Eric Christopher [Mon, 24 Jun 2013 23:20:02 +0000 (23:20 +0000)]
80-column and tab character fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184792 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFormatting.
Eric Christopher [Mon, 24 Jun 2013 21:34:55 +0000 (21:34 +0000)]
Formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184788 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agotypo.
Adrian Prantl [Mon, 24 Jun 2013 21:19:43 +0000 (21:19 +0000)]
typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184783 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse const references instead of pointers to references that are
Eric Christopher [Mon, 24 Jun 2013 21:07:27 +0000 (21:07 +0000)]
Use const references instead of pointers to references that are
never modified. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184781 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Support some miscellaneous mnemonics in the asm parser
Ulrich Weigand [Mon, 24 Jun 2013 18:08:03 +0000 (18:08 +0000)]
[PowerPC] Support some miscellaneous mnemonics in the asm parser

This adds support for the following extended mnemonics:
  xnop
  mr.
  not
  not.
  la

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184767 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a simpler version of is_regular_file.
Rafael Espindola [Mon, 24 Jun 2013 17:54:24 +0000 (17:54 +0000)]
Add a simpler version of is_regular_file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184764 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDebugInfo: DIBuilder changes to match DIEnumerator changes in r184694
David Blaikie [Mon, 24 Jun 2013 17:34:33 +0000 (17:34 +0000)]
DebugInfo: DIBuilder changes to match DIEnumerator changes in r184694

Representing enumerators by int64 instead of uint64 for now. At some
point we need to address the underlying issue of representation
depending on the specific enumeration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184761 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoImprove diagnostics when getSizeInBits is called on the Other type.
Chad Rosier [Mon, 24 Jun 2013 17:29:51 +0000 (17:29 +0000)]
Improve diagnostics when getSizeInBits is called on the Other type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184760 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC: Remove default case from fully covered switch.
Benjamin Kramer [Mon, 24 Jun 2013 17:03:25 +0000 (17:03 +0000)]
PPC: Remove default case from fully covered switch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184758 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Add some FIXMEs
Ulrich Weigand [Mon, 24 Jun 2013 17:00:22 +0000 (17:00 +0000)]
[PowerPC] Add some FIXMEs

A bunch of extendend mnemomics ought to support '.' forms.
Add FIXMEs to the test case for those.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184757 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoR600: Fix spelling error in comment
Aaron Watry [Mon, 24 Jun 2013 16:57:57 +0000 (16:57 +0000)]
R600: Fix spelling error in comment

our -> or

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184756 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Add predicted forms of branches
Ulrich Weigand [Mon, 24 Jun 2013 16:52:04 +0000 (16:52 +0000)]
[PowerPC] Add predicted forms of branches

This adds support for the predicted forms of branches (+/-).
There are three cases to consider:
- Branches using a PPC::Predicate code
  For these, I've added new PPC::Predicate codes corresponding
  to the BO values for predicted branch forms, and updated insn
  printing to print them correctly.  I've also added new aliases
  for the asm parser matching the new forms.
- bt/bf
  I've added new aliases matching to gBC etc.
- bd(n)z variants
  I've added new instruction patterns for the predicted forms.

In all cases, the new patterns are used for the asm parser only.
(The new infrastructure ought to be sufficient to allow use by
the compiler too at some point.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184754 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMove llvm/test/DebugInfo/arguments.ll to X86, for now. It is still Windows' PECOFF...
NAKAMURA Takumi [Mon, 24 Jun 2013 16:05:21 +0000 (16:05 +0000)]
Move llvm/test/DebugInfo/arguments.ll to X86, for now. It is still Windows' PECOFF incompatible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184750 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRename the variable to fix a warning. Thanks Andy Gibbs.
Nadav Rotem [Mon, 24 Jun 2013 15:59:47 +0000 (15:59 +0000)]
Rename the variable to fix a warning. Thanks Andy Gibbs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184749 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoLook for Python 2 before Python 3 in CMakeLists.txt
Reid Kleckner [Mon, 24 Jun 2013 13:21:16 +0000 (13:21 +0000)]
Look for Python 2 before Python 3 in CMakeLists.txt

All of LLVM's Python scripts only support Python 2 for widely understood
reasons.

Patch by Yonggang Luo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184732 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agollvm/test/CodeGen/X86: Add explicit -mtriple=x86_64-unknown-unknown.
NAKAMURA Takumi [Mon, 24 Jun 2013 13:19:59 +0000 (13:19 +0000)]
llvm/test/CodeGen/X86: Add explicit -mtriple=x86_64-unknown-unknown.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184731 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agollvm/test/CodeGen/X86/legalize-shift-64.ll: Add explicit -mtriple=i686-unknown-unknown.
NAKAMURA Takumi [Mon, 24 Jun 2013 13:19:52 +0000 (13:19 +0000)]
llvm/test/CodeGen/X86/legalize-shift-64.ll: Add explicit -mtriple=i686-unknown-unknown.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184730 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agollvm/test/DebugInfo/arguments.ll: Add explicit -mtriple=x86_64-unknown-unknown.
NAKAMURA Takumi [Mon, 24 Jun 2013 13:19:47 +0000 (13:19 +0000)]
llvm/test/DebugInfo/arguments.ll: Add explicit -mtriple=x86_64-unknown-unknown.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184729 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoNVPTXTargetObjectFile.h: Initialize some pointers as NULL in the constructor of NVPTX...
NAKAMURA Takumi [Mon, 24 Jun 2013 13:19:41 +0000 (13:19 +0000)]
NVPTXTargetObjectFile.h: Initialize some pointers as NULL in the constructor of NVPTXTargetObjectFile. ~NVPTXTargetObjectFile() tries to delete them.

It caused crash on some hosts since r184595.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184728 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Add t/f branch mnemonics to asm parser
Ulrich Weigand [Mon, 24 Jun 2013 12:49:20 +0000 (12:49 +0000)]
[PowerPC] Add t/f branch mnemonics to asm parser

This adds the bt/bf/bd(n)zt/bd(n)zf mnemonics as aliases for the
asm parser, resolving to the generic conditional patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184725 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoReapply 184685 after the SetVector iteration order fix.
Arnold Schwaighofer [Mon, 24 Jun 2013 12:09:15 +0000 (12:09 +0000)]
Reapply 184685 after the SetVector iteration order fix.

This should hopefully have fixed the stage2/stage3 miscompare on the dragonegg
testers.

"LoopVectorize: Use the dependence test utility class

We now no longer need alias analysis - the cases that alias analysis would
handle are now handled as accesses with a large dependence distance.

We can now vectorize loops with simple constant dependence distances.

  for (i = 8; i < 256; ++i) {
    a[i] = a[i+4] * a[i+8];
  }

  for (i = 8; i < 256; ++i) {
    a[i] = a[i-4] * a[i-8];
  }

We would be able to vectorize about 200 more loops (in many cases the cost model
instructs us no to) in the test suite now. Results on x86-64 are a wash.

I have seen one degradation in ammp. Interestingly, the function in which we
now vectorize a loop is never executed so we probably see some instruction
cache effects. There is a 2% improvement in h264ref. There is one or the other
TSCV loop kernel that speeds up.

radar://13681598"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184724 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoLoopVectorize: Use SetVector for the access set
Arnold Schwaighofer [Mon, 24 Jun 2013 12:09:12 +0000 (12:09 +0000)]
LoopVectorize: Use SetVector for the access set

We are creating the runtime checks using this set so we need a deterministic
iteration order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184723 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Support generic conditional branches in asm parser
Ulrich Weigand [Mon, 24 Jun 2013 11:55:21 +0000 (11:55 +0000)]
[PowerPC] Support generic conditional branches in asm parser

This adds instruction patterns to cover the generic forms of
the conditional branch instructions.  This allows the assembler
to support the generic mnemonics.

The compiler will still generate the various specific forms
of the instruction that were already supported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184722 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Support absolute branches
Ulrich Weigand [Mon, 24 Jun 2013 11:03:33 +0000 (11:03 +0000)]
[PowerPC] Support absolute branches

There is currently only limited support for the "absolute" variants
of branch instructions.  This patch adds support for the absolute
variants of all branches that are currently otherwise supported.

This requires adding new fixup types so that the correct variant
of relocation type can be selected by the object writer.

While the compiler will continue to usually choose the relative
branch variants, this will allow the asm parser to fully support
the absolute branches, with either immediate (numerical) or
symbolic target addresses.

No change in code generation intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184721 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Support bd(n)zl and bd(n)zlrl
Ulrich Weigand [Mon, 24 Jun 2013 11:02:38 +0000 (11:02 +0000)]
[PowerPC] Support bd(n)zl and bd(n)zlrl

This adds support for the bd(n)zl and bd(n)zlrl instructions.
The patterns are currently used for the asm parser only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184720 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Support b(cond)l in the asm parser
Ulrich Weigand [Mon, 24 Jun 2013 11:02:19 +0000 (11:02 +0000)]
[PowerPC] Support b(cond)l in the asm parser

This patch adds support for the conditional variants of bl.
The pattern is currently used by the asm parser only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184719 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] Support blrl and variants in the asm parser
Ulrich Weigand [Mon, 24 Jun 2013 11:01:55 +0000 (11:01 +0000)]
[PowerPC] Support blrl and variants in the asm parser

This patch adds support for blrl and its conditional variants.
The patterns are (currently) used for the asm parser only.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184718 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago This patch introduces RegisterOperand class into Mips FPU instruction definitions...
Vladimir Medic [Mon, 24 Jun 2013 10:05:34 +0000 (10:05 +0000)]
 This patch introduces RegisterOperand class into Mips FPU instruction definitions and adds dedicated parser methods to MipsAsmParser. It is the first in a series of patches that should fix the problems with parsing Mips FPU instructions and optimize the code in MipsAsmParser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184716 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[APFloat] Removed trailing whitespace from unittests.
Michael Gottesman [Mon, 24 Jun 2013 09:58:09 +0000 (09:58 +0000)]
[APFloat] Removed trailing whitespace from unittests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184715 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[APFloat] Added a large unittest for APFloat.add that checks that special values...
Michael Gottesman [Mon, 24 Jun 2013 09:58:07 +0000 (09:58 +0000)]
[APFloat] Added a large unittest for APFloat.add that checks that special values are computed correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184714 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[APFloat] Added support for parsing float strings which contain {inf,-inf,NaN,-NaN}.
Michael Gottesman [Mon, 24 Jun 2013 09:58:05 +0000 (09:58 +0000)]
[APFloat] Added support for parsing float strings which contain {inf,-inf,NaN,-NaN}.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184713 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[APFloat] Added make{Zero,Inf} methods and implemented get{Zero,Inf} on top of them.
Michael Gottesman [Mon, 24 Jun 2013 09:58:02 +0000 (09:58 +0000)]
[APFloat] Added make{Zero,Inf} methods and implemented get{Zero,Inf} on top of them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184712 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[APFloat] Removed a assert from significandParts() which says that one can only acces...
Michael Gottesman [Mon, 24 Jun 2013 09:57:59 +0000 (09:57 +0000)]
[APFloat] Removed a assert from significandParts() which says that one can only access the significand of FiniteNonZero/NaN floats.

The method significandParts() is a helper method meant to ease access to
APFloat's significand by allowing the user to not need to be aware of whether or
not the APFloat is using memory allocated in the instance itself or in an
external array.

This assert says that one can only access the significand of FiniteNonZero/NaN
floats. This makes it cumbersome and more importantly dangerous when one wishes
to zero out the significand of a zero/infinity value since one will have to deal
with the aforementioned quandary related to how the memory in APFloat is
allocated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184711 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[APFloat] Rename macro convolve => PackCategoriesIntoKey so that it is clear what...
Michael Gottesman [Mon, 24 Jun 2013 09:57:57 +0000 (09:57 +0000)]
[APFloat] Rename macro convolve => PackCategoriesIntoKey so that it is clear what APFloat is actually using said macro for.

In the context of APFloat, seeing a macro called convolve suggests that APFloat
is using said value in some sort of convolution somewhere in the source code.
This is misleading.

I also added a documentation comment to the macro.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184710 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd -mcpu to some unit tests that only fail on certain hosts.
Andrew Trick [Mon, 24 Jun 2013 09:51:30 +0000 (09:51 +0000)]
Add -mcpu to some unit tests that only fail on certain hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184709 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: check predicate bits for thumb instructions
Amaury de la Vieuville [Mon, 24 Jun 2013 09:15:01 +0000 (09:15 +0000)]
ARM: check predicate bits for thumb instructions

When encoded to thumb, VFP instruction and VMOV/VDUP between scalar and
core registers, must have their predicate bit to 0b1110.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184707 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: rGPR is meant to be unpredictable, not undefined
Amaury de la Vieuville [Mon, 24 Jun 2013 09:14:54 +0000 (09:14 +0000)]
ARM: rGPR is meant to be unpredictable, not undefined

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184706 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTemporarily enable MI-Sched on X86.
Andrew Trick [Mon, 24 Jun 2013 09:13:20 +0000 (09:13 +0000)]
Temporarily enable MI-Sched on X86.

Sorry for the unit test churn. I'll try to make the change permanently
next time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184705 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: fix thumb1 nop decoding
Amaury de la Vieuville [Mon, 24 Jun 2013 09:11:53 +0000 (09:11 +0000)]
ARM: fix thumb1 nop decoding

In thumb1, NOP is a pseudo-instruction equivalent to mov r8, r8.
However the disassembler should not use this alias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184703 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: fix IT decoding
Amaury de la Vieuville [Mon, 24 Jun 2013 09:11:45 +0000 (09:11 +0000)]
ARM: fix IT decoding

mask == 0 -> UNPRED

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184702 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: enable decoding of pc-relative PLD/PLI
Amaury de la Vieuville [Mon, 24 Jun 2013 09:11:38 +0000 (09:11 +0000)]
ARM: enable decoding of pc-relative PLD/PLI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184701 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a flag to defer vectorization into a phase after the inliner and its
Chandler Carruth [Mon, 24 Jun 2013 07:21:47 +0000 (07:21 +0000)]
Add a flag to defer vectorization into a phase after the inliner and its
CGSCC pass manager. This should insulate the inlining decisions from the
vectorization decisions, however it may have both compile time and code
size problems so it is just an experimental option right now.

Adding this based on a discussion with Arnold and it seems at least
worth having this flag for us to both run some experiments to see if
this strategy is workable. It may solve some of the regressions seen
with the loop vectorizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184698 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFilter out dragonegg when checked out into a projects subdirectory.
Chandler Carruth [Mon, 24 Jun 2013 07:21:35 +0000 (07:21 +0000)]
Filter out dragonegg when checked out into a projects subdirectory.
There is some hope of eventually supporting a unified build with it, but
until then this lets me (and others) check it out in this location
without things breaking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184697 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDebugInfo: enumerator values returned as int64 as they are stored
David Blaikie [Mon, 24 Jun 2013 07:11:08 +0000 (07:11 +0000)]
DebugInfo: enumerator values returned as int64 as they are stored

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184694 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDebugInfo: add some testing from an overly broad end-to-end test in Clang
David Blaikie [Mon, 24 Jun 2013 06:47:22 +0000 (06:47 +0000)]
DebugInfo: add some testing from an overly broad end-to-end test in Clang

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184692 91177308-0d34-0410-b5e6-96231b3b80d8