David Majnemer [Tue, 19 Aug 2014 23:36:30 +0000 (23:36 +0000)]
InstCombine: Annotate sub with nsw when we prove it's safe
We can prove that a 'sub' can be a 'sub nsw' under certain conditions:
- The sign bits of the operands is the same.
- Both operands have more than 1 sign bit.
The subtraction cannot be a signed overflow in either case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216037
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Hans Wennborg [Tue, 19 Aug 2014 23:35:33 +0000 (23:35 +0000)]
BumpPtrAllocator: don't accept 0 for the alignment parameter
It seems unnecessary to have to use an extra branch to check for this special case.
http://reviews.llvm.org/D4945
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216036
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Juergen Ributzka [Tue, 19 Aug 2014 22:29:55 +0000 (22:29 +0000)]
[FastISel][AArch64] Factor out ADDS/SUBS instruction emission and add support for extensions and shift folding.
Factor out the ADDS/SUBS instruction emission code into helper functions and
make the helper functions more clever to support most of the different ADDS/SUBS
instructions the architecture support. This includes better immedediate support,
shift folding, and sign-/zero-extend folding.
This fixes <rdar://problem/
17913111>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216033
91177308-0d34-0410-b5e6-
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Rafael Espindola [Tue, 19 Aug 2014 22:05:47 +0000 (22:05 +0000)]
Split parseAssembly into parseAssembly and parseAssemblyInto.
This should restore the functionality of parsing new code into an existing
module without the confusing interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216031
91177308-0d34-0410-b5e6-
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Alexey Samsonov [Tue, 19 Aug 2014 21:51:08 +0000 (21:51 +0000)]
Delete unused argument in AArch64MCInstLower constructor: it doesn't
use Mangler, and Mangler is in fact not even created when AArch64MCInstLower
is constructed.
This bug is reported by UBSan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216030
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 21:48:04 +0000 (21:48 +0000)]
LangRef: Move example of function-scope uselistorder to a function
Should make the example added in r216025 a little more clear.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216027
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 21:30:15 +0000 (21:30 +0000)]
IR: Implement uselistorder assembly directives
Implement `uselistorder` and `uselistorder_bb` assembly directives,
which allow the use-list order to be recovered when round-tripping to
assembly.
This is the bulk of PR20515.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216025
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Lang Hames [Tue, 19 Aug 2014 21:26:36 +0000 (21:26 +0000)]
[MCJIT] Add an i386 RuntimeDyldMachO test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216024
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 21:18:21 +0000 (21:18 +0000)]
IR: Fix a missed case when threading OnlyIfReduced through ConstantExpr
In r216015 I missed propagating `OnlyIfReduced` through the inline
versions of `getGetElementPtr()` (I was relying on compile failures on
mismatches between the header and source signatures to get them all).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216023
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 21:08:27 +0000 (21:08 +0000)]
verify-uselistorder: Force -preserve-bc-use-list-order
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216022
91177308-0d34-0410-b5e6-
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Juergen Ributzka [Tue, 19 Aug 2014 20:35:07 +0000 (20:35 +0000)]
[FastISel][AArch64] Extend floating-point materialization test.
This adds the missing test that I promised for r215753 to test the
materialization of the floating-point value +0.0.
Related to <rdar://problem/
18027157>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216019
91177308-0d34-0410-b5e6-
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Rafael Espindola [Tue, 19 Aug 2014 20:06:25 +0000 (20:06 +0000)]
fix the gcc build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216018
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Lang Hames [Tue, 19 Aug 2014 20:04:45 +0000 (20:04 +0000)]
[MCJIT] Allow '$' characters in symbol names in RuntimeDyldChecker.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216017
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 20:03:35 +0000 (20:03 +0000)]
IR: Fix ConstantExpr::replaceUsesOfWithOnConstant()
Change `ConstantExpr` to follow the model the other constants are using:
only malloc a replacement if it's going to be used. This fixes a subtle
bug where if an API user had used `ConstantExpr::get()` already to
create the replacement but hadn't given it any users, we'd delete the
replacement.
This relies on r216015 to thread `OnlyIfReduced` through
`ConstantExpr::getWithOperands()`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216016
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 19:45:37 +0000 (19:45 +0000)]
IR: Thread OnlyIfReduced through ConstantExpr::getWithOperands()
In order to change `ConstantExpr::replaceUsesOfWithOnConstant()` to work
like other constants (e.g., using `ConstantArray::getImpl()`), thread
`OnlyIfReduced` through as necessary. When `OnlyIfReduced` is false,
there's no functionality change. When it's true, if there's no constant
folding or type changes `nullptr` is returned instead of the new
constant.
`ConstantExpr::replaceUsesOfWithOnConstant()` will be updated to use the
"true" version in a follow-up commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216015
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Rafael Espindola [Tue, 19 Aug 2014 19:45:15 +0000 (19:45 +0000)]
Fix the MSVC build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216014
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Juergen Ributzka [Tue, 19 Aug 2014 19:44:17 +0000 (19:44 +0000)]
Reapply [FastISel][AArch64] Add support for more addressing modes (r215597).
Note: This was originally reverted to track down a buildbot error. Reapply
without any modifications.
Original commit message:
FastISel didn't take much advantage of the different addressing modes available
to it on AArch64. This commit allows the ComputeAddress method to recognize more
addressing modes that allows shifts and sign-/zero-extensions to be folded into
the memory operation itself.
For Example:
lsl x1, x1, #3 --> ldr x0, [x0, x1, lsl #3]
ldr x0, [x0, x1]
sxtw x1, w1
lsl x1, x1, #3 --> ldr x0, [x0, x1, sxtw #3]
ldr x0, [x0, x1]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216013
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Juergen Ributzka [Tue, 19 Aug 2014 19:44:13 +0000 (19:44 +0000)]
Reapply [FastISel][X86] Add large code model support for materializing floating-point constants (r215595).
Note: This was originally reverted to track down a buildbot error. Reapply
without any modifications.
Original commit message:
In the large code model for X86 floating-point constants are placed in the
constant pool and materialized by loading from it. Since the constant pool
could be far away, a PC relative load might not work. Therefore we first
materialize the address of the constant pool with a movabsq and then load
from there the floating-point value.
Fixes <rdar://problem/
17674628>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216012
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Juergen Ributzka [Tue, 19 Aug 2014 19:44:10 +0000 (19:44 +0000)]
Reapply [FastISel][X86] Use XOR to materialize the "0" value (r215594).
Note: This was originally reverted to track down a buildbot error. Reapply
without any modifications.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216011
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Juergen Ributzka [Tue, 19 Aug 2014 19:44:06 +0000 (19:44 +0000)]
Reapply [FastISel][X86] Emit more efficient instructions for integer constant materialization (r215593).
Note: This was originally reverted to track down a buildbot error. Reapply
without any modifications.
Original commit message:
This mostly affects the i64 value type, which always resulted in an 15byte
mobavsq instruction to materialize any constant. The custom code checks the
value of the immediate and tries to use a different and smaller mov
instruction when possible.
This fixes <rdar://problem/
17420988>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216010
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Juergen Ributzka [Tue, 19 Aug 2014 19:44:02 +0000 (19:44 +0000)]
Reapply [FastISel][AArch64] Make use of the zero register when possible (r215591).
Note: This was originally reverted to track down a buildbot error. Reapply
without any modifications.
Original commit message:
This change materializes now the value "0" from the zero register.
The zero register can be folded by several instruction, so no
materialization is need at all.
Fixes <rdar://problem/
17924413>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216009
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 19:18:46 +0000 (19:18 +0000)]
ADT: Unit test for ArrayRef::equals change in r215986
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216008
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 19:13:30 +0000 (19:13 +0000)]
IR: De-duplicate code for replacing operands in place
This is non-trivial and sits in three places. Move it to
ConstantUniqueMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216007
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Juergen Ributzka [Tue, 19 Aug 2014 19:05:24 +0000 (19:05 +0000)]
Reapply [FastISel] Let the target decide first if it wants to materialize a constant (215588).
Note: This was originally reverted to track down a buildbot error. This commit
exposed a latent bug that was fixed in r215753. Therefore it is reapplied
without any modifications.
I run it through SPEC2k and SPEC2k6 for AArch64 and it didn't introduce any new
regeressions.
Original commit message:
This changes the order in which FastISel tries to materialize a constant.
Originally it would try to use a simple target-independent approach, which
can lead to the generation of inefficient code.
On X86 this would result in the use of movabsq to materialize any 64bit
integer constant - even for simple and small values such as 0 and 1. Also
some very funny floating-point materialization could be observed too.
On AArch64 it would materialize the constant 0 in a register even the
architecture has an actual "zero" register.
On ARM it would generate unnecessary mov instructions or not use mvn.
This change simply changes the order and always asks the target first if it
likes to materialize the constant. This doesn't fix all the issues
mentioned above, but it enables the targets to implement such
optimizations.
Related to <rdar://problem/
17420988>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216006
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Rafael Espindola [Tue, 19 Aug 2014 18:59:14 +0000 (18:59 +0000)]
Fix a pair of use after free. Should bring the bots back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216005
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Rafael Espindola [Tue, 19 Aug 2014 18:44:46 +0000 (18:44 +0000)]
Don't own the buffer in object::Binary.
Owning the buffer is somewhat inflexible. Some Binaries have sub Binaries
(like Archive) and we had to create dummy buffers just to handle that. It is
also a bad fit for IRObjectFile where the Module wants to own the buffer too.
Keeping this ownership would make supporting IR inside native objects
particularly painful.
This patch focuses in lib/Object. If something elsewhere used to own an Binary,
now it also owns a MemoryBuffer.
This patch introduces a few new types.
* MemoryBufferRef. This is just a pair of StringRefs for the data and name.
This is to MemoryBuffer as StringRef is to std::string.
* OwningBinary. A combination of Binary and a MemoryBuffer. This is needed
for convenience functions that take a filename and return both the
buffer and the Binary using that buffer.
The C api now uses OwningBinary to avoid any change in semantics. I will start
a new thread to see if we want to change it and how.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216002
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Alexey Samsonov [Tue, 19 Aug 2014 18:40:39 +0000 (18:40 +0000)]
Hide two different AlignMode enums in anonymous namespaces. This bug is reported by UBSan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216001
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Renato Golin [Tue, 19 Aug 2014 18:08:50 +0000 (18:08 +0000)]
Revert "Small refactor on VectorizerHint for deduplication"
This reverts commit r215994 because MSVC 2012 can't cope with its C++11 goodness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215999
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Juergen Ributzka [Tue, 19 Aug 2014 17:41:53 +0000 (17:41 +0000)]
[FastISel][AArch64] Fix a few BuildMI callsites where the result register was added as an operand register.
This fixes a few BuildMI callsites where the result register was added by
using addReg, which is per default a use and therefore an operand register.
Also use the zero register as result register when emitting a compare
instruction (SUBS with unused result register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215997
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Renato Golin [Tue, 19 Aug 2014 17:30:43 +0000 (17:30 +0000)]
Small refactor on VectorizerHint for deduplication
Previously, the hint mechanism relied on clean up passes to remove redundant
metadata, which still showed up if running opt at low levels of optimization.
That also has shown that multiple nodes of the same type, but with different
values could still coexist, even if temporary, and cause confusion if the
next pass got the wrong value.
This patch makes sure that, if metadata already exists in a loop, the hint
mechanism will never append a new node, but always replace the existing one.
It also enhances the algorithm to cope with more metadata types in the future
by just adding a new type, not a lot of code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215994
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Alex Lorenz [Tue, 19 Aug 2014 17:05:58 +0000 (17:05 +0000)]
Docs: add documentation for the coverage mapping format.
Differential Revision: http://reviews.llvm.org/D4729
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215990
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Rafael Espindola [Tue, 19 Aug 2014 16:58:54 +0000 (16:58 +0000)]
Modernize the .ll parsing interface.
* Use StringRef instead of std::string&
* Return a std::unique_ptr<Module> instead of taking an optional module to write
to (was not really used).
* Use current comment style.
* Use current naming convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215989
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 16:49:40 +0000 (16:49 +0000)]
CodingStandards: Document std::equal misbehaviour
I should have included this as part of r215986, which worked around this
corner by changing ArrayRef::equals() not to use std::equal. Alas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215988
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 16:39:58 +0000 (16:39 +0000)]
Reapply r215966, r215965, r215964, r215963, r215960, r215959, r215958, and r215957
This reverts commit r215981, which reverted the above commits because
MSVC std::equal asserts on nullptr iterators, and thes commits
introduced an `ArrayRef::equals()` on empty ArrayRefs.
ArrayRef was changed not to use std::equal in r215986.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215987
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 16:36:21 +0000 (16:36 +0000)]
ADT: Avoid using std::equal in ArrayRef::equals
MSVC's STL has a bug in `std::equal()`: it asserts on nullptr iterators,
causing a block revert in r215981. This works around that by re-writing
`ArrayRef::equals()` to do the work itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215986
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Aaron Ballman [Tue, 19 Aug 2014 14:59:02 +0000 (14:59 +0000)]
Reverting r215966, r215965, r215964, r215963, r215960, r215959, r215958, and r215957 (these commits all rely on previous commits) due to build breakage. These commits cause failed assertions when testing Clang using MSVC 2013. The asserts are triggered from the std::equal call within ArrayRef::equals due to being passed invalid input (ArrayRef.begin() is returning a nullptr which is problematic).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215981
91177308-0d34-0410-b5e6-
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Toma Tabacu [Tue, 19 Aug 2014 14:22:52 +0000 (14:22 +0000)]
[mips] Add assembler support for .set arch=x directive.
Summary:
This directive is similar to ".set mipsX".
It is used to change the CPU target of the assembler, enabling it to accept instructions for a specific CPU.
This patch only implements the r4000 CPU (which is treated internally as generic mips3) and the generic ISAs.
Contains work done by Matheus Almeida.
Reviewers: dsanders
Reviewed By: dsanders
Differential Revision: http://reviews.llvm.org/D4884
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215978
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Mayur Pandey [Tue, 19 Aug 2014 08:19:19 +0000 (08:19 +0000)]
InstCombine: ((A & ~B) ^ (~A & B)) to A ^ B
Proof using CVC3 follows:
$ cat t.cvc
A, B : BITVECTOR(32);
QUERY BVXOR((A & ~B),(~A & B)) = BVXOR(A,B);
$ cvc3 t.cvc
Valid.
Differential Revision: http://reviews.llvm.org/D4898
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215974
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Craig Topper [Tue, 19 Aug 2014 07:44:27 +0000 (07:44 +0000)]
Const-correct and prevent a copy of a SmallPtrSet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215973
91177308-0d34-0410-b5e6-
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Craig Topper [Tue, 19 Aug 2014 06:57:14 +0000 (06:57 +0000)]
Prevent use of the implicit copy constructor on SmallPtrSetImpl. An accidental copy caused my SmallPtrSet->SmallPtrSetImpl conversion commit to fail the other day.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215971
91177308-0d34-0410-b5e6-
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Mayur Pandey [Tue, 19 Aug 2014 06:41:55 +0000 (06:41 +0000)]
test commit (spelling correction)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215970
91177308-0d34-0410-b5e6-
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Rafael Espindola [Tue, 19 Aug 2014 04:04:25 +0000 (04:04 +0000)]
Make it explicit that ExecutionEngine takes ownership of the modules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215967
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 02:24:46 +0000 (02:24 +0000)]
IR: Reduce RAUW traffic in ConstantVector
Avoid creating a new `ConstantVector` on an RAUW of one of its members.
This reduces RAUW traffic on any containing constant.
This is part of PR20515.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215966
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 02:21:00 +0000 (02:21 +0000)]
IR: Fix ConstantArray::replaceUsesOfWithOnConstant()
Previously, `ConstantArray::replaceUsesOfWithOnConstant()` neglected to
check whether it becomes a `ConstantDataArray`. Call
`ConstantArray::getImpl()` to check for that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215965
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 02:16:51 +0000 (02:16 +0000)]
IR: Factor out replaceUsesOfWithOnConstantImpl(), NFC
Factor out common code, and take advantage of the new function to
add early returns to the callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215964
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 02:11:30 +0000 (02:11 +0000)]
IR: Split up Constant{Array,Vector}::get(), NFC
Introduce `getImpl()` that tries the simplification logic from `get()`
and then gives up. This allows the logic to be reused elsewhere in a
follow-up commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215963
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Akira Hatanaka [Tue, 19 Aug 2014 02:09:57 +0000 (02:09 +0000)]
[X86, X87 stackifier] Do not mark an operand of a debug instruction as kill.
<rdar://problem/
16952634>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215962
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 01:12:53 +0000 (01:12 +0000)]
IR: Reduce RAUW traffic in ConstantExpr
Avoid RAUW-ing `ConstantExpr` when an operand changes unless the new
`ConstantExpr` already has users. This prevents the RAUW from rippling
up the expression tree unnecessarily.
This commit indirectly adds test coverage for r215953 (this is how I
came across the bug).
This is part of PR20515.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215960
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 01:02:18 +0000 (01:02 +0000)]
IR: Replace uses of ConstantAggrUniqueMap with ConstantUniqueMap
Now that `ConstantAggrUniqueMap` and `ConstantUniqueMap` work the same
way, change the aggregates to use the new one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215959
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 00:55:34 +0000 (00:55 +0000)]
Remove extraneous typenames from r215957
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215958
91177308-0d34-0410-b5e6-
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 00:42:32 +0000 (00:42 +0000)]
IR: Rewrite ConstantUniqueMap
Rewrite `ConstantUniqueMap` to be more similar to
`ConstantAggrUniqueMap`.
- Use a `DenseMap` with custom MapInfo instead of a `std::map` with
linear lookups and deletion.
- Don't waste memory explicitly storing (heavyweight) keys.
Only `ConstantExpr` and `InlineAsm` actually use this data structure, so
I also updated them to use it.
This code cleanup is a precursor to reducing RAUW traffic on
`ConstantExpr` -- I felt badly adding a new (linear) call to
`ConstantUniqueMap::FindExistingKey`, so this designs away the concern.
A follow-up commit will transition the users of `ConstantAggrUniqueMap`
over.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215957
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 00:24:26 +0000 (00:24 +0000)]
IR: Declare LookupKey right before its use, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215956
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 00:23:17 +0000 (00:23 +0000)]
IR: ArrayRef-ize {Insert,Extract}ValueConstantExpr constructors
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215955
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 00:21:04 +0000 (00:21 +0000)]
Prevent clang-format from moving the namespace closing brace, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215954
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 00:20:02 +0000 (00:20 +0000)]
NVPTX: Use RAUW instead of reinventing the wheel
This code had a homemade RAUW that was incorrect when a user was a
constant: instead of calling `replaceUsersWithOnConstant()` it would
incorrectly update the operand in-place, invalidating
`LLVMContextImpl::ExprConstants`. RAUW does the job better.
The ValueHandle that `GVMap` is holding onto needs to be removed first,
so this commit also removes each variable from the map on-the-fly.
Since deletions from `ExprConstants` use a linear search that compares
directly on the pointer value (instead of using the key), there isn't an
obvious way to expose this with a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215953
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Duncan P. N. Exon Smith [Tue, 19 Aug 2014 00:13:19 +0000 (00:13 +0000)]
LLParser: Handle BlockAddresses on-the-fly
Previously all `blockaddress()` constants were treated as forward
references. They were resolved twice: once at the end of the function
in question, and again at the end of the module. Furthermore, if the
same blockaddress was referenced N times, the parser created N distinct
`GlobalVariable`s (one for each reference).
Instead, resolve all block addresses at the beginning of the function,
creating the standard `BasicBlock` forward references used for all other
basic block references. After the function, all references can be
resolved immediately. To check for the condition of parsing block
addresses from within the same function, I created a reference to the
current per-function-state in `BlockAddressPFS`.
Also, create only one forward-reference per basic block. Because
forward references to block addresses are rare, the data structure here
shouldn't matter. If somehow it does someday, this can be pretty easily
changed to a `DenseMap<std::pair<ValID, ValID>, GV>`.
This is part of PR20515.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215952
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Duncan P. N. Exon Smith [Mon, 18 Aug 2014 23:44:14 +0000 (23:44 +0000)]
verify-uselistorder: Call verifyModule() and improve output
Call `verifyModule()` after parsing and after every transformation.
Also convert some `DEBUG(dbgs())` to `errs()` to increase visibility
into what's going on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215951
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Rafael Espindola [Mon, 18 Aug 2014 23:15:59 +0000 (23:15 +0000)]
Use a range loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215948
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Rafael Espindola [Mon, 18 Aug 2014 22:28:28 +0000 (22:28 +0000)]
These classes only need a StringRef, not a MemoryBuffer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215945
91177308-0d34-0410-b5e6-
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Rafael Espindola [Mon, 18 Aug 2014 22:20:18 +0000 (22:20 +0000)]
Delete unused method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215944
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Robin Morisset [Mon, 18 Aug 2014 22:18:14 +0000 (22:18 +0000)]
Answer to Philip Reames comments
- add check for volatile (probably unneeded, but I agree that we should be conservative about it).
- strengthen condition from isUnordered() to isSimple(), as I don't understand well enough Unordered semantics (and it also matches the comment better this way) to be confident in the previous behaviour (thanks for catching that one, I had missed the case Monotonic/Unordered).
- separate a condition in two.
- lengthen comment about aliasing and loads
- add tests in GVN/atomic.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215943
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Robin Morisset [Mon, 18 Aug 2014 22:18:11 +0000 (22:18 +0000)]
Weak relaxing of the constraints on atomics in MemoryDependencyAnalysis
Monotonic accesses do not have to kill the analysis, as long as the QueryInstr is not
itself atomic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215942
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Lang Hames [Mon, 18 Aug 2014 21:43:16 +0000 (21:43 +0000)]
[MCJIT] Respect target endianness in RuntimeDyldMachO and RuntimeDyldChecker.
This patch may address some of the issues described in http://llvm.org/PR20640.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215938
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Kevin Enderby [Mon, 18 Aug 2014 20:21:02 +0000 (20:21 +0000)]
Make llvm-objdump handle both arm and thumb disassembly from the same Mach-O
file with -macho, the Mach-O specific object file parser option.
After some discussion I chose to do this implementation contained in the logic
of llvm-objdump’s MachODump.cpp using a second disassembler for thumb when
needed and with updates mostly contained in the MachOObjectFile class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215931
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Quentin Colombet [Mon, 18 Aug 2014 17:56:01 +0000 (17:56 +0000)]
[X86][Haswell][SchedModel] Tidy up.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215924
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Quentin Colombet [Mon, 18 Aug 2014 17:55:59 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Other instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215923
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Quentin Colombet [Mon, 18 Aug 2014 17:55:56 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Logic instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215922
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Quentin Colombet [Mon, 18 Aug 2014 17:55:53 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Math instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215921
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Quentin Colombet [Mon, 18 Aug 2014 17:55:51 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Arithmetic instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215920
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Quentin Colombet [Mon, 18 Aug 2014 17:55:49 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Conversion instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215919
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Quentin Colombet [Mon, 18 Aug 2014 17:55:46 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Move instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215918
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Quentin Colombet [Mon, 18 Aug 2014 17:55:43 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Other instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215917
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Quentin Colombet [Mon, 18 Aug 2014 17:55:41 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Logic instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215916
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Quentin Colombet [Mon, 18 Aug 2014 17:55:39 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Arithmetic instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215915
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Quentin Colombet [Mon, 18 Aug 2014 17:55:36 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Move instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215914
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Quentin Colombet [Mon, 18 Aug 2014 17:55:32 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Math instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215913
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Quentin Colombet [Mon, 18 Aug 2014 17:55:29 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Arithmetic instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215912
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Quentin Colombet [Mon, 18 Aug 2014 17:55:26 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Move instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215911
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Quentin Colombet [Mon, 18 Aug 2014 17:55:23 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Other instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215910
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Quentin Colombet [Mon, 18 Aug 2014 17:55:21 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Synchronization instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215909
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Quentin Colombet [Mon, 18 Aug 2014 17:55:19 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: String instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215908
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Quentin Colombet [Mon, 18 Aug 2014 17:55:16 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Control transfer instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215907
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Quentin Colombet [Mon, 18 Aug 2014 17:55:13 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Logic instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215906
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Quentin Colombet [Mon, 18 Aug 2014 17:55:11 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Arithmetic instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215905
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Quentin Colombet [Mon, 18 Aug 2014 17:55:08 +0000 (17:55 +0000)]
[X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Move instructions.
<rdar://problem/
15607571>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215904
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Robin Morisset [Mon, 18 Aug 2014 16:48:58 +0000 (16:48 +0000)]
Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends
Summary:
Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends
These helper functions are introduced in D4844.
Depends D4844
Test Plan: make check-all passes
Reviewers: jfb
Subscribers: aemerson, llvm-commits, mcrosier, reames
Differential Revision: http://reviews.llvm.org/D4937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215902
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Aaron Ballman [Mon, 18 Aug 2014 14:54:22 +0000 (14:54 +0000)]
Disabling an MSVC warning ('var' : definition from the for loop is ignored; the definition from the enclosing scope is used) which will trigger false positives more than true positives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215895
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Oliver Stannard [Mon, 18 Aug 2014 14:22:39 +0000 (14:22 +0000)]
Teach the AArch64 backend to handle f16
This allows the AArch64 backend to handle fadd, fsub, fmul and fdiv
operations on f16 (half-precision) types by promoting to f32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215891
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Oliver Stannard [Mon, 18 Aug 2014 12:42:15 +0000 (12:42 +0000)]
[ARM,AArch64] Do not tail-call to an externally-defined function with weak linkage
Externally-defined functions with weak linkage should not be
tail-called on ARM or AArch64, as the AAELF spec requires normal calls
to undefined weak functions to be replaced with a NOP or jump to the
next instruction. The behaviour of branch instructions in this
situation (as used for tail calls) is implementation-defined, so we
cannot rely on the linker replacing the tail call with a return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215890
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Elena Demikhovsky [Mon, 18 Aug 2014 11:59:06 +0000 (11:59 +0000)]
AVX-512: Fixed a bug in emitting compare for MVT:i1 type.
Added a test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215889
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Aaron Ballman [Mon, 18 Aug 2014 11:51:41 +0000 (11:51 +0000)]
Silencing an MSVC warning about loop variable conflicting with a variable from an outer scope. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215888
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Tim Northover [Mon, 18 Aug 2014 11:49:42 +0000 (11:49 +0000)]
TableGen: allow use of uint64_t for available features mask.
ARM in particular is getting dangerously close to exceeding 32 bits worth of
possible subtarget features. When this happens, various parts of MC start to
fail inexplicably as masks get truncated to "unsigned".
Mostly just refactoring at present, and there's probably no way to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215887
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Abramo Bagnara [Mon, 18 Aug 2014 07:48:18 +0000 (07:48 +0000)]
Added forgotten noexcept.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215886
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Craig Topper [Mon, 18 Aug 2014 00:24:38 +0000 (00:24 +0000)]
Revert "Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size."
Getting a weird buildbot failure that I need to investigate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215870
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Craig Topper [Sun, 17 Aug 2014 23:47:00 +0000 (23:47 +0000)]
Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215868
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Rafael Espindola [Sun, 17 Aug 2014 23:38:08 +0000 (23:38 +0000)]
Use copy initialization to initialize std::unique_ptr.
Thanks to David Blaikie for the suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215867
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Saleem Abdulrasool [Sun, 17 Aug 2014 22:51:04 +0000 (22:51 +0000)]
ARM: mark missing functions from RTABI
Simply indicate the functions that are part of the runtime library that we do
not setup libcalls for. This is merely for ease of identification. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215863
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Saleem Abdulrasool [Sun, 17 Aug 2014 22:51:02 +0000 (22:51 +0000)]
ARM: improve RTABI 4.2 conformance on Linux
The set of functions defined in the RTABI was separated for no real reason.
This brings us closer to proper utilisation of the functions defined by the
RTABI. It also sets the ground for correctly emitting function calls to AEABI
functions on all AEABI conforming platforms.
The previously existing lie on the behaviour of __ldivmod and __uldivmod is
propagated as it is beyond the scope of the change.
The changes to the test are due to the fact that we now use the divmod functions
which return both the quotient and remainder and thus we no longer need to
invoke two functions on Linux (making it closer to EABI's behaviour).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215862
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Saleem Abdulrasool [Sun, 17 Aug 2014 22:50:59 +0000 (22:50 +0000)]
ARM: whitespace
Whitespace fix, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215861
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Rafael Espindola [Sun, 17 Aug 2014 22:48:55 +0000 (22:48 +0000)]
Remove unused member variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215860
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