Bruno Cardoso Lopes [Tue, 9 Aug 2011 05:48:01 +0000 (05:48 +0000)]
Handle sitofp between v4f64 <- v4i32. Fix PR10559
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137114
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Bob Wilson [Tue, 9 Aug 2011 05:13:36 +0000 (05:13 +0000)]
Recognize the UNAME_RELEASE environment variable to match Darwin's uname.
When this variable is set, "uname -r" will return its value instead of the
real OS version. Make this affect LLVM's triple for consistency.
<rdar://problem/
9919167>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137111
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Andrew Trick [Tue, 9 Aug 2011 03:11:29 +0000 (03:11 +0000)]
LoopUnroll looks like it has some stale code. Remove it to prove my sanity and avoid further confusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137106
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Bruno Cardoso Lopes [Tue, 9 Aug 2011 03:04:29 +0000 (03:04 +0000)]
Add support for avx vector fextend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137105
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Bruno Cardoso Lopes [Tue, 9 Aug 2011 03:04:25 +0000 (03:04 +0000)]
Add AVX versions of 128-bit sitofp and fptosi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137104
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Bruno Cardoso Lopes [Tue, 9 Aug 2011 03:04:23 +0000 (03:04 +0000)]
Rename and tidy up tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137103
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Bruno Cardoso Lopes [Tue, 9 Aug 2011 01:43:09 +0000 (01:43 +0000)]
Add two patterns to match special vmovss and vmovsd cases. Also fix
the patterns already there to be more strict regarding the predicate.
This fixes PR10558
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137100
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Bill Wendling [Tue, 9 Aug 2011 01:17:10 +0000 (01:17 +0000)]
There is only one instance of this placeholder being created. Just use that
instead of a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137099
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Bill Wendling [Tue, 9 Aug 2011 01:09:21 +0000 (01:09 +0000)]
Remove an instance where the 'unwind' instruction was created.
The 'unwind' instruction was acting essentially as a placeholder, because it
would be replaced at the end of this function by a branch to the "unwind
handler". The 'unwind' instruction is going away, so use 'unreachable' instead,
which serves the same purpose as a placeholder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137098
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Devang Patel [Tue, 9 Aug 2011 01:03:35 +0000 (01:03 +0000)]
Print variable's inline location in debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137096
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Devang Patel [Tue, 9 Aug 2011 01:03:14 +0000 (01:03 +0000)]
Provide method to print variable's extended name which includes inline location.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137095
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Jakob Stoklund Olesen [Tue, 9 Aug 2011 01:01:27 +0000 (01:01 +0000)]
Rename member variables to follow coding standards.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137094
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Bill Wendling [Tue, 9 Aug 2011 00:47:30 +0000 (00:47 +0000)]
Add missing attributes to the C++ backend's output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137091
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Bruno Cardoso Lopes [Tue, 9 Aug 2011 00:46:57 +0000 (00:46 +0000)]
Make LowerVSETCC aware of AVX types and add patterns to match them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137090
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Jakob Stoklund Olesen [Tue, 9 Aug 2011 00:43:37 +0000 (00:43 +0000)]
Move the RegisterCoalescer private to its implementation file.
RegisterCoalescer.h still has the CoalescerPair class interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137088
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Dan Gohman [Tue, 9 Aug 2011 00:33:11 +0000 (00:33 +0000)]
Tidy up these testcases to look more like real code does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137085
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Jakob Stoklund Olesen [Tue, 9 Aug 2011 00:29:53 +0000 (00:29 +0000)]
Refer to the RegisterCoalescer pass by ID.
A public interface is no longer needed since RegisterCoalescer is not an
analysis any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137082
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Jim Grosbach [Mon, 8 Aug 2011 23:28:47 +0000 (23:28 +0000)]
ARM parsing and encoding for LDRBT instruction.
Fix the instruction representation to correctly only allow post-indexed form.
Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137074
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Owen Anderson [Mon, 8 Aug 2011 23:25:22 +0000 (23:25 +0000)]
Thumb1 BL instructions encoding 22 bits of displacement, not 21.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137073
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Bill Wendling [Mon, 8 Aug 2011 23:01:10 +0000 (23:01 +0000)]
Indicate that there are changes if runOfFunction returns saying that there are.
Patch by Jingyue!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137072
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Jim Grosbach [Mon, 8 Aug 2011 22:37:06 +0000 (22:37 +0000)]
ARM parsing and encoding for LDRB instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137071
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Jim Grosbach [Mon, 8 Aug 2011 22:11:33 +0000 (22:11 +0000)]
Add FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137070
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Jakob Stoklund Olesen [Mon, 8 Aug 2011 21:45:32 +0000 (21:45 +0000)]
Implement isLoadFromStackSlotPostFE and isStoreToStackSlotPostFE for ARM.
They improve the verbose assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137069
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Bruno Cardoso Lopes [Mon, 8 Aug 2011 21:31:08 +0000 (21:31 +0000)]
Add support for several vector shifts operations while in AVX mode. Fix PR10581
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137067
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Jim Grosbach [Mon, 8 Aug 2011 20:59:31 +0000 (20:59 +0000)]
ARM load/store label parsing.
Allow labels for load/store instructions when parsing. There's encoding
issues, still, so this doesn't work all the way through, yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137064
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Jakob Stoklund Olesen [Mon, 8 Aug 2011 20:53:24 +0000 (20:53 +0000)]
Hoist hasLoadFromStackSlot and hasStoreToStackSlot.
These the methods are target-independent since they simply scan the
memory operands. They can live in TargetInstrInfoImpl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137063
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Owen Anderson [Mon, 8 Aug 2011 20:42:17 +0000 (20:42 +0000)]
Fix encodings for Thumb ASR and LSR immediate operands. They encode the range 1-32, with 32 encoded as 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137062
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Eli Friedman [Mon, 8 Aug 2011 19:49:37 +0000 (19:49 +0000)]
Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137061
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Benjamin Kramer [Mon, 8 Aug 2011 19:09:02 +0000 (19:09 +0000)]
Pacify virtual dtor warnings and cmake buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137060
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Benjamin Kramer [Mon, 8 Aug 2011 18:56:44 +0000 (18:56 +0000)]
Add MCInstrAnalysis class. This allows the targets to specify own versions of MCInstrDescs functions.
- Add overrides for ARM.
- Teach llvm-objdump to use this instead of plain MCInstrDesc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137059
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Benjamin Kramer [Mon, 8 Aug 2011 18:41:34 +0000 (18:41 +0000)]
llvm-objdump: disassembly enhancements
- Indent simple loops
- Print unreachable blocks as .byte directives
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137058
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Benjamin Kramer [Mon, 8 Aug 2011 18:32:12 +0000 (18:32 +0000)]
llvm-objdump: Use help of CFG to print assembly when --cfg is passed.
This way we can avoid printing unreachable code (data).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137057
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Devang Patel [Mon, 8 Aug 2011 18:22:10 +0000 (18:22 +0000)]
Simplify by creating parent first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137056
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Jakob Stoklund Olesen [Mon, 8 Aug 2011 17:15:43 +0000 (17:15 +0000)]
Don't clobber pending ST regs when FP regs are killed.
X86FloatingPoint keeps track of pending ST registers for an upcoming
inline asm instruction with fixed stack register constraints. It does
this by remembering which FP register holds the value that should appear
at a fixed stack position for the inline asm.
When that FP register is killed before the inline asm, make sure to
duplicate it to a scratch register, so the ST register still has a live
FP reference.
This could happen when the same FP register was copied to two ST
registers, or when a spill instruction is inserted between the ST copy
and the inline asm.
This fixes PR10602.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137050
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Bill Wendling [Mon, 8 Aug 2011 08:06:05 +0000 (08:06 +0000)]
Clean up the grammar for the landingpad instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137042
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Bill Wendling [Mon, 8 Aug 2011 08:02:48 +0000 (08:02 +0000)]
Remove unnecessary space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137041
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Bill Wendling [Mon, 8 Aug 2011 07:58:58 +0000 (07:58 +0000)]
Fix typo found by John.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137040
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Chris Lattner [Sun, 7 Aug 2011 04:18:48 +0000 (04:18 +0000)]
strengthen up an assertion: you can't create a constant struct
with an opaque struct type, it doesn't make sense. This should
resolve PR10473.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137028
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Jakob Stoklund Olesen [Sat, 6 Aug 2011 18:20:24 +0000 (18:20 +0000)]
Fix typo. Thanks, Andy!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137023
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Andrew Trick [Sat, 6 Aug 2011 07:00:37 +0000 (07:00 +0000)]
Made SCEV's UDiv expressions more canonical. When dividing a
recurrence, the initial values low bits can sometimes be ignored.
To take advantage of this, added FoldIVUser to IndVarSimplify to fold
an IV operand into a udiv/lshr if the operator doesn't affect the
result.
-indvars -disable-iv-rewrite now transforms
i = phi i4
i1 = i0 + 1
idx = i1 >> (2 or more)
i4 = i + 4
into
i = phi i4
idx = i0 >> ...
i4 = i + 4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137013
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Jakob Stoklund Olesen [Fri, 5 Aug 2011 23:50:33 +0000 (23:50 +0000)]
Reject RS_Spill ranges from local splitting as well.
All new local ranges are marked as RS_New now, so there is no need to
attempt splitting of RS_Spill ranges any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137002
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Jakob Stoklund Olesen [Fri, 5 Aug 2011 23:50:31 +0000 (23:50 +0000)]
Only mark remainder intervals as RS_Spill after per-block splitting.
The local ranges created get to stay in the RS_New stage, just like for
local and region splitting.
This gives tryLocalSplit a bit more freedom the first time it sees one
of these new local ranges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137001
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Jakob Stoklund Olesen [Fri, 5 Aug 2011 23:10:40 +0000 (23:10 +0000)]
Remember to update LiveDebugVariables after per-block splitting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136996
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Jakob Stoklund Olesen [Fri, 5 Aug 2011 23:04:18 +0000 (23:04 +0000)]
Extract per-block splitting into its own method.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136994
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Jakob Stoklund Olesen [Fri, 5 Aug 2011 22:52:17 +0000 (22:52 +0000)]
Delete getMultiUseBlocks and splitSingleBlocks.
These functions are no longer used, and they are easily replaced with a
loop calling shouldSplitSingleBlock and splitSingleBlock.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136993
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Jakob Stoklund Olesen [Fri, 5 Aug 2011 22:43:23 +0000 (22:43 +0000)]
Also use shouldSplitSingleBlock() in the fallback splitting mode.
Drop the use of SplitAnalysis::getMultiUseBlocks, there is no need to go
through a SmallPtrSet any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136992
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Jakob Stoklund Olesen [Fri, 5 Aug 2011 22:20:45 +0000 (22:20 +0000)]
Split around single instructions to enable register class inflation.
Normally, we don't create a live range for a single instruction in a
basic block, the spiller does that anyway. However, when splitting a
live range that belongs to a proper register sub-class, inserting these
extra COPY instructions completely remove the constraints from the
remainder interval, and it may be allocated from the larger super-class.
The spiller will mop up these small live ranges if we end up spilling
anyway. It calls them snippets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136989
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Jim Grosbach [Fri, 5 Aug 2011 22:03:36 +0000 (22:03 +0000)]
ARM load instruction shifted register index operands.
Parsing and encoding for shifted index operands for load instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136986
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Jim Grosbach [Fri, 5 Aug 2011 21:28:30 +0000 (21:28 +0000)]
ARM indexed load assembly parsing and encoding.
More parsing support for indexed loads. Fix pre-indexed with writeback
parsing for register offsets and handle basic post-indexed offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136982
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Jakob Stoklund Olesen [Fri, 5 Aug 2011 21:28:14 +0000 (21:28 +0000)]
Detect proper register sub-classes.
Some instructions require restricted register classes, but most of the
time that doesn't affect register allocation. For example, some
instructions don't work with the stack pointer, but that is a reserved
register anyway.
Sometimes it matters, GR32_ABCD only has 4 allocatable registers. For
such a proper sub-class, the register allocator should try to enable
register class inflation since that makes more registers available for
allocation.
Make sure only legal super-classes are considered. For example, tGPR is
not a proper sub-class in Thumb mode, but in ARM mode it is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136981
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Jim Grosbach [Fri, 5 Aug 2011 20:35:44 +0000 (20:35 +0000)]
ARM refactor indexed store instructions.
Refactor STR[B] pre and post indexed instructions to use addressing modes for
memory operands, which is necessary for assembly parsing and is more consistent
with the rest of the memory instruction definitions. Make some incremental
progress on refactoring away the mega-operand addrmode2 along the way, which
is nice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136978
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Jim Grosbach [Fri, 5 Aug 2011 20:33:39 +0000 (20:33 +0000)]
Add ARM LDR parsing tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136977
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Jakob Stoklund Olesen [Fri, 5 Aug 2011 18:47:07 +0000 (18:47 +0000)]
Fix liveness computations in BranchFolding.
The old code would look at kills and defs in one pass over the
instruction operands, causing problems with this code:
%R0<def>, %CPSR<def,dead> = tLSLri %R5<kill>, 2, pred:14, pred:%noreg
%R0<def>, %CPSR<def,dead> = tADDrr %R4<kill>, %R0<kill>, pred:14, %pred:%noreg
The last instruction kills and redefines %R0, so it is still live after
the instruction.
This caused a register scavenger crash when compiling 483.xalancbmk for
armv6. I am not including a test case because it requires too much bad
luck to expose this old bug.
First you need to convince the register allocator to use %R0 twice on
the tADDrr instruction, then you have to convince BranchFolding to do
something that causes it to run the register scavenger on he bad block.
<rdar://problem/
9898200>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136973
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Jim Grosbach [Fri, 5 Aug 2011 16:11:38 +0000 (16:11 +0000)]
ARM simplify the postidx_reg operand encoding.
The immediate portion of the operand is just a boolean (the 'U' bit indicating
add vs. subtract). Treat it as such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136969
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Jim Grosbach [Fri, 5 Aug 2011 15:48:21 +0000 (15:48 +0000)]
ARM use a dedicated printer for postidx_reg operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136968
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Bob Wilson [Fri, 5 Aug 2011 07:24:09 +0000 (07:24 +0000)]
Add missing register constraint for some VLD3/VLD4 pseudo instructions.
<rdar://problem/
9878189>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136962
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Chandler Carruth [Fri, 5 Aug 2011 01:08:21 +0000 (01:08 +0000)]
Silence unused variable warnings in release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136956
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Jason W Kim [Fri, 5 Aug 2011 00:53:03 +0000 (00:53 +0000)]
Fix llvm.org/bugs/show_bug.cgi?id=10583\n - test for 1 and 2 byte fixups to be added
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136954
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Chandler Carruth [Fri, 5 Aug 2011 00:51:31 +0000 (00:51 +0000)]
Temporarily revert r135528 which distinguishes between two copies of one
inlined variable, based on the discussion in PR10542.
This explodes the runtime of several passes down the pipeline due to
a large number of "copies" remaining live across a large function. This
only shows up with both debug and opt, but when it does it creates
a many-minute compile when self-hosting LLVM+Clang. There are several
other cases that show these types of regressions.
All of this is tracked in PR10542, and progress is being made on fixing
the issue. Once its addressed, the re-instated, but until then this
restores the performance for self-hosting and other opt+debug builds.
Devang, let me know if this causes any trouble, or impedes fixing it in
any way, and thanks for working on this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136953
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Owen Anderson [Thu, 4 Aug 2011 23:18:05 +0000 (23:18 +0000)]
Fix broken encodings for the Thumb2 LDRD/STRD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136942
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Jim Grosbach [Thu, 4 Aug 2011 23:01:30 +0000 (23:01 +0000)]
ARM assembly parsing and encoding for LDR instructions.
Enhance support for LDR instruction assembly parsing for post-indexed
addressing with immediate values. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136940
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Jakob Stoklund Olesen [Thu, 4 Aug 2011 21:06:09 +0000 (21:06 +0000)]
Count the total amount of stack space used in compiled functions.
Patch by Ivan Krasin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136921
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Devang Patel [Thu, 4 Aug 2011 20:44:26 +0000 (20:44 +0000)]
Print DBG_VALUE variable's location info as a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136916
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Devang Patel [Thu, 4 Aug 2011 20:42:11 +0000 (20:42 +0000)]
Increment counter inside insertDebugValue().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136915
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Devang Patel [Thu, 4 Aug 2011 20:02:18 +0000 (20:02 +0000)]
We need to map DebugLoc. It leads to Fuction * (through subprogram entry node) which should be appropriately mapped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136910
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Devang Patel [Thu, 4 Aug 2011 19:44:28 +0000 (19:44 +0000)]
Linke NamedMDNodes after linking global values as comment suggests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136909
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Chris Lattner [Thu, 4 Aug 2011 19:31:26 +0000 (19:31 +0000)]
allow \r's in .s files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136908
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Roman Divacky [Thu, 4 Aug 2011 19:08:19 +0000 (19:08 +0000)]
Introduce adjustFixupOffset that adjusts the fixup offset of a relocation.
This is meant to be overriden by backends. Implement an override on PowerPC
which adjusts the offset by 2 for ha16/lo16 relocation kinds. This removes
a commented out hack and enables hello world to be compiled on PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136905
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Devang Patel [Thu, 4 Aug 2011 18:45:38 +0000 (18:45 +0000)]
Add counter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136901
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Evan Cheng [Thu, 4 Aug 2011 18:40:26 +0000 (18:40 +0000)]
Fix an obvious type. Patch by Ivan Krasin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136900
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Evan Cheng [Thu, 4 Aug 2011 18:38:15 +0000 (18:38 +0000)]
Fix an obvious type. Patch by Ivan Krasin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136899
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Owen Anderson [Thu, 4 Aug 2011 18:24:14 +0000 (18:24 +0000)]
LDCL_POST and STCL_POST need one's-complement offsets, rather than two's complement offsets. Add an appropriate immediate type for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136896
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Rafael Espindola [Thu, 4 Aug 2011 17:00:11 +0000 (17:00 +0000)]
Fix the bitwidth of the remaining fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136884
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Duncan Sands [Thu, 4 Aug 2011 16:01:54 +0000 (16:01 +0000)]
Fix a place that was clearly forgotten when the type legalization
logic moved over to its own enum. Noticed by Andrey Karpov with
the PVS-studio tool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136881
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Rafael Espindola [Thu, 4 Aug 2011 15:50:13 +0000 (15:50 +0000)]
print st_shndx with the correct number of bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136880
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Duncan Sands [Thu, 4 Aug 2011 15:45:59 +0000 (15:45 +0000)]
Add obviously missing "break". Noticed by Andrey Karpov with
the PVS-studio tool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136878
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Rafael Espindola [Thu, 4 Aug 2011 15:38:19 +0000 (15:38 +0000)]
print st_other with the correct number of bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136877
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Rafael Espindola [Thu, 4 Aug 2011 15:24:00 +0000 (15:24 +0000)]
print st_type with the correct number of bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136875
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Rafael Espindola [Thu, 4 Aug 2011 15:10:35 +0000 (15:10 +0000)]
Print st_bind with the correct number of bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136874
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Rafael Espindola [Thu, 4 Aug 2011 14:48:27 +0000 (14:48 +0000)]
Print r_sym with the correct number of bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136873
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Rafael Espindola [Thu, 4 Aug 2011 14:39:30 +0000 (14:39 +0000)]
Print r_type with the correct number of bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136872
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Rafael Espindola [Thu, 4 Aug 2011 14:27:46 +0000 (14:27 +0000)]
Another counter goes decimal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136871
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Rafael Espindola [Thu, 4 Aug 2011 14:01:03 +0000 (14:01 +0000)]
Change anther counter to decimal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136870
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Rafael Espindola [Thu, 4 Aug 2011 13:39:15 +0000 (13:39 +0000)]
Don't print a counter in hex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136869
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Rafael Espindola [Thu, 4 Aug 2011 13:05:26 +0000 (13:05 +0000)]
Add an assert to check that the Addend fits the file format.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136868
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Rafael Espindola [Thu, 4 Aug 2011 13:00:24 +0000 (13:00 +0000)]
Print all the bits in the addend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136867
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Jay Foad [Thu, 4 Aug 2011 10:43:43 +0000 (10:43 +0000)]
Reword.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136866
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Duncan Sands [Thu, 4 Aug 2011 10:02:21 +0000 (10:02 +0000)]
Fix what seems an obvious typo. Patch by Ivan Krasin. Problem
reported at http://habrahabr.ru/blogs/compilers/125626/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136865
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Andrew Trick [Thu, 4 Aug 2011 01:04:37 +0000 (01:04 +0000)]
Reverting r136884 updateUnloop, which crashed a linux builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136857
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Jason W Kim [Thu, 4 Aug 2011 00:38:45 +0000 (00:38 +0000)]
Fix http://llvm.org/bugs/show_bug.cgi?id=10568
Move the reloc size assert into AsmBackend - where it is more apropos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136855
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Bill Wendling [Thu, 4 Aug 2011 00:32:58 +0000 (00:32 +0000)]
Only access both operands of an INSERT_SUBVECTOR if it is an INSERT_SUBVECTOR.
Fixes PR10527.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136853
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Jim Grosbach [Wed, 3 Aug 2011 23:50:40 +0000 (23:50 +0000)]
ARM refactoring assembly parsing of memory address operands.
Memory operand parsing is a bit haphazzard at the moment, in no small part
due to the even more haphazzard representations of memory operands in the .td
files. Start cleaning that all up, at least a bit.
The addressing modes in the .td files will be being simplified to not be
so monolithic, especially with regards to immediate vs. register offsets
and post-indexed addressing. addrmode3 is on its way with this patch, for
example.
This patch is foundational to enable going back to smaller incremental patches
for the individual memory referencing instructions themselves. It does just
enough to get the basics in place and handle the "make check" regression tests
we already have.
Follow-up work will be fleshing out the details and adding more robust test
cases for the individual instructions, starting with ARM mode and moving from
there into Thumb and Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136845
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Andrew Trick [Wed, 3 Aug 2011 23:50:25 +0000 (23:50 +0000)]
An algorithm for incrementally updating LoopInfo within a
LoopPassManager. The incremental update should be extremely cheap in
most cases and can be used in places where it's not feasible to
regenerate the entire loop forest.
- "Unloop" is a node in the loop tree whose last backedge has been removed.
- Perform reverse dataflow on the block inside Unloop to propagate the
nearest loop from the block's successors.
- For reducible CFG, each block in unloop is visited exactly
once. This is because unloop no longer has a backedge and blocks
within subloops don't change parents.
- Immediate subloops are summarized by the nearest loop reachable from
their exits or exits within nested subloops.
- At completion the unloop blocks each have a new parent loop, and
each immediate subloop has a new parent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136844
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Andrew Trick [Wed, 3 Aug 2011 23:45:50 +0000 (23:45 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136843
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Jakob Stoklund Olesen [Wed, 3 Aug 2011 23:44:31 +0000 (23:44 +0000)]
Correctly handle multiple DBG_VALUE instructions at the same SlotIndex.
It is possible to have multiple DBG_VALUEs for the same variable:
32L TEST32rr %vreg0<kill>, %vreg0, %EFLAGS<imp-def>; GR32:%vreg0
DBG_VALUE 2, 0, !"i"
DBG_VALUE %noreg, %0, !"i"
When that happens, keep the last one instead of the first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136842
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Andrew Trick [Wed, 3 Aug 2011 23:43:49 +0000 (23:43 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136840
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Andrew Trick [Wed, 3 Aug 2011 23:27:28 +0000 (23:27 +0000)]
An interface for iterating over a loop's blocks in DFS order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136838
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Owen Anderson [Wed, 3 Aug 2011 23:21:48 +0000 (23:21 +0000)]
Fix broken encoding of tCBNZ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136837
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Jakob Stoklund Olesen [Wed, 3 Aug 2011 23:16:09 +0000 (23:16 +0000)]
Enable compact region splitting by default.
This helps generate better code in functions with high register
pressure.
The previous version of compact region splitting caused regressions
because the regions were a bit too large. A stronger negative bias
applied in r136832 fixed this problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136836
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Devang Patel [Wed, 3 Aug 2011 23:13:55 +0000 (23:13 +0000)]
Do not drop undef debug values. These are used as range termination marker by live debug variable pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136834
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