CMake: Added cmakedefine for HAVE_PTHREAD_H.

Patch by Robert Schuster!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71083 91177308-0d34-0410-b5e6-96231b3b80d8

Nounwind is not valid for function return values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71082 91177308-0d34-0410-b5e6-96231b3b80d8

OCaml parameter attribute bindings from PR2752.
Incomplete, but better than nothing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71081 91177308-0d34-0410-b5e6-96231b3b80d8

Add generic expansion of SUB when ADD and XOR
are legal.  Based on a patch by Micah Villmow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71078 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR3754: don't mark functions that wrap MallocInst with
the readnone.  Since MallocInst is scheduled for deletion
it doesn't seem worth doing anything more subtle, such as
having mayWriteToMemory return true for MallocInst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71077 91177308-0d34-0410-b5e6-96231b3b80d8

Emit banksel and movlp instructions.
Split large global data (both initialized and un-initialized) into multiple sections of <= 80 bytes.
Provide routines to manage PIC16 ABI naming conventions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71073 91177308-0d34-0410-b5e6-96231b3b80d8

Allow readonly functions to unwind exceptions.  Teach
the optimizers about this.  For example, a readonly
function with no uses cannot be removed unless it is
also marked nounwind.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71071 91177308-0d34-0410-b5e6-96231b3b80d8

A better error message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71068 91177308-0d34-0410-b5e6-96231b3b80d8

Renamed Spiller classes (plus uses and related files) to VirtRegRewriter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71057 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate documentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71055 91177308-0d34-0410-b5e6-96231b3b80d8

The 'forward_as' property did not use its second argument.

See PR4159 for details. Patch by Martin Nowack!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71054 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a copy+pasto in a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71035 91177308-0d34-0410-b5e6-96231b3b80d8

Delete a FIXME which is no longer relevant, and add a FIXME that is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71033 91177308-0d34-0410-b5e6-96231b3b80d8

Quotes should be printed before private prefix; some code clean up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71032 91177308-0d34-0410-b5e6-96231b3b80d8

Add dump method to DIDescriptor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71028 91177308-0d34-0410-b5e6-96231b3b80d8

Add an explicit keyword.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71022 91177308-0d34-0410-b5e6-96231b3b80d8

If a MachineBasicBlock has multiple ways of reaching another block,
allow it to have multiple CFG edges to that block. This is needed
to allow MachineBasicBlock::isOnlyReachableByFallthrough to work
correctly. This fixes PR4126.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71018 91177308-0d34-0410-b5e6-96231b3b80d8

Forgot this in the last commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71014 91177308-0d34-0410-b5e6-96231b3b80d8

Temporarily reverting r71008. It was causing this failure:

Running /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/
CodeGen/X86/dg.exp ...
FAIL: /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/test/
CodeGen/X86/change-compare-stride-1.ll
Failed with exit(1) at line 2
while running: grep {cmpq       $-478,} change-compare-stride-1.ll.tmp
child process exited abnormally

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71013 91177308-0d34-0410-b5e6-96231b3b80d8

Add some more documentation for x86 special address spaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71012 91177308-0d34-0410-b5e6-96231b3b80d8

Enable stack coloring with regs at -O3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71010 91177308-0d34-0410-b5e6-96231b3b80d8

Handle overflow of 64-bit loop conditions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71008 91177308-0d34-0410-b5e6-96231b3b80d8

Add basic support for code generation of
addrspace(257) -> FS relative on x86.  Patch by Zoltan Varga!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70992 91177308-0d34-0410-b5e6-96231b3b80d8

bugpoint for jit should just ignore GCC arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70988 91177308-0d34-0410-b5e6-96231b3b80d8

Revert part of 70929 that has to do with determining whether a SIB byte is needed. It causes a lot of x86_64 JIT failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70986 91177308-0d34-0410-b5e6-96231b3b80d8

Allow multiclass def names to contain "#NAME"" where TableGen replaces
#NAME# with the name of the defm instantiating the multiclass.  This is
useful for AVX instruction naming where a "V" prefix is standard
throughout the ISA.  For example:

multiclass SSE_AVX_Inst<...> {
   def SS : Instr<...>;
   def SD : Instr<...>;
   def PS : Instr<...>;
   def PD : Instr<...>;

   def V#NAME#SS : Instr<...>;
   def V#NAME#SD : Instr<...>;
   def V#NAME#PS : Instr<...>;
   def V#NAME#PD : Instr<...>;
}

defm ADD : SSE_AVX_Inst<...>;

Results in

ADDSS
ADDSD
ADDPS
ADDPD

VADDSS
VADDSD
VADDPS
VADDPD

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70979 91177308-0d34-0410-b5e6-96231b3b80d8

Fix incorrect code generation with ENV.

See PR4157 for details. Patch by Martin Nowack!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70973 91177308-0d34-0410-b5e6-96231b3b80d8

Do not require variable debug info nodes to have a compile unit.
For implicit decls like "self" and "_cmd" in ObjC, these decls
should not have a location.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70964 91177308-0d34-0410-b5e6-96231b3b80d8

Do not substitute if the new register isn't in the register class of the operand being updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70953 91177308-0d34-0410-b5e6-96231b3b80d8

Move getInstrOperandRegClass from the scheduler to TargetInstrInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70950 91177308-0d34-0410-b5e6-96231b3b80d8

Do forward and backward substitution to eliminate loads and stores when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70937 91177308-0d34-0410-b5e6-96231b3b80d8

Default llc / lli optimization to "Default", which corresponds to -O1 / -O2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70934 91177308-0d34-0410-b5e6-96231b3b80d8

- Avoid the longer SIB encoding on x86_64 when it's not needed.
- Synchronize instruction length computation code in X86InstrInfo with code in X86CodeEmitter.cpp
Patch by Zoltan Varga.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70929 91177308-0d34-0410-b5e6-96231b3b80d8

Re-apply 70645, converting ScalarEvolution to use
CallbackVH, with fixes. allUsesReplacedWith need to
walk the def-use chains and invalidate all users of a
value that is replaced. SCEVs of users need to be
recalcualted even if the new value is equivalent. Also,
make forgetLoopPHIs walk def-use chains, since any
SCEV that depends on a PHI should be recalculated when
more information about that PHI becomes available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70927 91177308-0d34-0410-b5e6-96231b3b80d8

Fix an 80-column violation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70925 91177308-0d34-0410-b5e6-96231b3b80d8

Fix doxygen comment syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70924 91177308-0d34-0410-b5e6-96231b3b80d8

Make DBG_STOPPOINT nodes, and therefore DBG_LABEL labels, get a DebugLoc, so that it
shows up in -print-machineinstrs.  This doesn't appear to affect anything, but it was
weird for some DBG_LABELs to have DebugLocs but not all of them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70921 91177308-0d34-0410-b5e6-96231b3b80d8

Constify a bunch of SCEV-using code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70919 91177308-0d34-0410-b5e6-96231b3b80d8

X86FastISel doesn't support the -tailcallopt ABI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70902 91177308-0d34-0410-b5e6-96231b3b80d8

Restore a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70900 91177308-0d34-0410-b5e6-96231b3b80d8

Fix code emission for conditional branches.
Patch by Collin Winter!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70898 91177308-0d34-0410-b5e6-96231b3b80d8

Restore minor deletion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70892 91177308-0d34-0410-b5e6-96231b3b80d8

Typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70792 91177308-0d34-0410-b5e6-96231b3b80d8

Remove obsolete wording, the only exception a readnone function can throw
is the empty set. :)  Thanks to Fritz for pointing this out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70790 91177308-0d34-0410-b5e6-96231b3b80d8

be very explicit that readnone/readonly functions can't
throw exceptions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70788 91177308-0d34-0410-b5e6-96231b3b80d8

In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However,  reloads and restores might be folded into uses / defs and freed registers might not be used at all.

VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants.

Not yet enabled. This is part 1. More coming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70787 91177308-0d34-0410-b5e6-96231b3b80d8

Handle implicit zext in a better way. Shamelessly stolen from x86 backend.
Thanks for Dan Gohman for suggestion!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70782 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70772 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70770 91177308-0d34-0410-b5e6-96231b3b80d8

Update due to mainline API change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70769 91177308-0d34-0410-b5e6-96231b3b80d8

Add TODO list :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70768 91177308-0d34-0410-b5e6-96231b3b80d8

Make handling of conditional stuff much more straightforward

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70767 91177308-0d34-0410-b5e6-96231b3b80d8

Temporary disable imm patterns for cmp. Actually, all cmp-related stuff (select_cc, setcc, br_cc). needs to be rethought

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70766 91177308-0d34-0410-b5e6-96231b3b80d8

Expand divisions into libcalls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70765 91177308-0d34-0410-b5e6-96231b3b80d8

Properly handle sdiv / udiv / srem / urem libcalls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70764 91177308-0d34-0410-b5e6-96231b3b80d8

Custom lower SIGN_EXTEND

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70763 91177308-0d34-0410-b5e6-96231b3b80d8

Some eye-candy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70762 91177308-0d34-0410-b5e6-96231b3b80d8

Print function header / footer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70761 91177308-0d34-0410-b5e6-96231b3b80d8

Fix printing: je => jeq

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70760 91177308-0d34-0410-b5e6-96231b3b80d8

Add 8bit shifts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70759 91177308-0d34-0410-b5e6-96231b3b80d8

Handle logical shift right (at least I hope so :) )

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70758 91177308-0d34-0410-b5e6-96231b3b80d8

Handle anyext

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70757 91177308-0d34-0410-b5e6-96231b3b80d8

Expand all sorts of indirect branches

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70755 91177308-0d34-0410-b5e6-96231b3b80d8

Add InsertBranch() hook for tail mergeing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70754 91177308-0d34-0410-b5e6-96231b3b80d8

Implement bswap

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70753 91177308-0d34-0410-b5e6-96231b3b80d8

Properly handle ExternalSymbol's

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70752 91177308-0d34-0410-b5e6-96231b3b80d8

Expand muls (all mulls!) to libcalls for now

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70751 91177308-0d34-0410-b5e6-96231b3b80d8

Proper name 16 bit libcalls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70750 91177308-0d34-0410-b5e6-96231b3b80d8

Add libcall expansion for 16 and 128 bit muls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70749 91177308-0d34-0410-b5e6-96231b3b80d8

Provide addc and subc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70748 91177308-0d34-0410-b5e6-96231b3b80d8

Add left shift

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70747 91177308-0d34-0410-b5e6-96231b3b80d8

Add direct branch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70746 91177308-0d34-0410-b5e6-96231b3b80d8

It's error-prone to maintain two separate variants of asmprinting stuff, one of which is even used. Drop second (aka 'intel') variant of operands. It can be added later, if needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70745 91177308-0d34-0410-b5e6-96231b3b80d8

Lower select with custom inserted and make condjumps generic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70744 91177308-0d34-0410-b5e6-96231b3b80d8

Add first draft for conditions, conditional branches, etc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70743 91177308-0d34-0410-b5e6-96231b3b80d8

Hanle i8 returns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70742 91177308-0d34-0410-b5e6-96231b3b80d8

Small tweaking

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70741 91177308-0d34-0410-b5e6-96231b3b80d8

Add prologue/epilogue emission. Fix frame pointer handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70740 91177308-0d34-0410-b5e6-96231b3b80d8

Add code for save/restore of callee-saved registers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70739 91177308-0d34-0410-b5e6-96231b3b80d8

Two more hooks for RA and FP registers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70738 91177308-0d34-0410-b5e6-96231b3b80d8

Proper handle loading of effective address of stack slot stuff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70737 91177308-0d34-0410-b5e6-96231b3b80d8

Match frame indexes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70736 91177308-0d34-0410-b5e6-96231b3b80d8

First draft of stack slot loads / stores lowering

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70735 91177308-0d34-0410-b5e6-96231b3b80d8

Reverse order of memory arguments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70734 91177308-0d34-0410-b5e6-96231b3b80d8

Remove bogus pattern

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70733 91177308-0d34-0410-b5e6-96231b3b80d8

Correct asmprinting of memory operands

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70732 91177308-0d34-0410-b5e6-96231b3b80d8

Match wrapper node for address

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70731 91177308-0d34-0410-b5e6-96231b3b80d8

Add lowering for global address nodes. Not pretty efficient though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70730 91177308-0d34-0410-b5e6-96231b3b80d8

Some early full call lowering draft for direct calls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70729 91177308-0d34-0410-b5e6-96231b3b80d8

Add call frame setup instruction elimination and lowerid for bunch of call-related stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70728 91177308-0d34-0410-b5e6-96231b3b80d8

Add CALL lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70727 91177308-0d34-0410-b5e6-96231b3b80d8

Add bunch of mem-whatever patterns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70726 91177308-0d34-0410-b5e6-96231b3b80d8

Add bunch of reg-mem inst patterns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70725 91177308-0d34-0410-b5e6-96231b3b80d8

Add normal and trunc stores

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70724 91177308-0d34-0410-b5e6-96231b3b80d8

Basic support for mem=>reg moves

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70723 91177308-0d34-0410-b5e6-96231b3b80d8

Add 8-bit insts. zext behaviour is not modelled yet

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70722 91177308-0d34-0410-b5e6-96231b3b80d8

Add 8-bit regclass and pattern for sext_inreg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70721 91177308-0d34-0410-b5e6-96231b3b80d8

Add pattern for OR

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70720 91177308-0d34-0410-b5e6-96231b3b80d8

Add reg-imm variants

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70719 91177308-0d34-0410-b5e6-96231b3b80d8

Add hint to nop

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70718 91177308-0d34-0410-b5e6-96231b3b80d8