Eric Christopher [Sun, 14 Apr 2013 23:35:36 +0000 (23:35 +0000)]
Revert "Remove some unused triple and data layout."
This reverts commit r179497 and the accompanying commit as it broke random platforms that aren't osx.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179499
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Eric Christopher [Sun, 14 Apr 2013 23:32:44 +0000 (23:32 +0000)]
Remove some unused triple and data layout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179498
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Eric Christopher [Sun, 14 Apr 2013 23:32:40 +0000 (23:32 +0000)]
If we've specified a triple on the command line then go ahead
and use that as the default triple for the module and target
data layout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179497
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Nico Rieck [Sun, 14 Apr 2013 21:18:36 +0000 (21:18 +0000)]
Use object file specific section type for initial text section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179494
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David Majnemer [Sun, 14 Apr 2013 21:15:43 +0000 (21:15 +0000)]
Reorders two transforms that collide with each other
One performs: (X == 13 | X == 14) -> X-13 <u 2
The other: (A == C1 || A == C2) -> (A & ~(C1 ^ C2)) == C1
The problem is that there are certain values of C1 and C2 that
trigger both transforms but the first one blocks out the second,
this generates suboptimal code.
Reordering the transforms should be better in every case and
allows us to do interesting stuff like turn:
%shr = lshr i32 %X, 4
%and = and i32 %shr, 15
%add = add i32 %and, -14
%tobool = icmp ne i32 %add, 0
into:
%and = and i32 %X, 240
%tobool = icmp ne i32 %and, 224
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179493
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Nadav Rotem [Sun, 14 Apr 2013 20:13:05 +0000 (20:13 +0000)]
Make the command line triple match the module triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179492
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Benjamin Kramer [Sun, 14 Apr 2013 09:33:08 +0000 (09:33 +0000)]
Miscellaneous cleanups for VecUtils.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179483
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Nadav Rotem [Sun, 14 Apr 2013 07:42:25 +0000 (07:42 +0000)]
Document the SLP infrastructure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179480
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Nadav Rotem [Sun, 14 Apr 2013 07:22:22 +0000 (07:22 +0000)]
SLP: Document the scalarization cost method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179479
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Nadav Rotem [Sun, 14 Apr 2013 05:55:18 +0000 (05:55 +0000)]
Document the decision to assume that the cost of floats is twice as much as integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179478
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Jakob Stoklund Olesen [Sun, 14 Apr 2013 05:48:50 +0000 (05:48 +0000)]
Use i32 for all SPARC shift amounts, even in 64-bit mode.
Test case by llvm-stress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179477
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Nadav Rotem [Sun, 14 Apr 2013 05:47:04 +0000 (05:47 +0000)]
Remove unused function attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179476
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Nadav Rotem [Sun, 14 Apr 2013 05:15:53 +0000 (05:15 +0000)]
SLPVectorizer: Add support for trees that don't start at binary operators, and add the cost of extracting values from the roots of the tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179475
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Jakob Stoklund Olesen [Sun, 14 Apr 2013 05:10:36 +0000 (05:10 +0000)]
Add support for the abs64 SPARC v9 code model.
For when 16 TB just isn't enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179474
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Jakob Stoklund Olesen [Sun, 14 Apr 2013 04:57:51 +0000 (04:57 +0000)]
Add support for the SPARC v9 abs44 code model.
This is the default model for non-PIC 64-bit code. It supports
text+data+bss linked anywhere in the low 16 TB of the address space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179473
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Jakob Stoklund Olesen [Sun, 14 Apr 2013 04:35:19 +0000 (04:35 +0000)]
Use target flags for printing SPARC asm operands.
64-bit code models need multiple relocations that can't be inferred from
the opcode like they can in 32-bit code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179472
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Jakob Stoklund Olesen [Sun, 14 Apr 2013 04:35:16 +0000 (04:35 +0000)]
Also put target flags on SPARC constant pool references.
Constant pool entries are accessed exactly the same way as global
variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179471
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Nadav Rotem [Sun, 14 Apr 2013 03:22:20 +0000 (03:22 +0000)]
SLPVectorizer: add initial support for reduction variable vectorization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179470
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Jakob Stoklund Olesen [Sun, 14 Apr 2013 01:53:23 +0000 (01:53 +0000)]
Fix patterns for 64-bit pointers.
This fixes the pic32 code model for SPARC v9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179469
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Jakob Stoklund Olesen [Sun, 14 Apr 2013 01:33:32 +0000 (01:33 +0000)]
Add target flags to SPARC address operands.
SDNodes and MachineOperands get target flags representing the %hi() and
%lo() assembly annotations that eventually become relocations.
Also define flags to be used by the 64-bit code models.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179468
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Hal Finkel [Sat, 13 Apr 2013 23:06:15 +0000 (23:06 +0000)]
Mark all PPC CR registers to be spilled as live-in and tag MFCR appropriately
Leaving MFCR has having unmodeled side effects is not enough to prevent
unwanted instruction reordering post-RA. We could probably apply a stronger
barrier attribute, but there is a better way: Add all (not just the first) CR
to be spilled as live-in to the entry block, and add all CRs to the MFCR
instruction as implicitly killed.
Unfortunately, I don't have a small test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179465
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Jakob Stoklund Olesen [Sat, 13 Apr 2013 19:02:23 +0000 (19:02 +0000)]
Define SPARC code models.
Currently, only abs32 and pic32 are implemented. Add a test case for
abs32 with 64-bit code. 64-bit PIC code is currently broken.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179463
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Jakob Stoklund Olesen [Sat, 13 Apr 2013 19:02:16 +0000 (19:02 +0000)]
Use the correct types when matching ADDRri patterns from frame indexes.
It doesn't seem like anybody is checking types this late in isel, so no
test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179462
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Benjamin Kramer [Sat, 13 Apr 2013 16:11:14 +0000 (16:11 +0000)]
GlobalDCE: Fix an oversight in my last commit that could lead to crashes.
There is a Constant with non-constant operands: blockaddress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179460
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Benjamin Kramer [Sat, 13 Apr 2013 12:53:18 +0000 (12:53 +0000)]
Fix a scalability issue with complex ConstantExprs.
This is basically the same fix in three different places. We use a set to avoid
walking the whole tree of a big ConstantExprs multiple times.
For example: (select cmp, (add big_expr 1), (add big_expr 2))
We don't want to visit big_expr twice here, it may consist of thousands of
nodes.
The testcase exercises this by creating an insanely large ConstantExprs out of
a loop. It's questionable if the optimizer should ever create those, but this
can be triggered with real C code. Fixes PR15714.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179458
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Hal Finkel [Sat, 13 Apr 2013 08:09:20 +0000 (08:09 +0000)]
Spill and restore PPC CR registers using the FP when we have one
For functions that need to spill CRs, and have dynamic stack allocations, the
value of the SP during the restore is not what it was during the save, and so
we need to use the FP in these cases (as for all of the other spills and
restores, but the CR restore has a special code path because its reserved slot,
like the link register, is specified directly relative to the adjusted SP).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179457
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Andrew Trick [Sat, 13 Apr 2013 07:37:27 +0000 (07:37 +0000)]
Further generalize this scheduler test.
The order of copies depends on queue order, which is not very stable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179456
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Andrew Trick [Sat, 13 Apr 2013 07:29:21 +0000 (07:29 +0000)]
Fix a dislexic regex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179455
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Andrew Trick [Sat, 13 Apr 2013 06:12:46 +0000 (06:12 +0000)]
Add a missing REQUIRES: asserts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179453
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Andrew Trick [Sat, 13 Apr 2013 06:07:49 +0000 (06:07 +0000)]
MI-Sched: DEBUG formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179452
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Andrew Trick [Sat, 13 Apr 2013 06:07:45 +0000 (06:07 +0000)]
MI-Sched cleanup. If an instruction has no valid sched class, do not attempt to check for a variant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179451
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Andrew Trick [Sat, 13 Apr 2013 06:07:43 +0000 (06:07 +0000)]
X86 machine model: reduce SandyBridge and Haswell ILPWindow.
The initial values were arbitrary. I want them to be more
conservative. This represents the number of latency cycles hidden by
OOO execution. In practice, I think it should be within a small factor
of the complex floating point operation latency so the scheduler can
make some attempt to hide latency even for smallish blocks.
These are by no means the best values, just a starting point for
tuning heuristics. Some benchmarks such as TSVC run faster with this
lower value for SandyBridge. I haven't run anything on Haswell, but
it's shouldn't be 2x SB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179450
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Andrew Trick [Sat, 13 Apr 2013 06:07:40 +0000 (06:07 +0000)]
MI-Sched: schedule physreg copies.
The register allocator expects minimal physreg live ranges. Schedule
physreg copies accordingly. This is slightly tricky when they occur in
the middle of the scheduling region. For now, this is handled by
rescheduling the copy when its associated instruction is
scheduled. Eventually we may instead bundle them, but only if we can
preserve the bundles as parallel copies during regalloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179449
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Andrew Trick [Sat, 13 Apr 2013 06:07:36 +0000 (06:07 +0000)]
Catch another case where SD fails to propagate node order.
I need to handle this for the test case in my following scheduler
commit.
Work is already under way to redesign the mechanism for node order
propagation because this case by case approach is unmaintainable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179448
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Rafael Espindola [Sat, 13 Apr 2013 02:31:34 +0000 (02:31 +0000)]
Add typenames to see if bot goes green.
I hope this brings http://lab.llvm.org:8011/builders/clang-x86_64-darwin11-self-mingw32 back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179446
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Akira Hatanaka [Sat, 13 Apr 2013 02:13:30 +0000 (02:13 +0000)]
[mips] Move MipsTargetLowering::lowerINTRINSIC_W_CHAIN and
lowerINTRINSIC_WO_CHAIN into MipsSETargetLowering.
No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179444
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Rafael Espindola [Sat, 13 Apr 2013 01:55:34 +0000 (01:55 +0000)]
Some versions of gcc don't like typenames in these places.
Should fix the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179441
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Rafael Espindola [Sat, 13 Apr 2013 01:45:40 +0000 (01:45 +0000)]
Finish templating MachObjectFile over endianness.
We are now able to handle big endian macho files in llvm-readobject. Thanks to
David Fang for providing the object files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179440
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Akira Hatanaka [Sat, 13 Apr 2013 00:55:41 +0000 (00:55 +0000)]
[mips] Reapply r179420 and r179421.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179434
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Akira Hatanaka [Sat, 13 Apr 2013 00:45:02 +0000 (00:45 +0000)]
[mips] Override TargetLoweringBase::isShuffleMaskLegal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179433
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Chad Rosier [Fri, 12 Apr 2013 23:03:20 +0000 (23:03 +0000)]
[ms-inline asm] Simplify the logic by using parsePrimaryExpr. No functional
change intended. Test case previously added in r178568.
Part of rdar://
13611297
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179425
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Akira Hatanaka [Fri, 12 Apr 2013 22:40:07 +0000 (22:40 +0000)]
Revert r179420 and r179421.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179422
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Akira Hatanaka [Fri, 12 Apr 2013 22:24:52 +0000 (22:24 +0000)]
[mips] Instruction selection patterns for carry-setting and using add
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179421
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Akira Hatanaka [Fri, 12 Apr 2013 22:14:24 +0000 (22:14 +0000)]
[mips] v4i8 and v2i16 add, sub and mul instruction selection patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179420
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Nadav Rotem [Fri, 12 Apr 2013 22:02:26 +0000 (22:02 +0000)]
Revert r179409 because it caused some warnings and some of the build bots fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179418
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Benjamin Kramer [Fri, 12 Apr 2013 21:56:23 +0000 (21:56 +0000)]
InstCombine: Check the operand types before merging fcmp ord & fcmp ord.
Fixes PR15737.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179417
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Nadav Rotem [Fri, 12 Apr 2013 21:16:54 +0000 (21:16 +0000)]
SLPVectorizer: add support for vectorization of diamond shaped trees. We now perform a preliminary traversal of the graph to collect values with multiple users and check where the users came from.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179414
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Nadav Rotem [Fri, 12 Apr 2013 21:15:03 +0000 (21:15 +0000)]
CostModel: increase the default cost of supported floating point operations from 1 to two. Fixed a few tests that changes because now the cost of one insert + a vector operation on two doubles is lower than two scalar operations on doubles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179413
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Nadav Rotem [Fri, 12 Apr 2013 21:11:14 +0000 (21:11 +0000)]
Add debug prints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179412
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Nadav Rotem [Fri, 12 Apr 2013 20:45:20 +0000 (20:45 +0000)]
Add support for additional vector instructions in the interpreter.
patch by Veselov, Yuri <Yuri.Veselov@intel.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179409
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Chad Rosier [Fri, 12 Apr 2013 20:20:54 +0000 (20:20 +0000)]
[ms-inline asm] Move this logic into a static function as it's only applicable
when parsing MS-style inline assembly. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179407
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Chad Rosier [Fri, 12 Apr 2013 19:51:49 +0000 (19:51 +0000)]
[ms-inline asm] Address the FIXME for ImmDisp before brackets. This
is a follow on to r179393 and r179399. Test case to be added on
the clang side.
Part of rdar://
13453209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179403
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Daniel Dunbar [Fri, 12 Apr 2013 19:09:09 +0000 (19:09 +0000)]
lit: Fix infinite recursion when an out-of-tree test root is located inside the source test root.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179402
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Daniel Dunbar [Fri, 12 Apr 2013 19:08:57 +0000 (19:08 +0000)]
lit: Add a test for discovery w/ test_exec_root (out-of-tree test root).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179401
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Chad Rosier [Fri, 12 Apr 2013 18:54:20 +0000 (18:54 +0000)]
[ms-inline asm] Have the [ Symbol ] case fall into the more general logic. This
is a follow on to r179393. Test case to be added on the clang side.
Part of rdar://
13453209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179399
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Quentin Colombet [Fri, 12 Apr 2013 18:47:25 +0000 (18:47 +0000)]
ARM: Correct printing of pre-indexed operands.
According to the ARM reference manual, constant offsets are mandatory for pre-indexed addressing modes.
The MC disassembler was not obeying this when the offset is 0.
It was producing instructions like: str r0, [r1]!.
Correct syntax is: str r0, [r1, #0]!.
This change modifies the dumping of operands so that the offset is always printed, regardless of its value, when pre-indexed addressing mode is used.
Patch by Mihail Popa <Mihail.Popa@arm.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179398
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Chad Rosier [Fri, 12 Apr 2013 18:21:18 +0000 (18:21 +0000)]
[ms-inline asm] Add support for operands that include both a symbol and an
immediate displacement. Specifically, add support for generating the proper IR.
We've been able to parse this for some time now. Test case to be added on the
clang side.
Part of rdar://
13453209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179393
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Hal Finkel [Fri, 12 Apr 2013 18:17:57 +0000 (18:17 +0000)]
PPC: Remove (broken) nested implicit definition lists
TableGen will not combine nested list 'let' bindings into a single list, and
instead uses only the inner scope. As a result, several instruction definitions
were missing implicit register defs that were in outer scopes. This de-nests
these scopes and makes all instructions have only one let binding which sets
implicit register definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179392
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Hal Finkel [Fri, 12 Apr 2013 18:17:38 +0000 (18:17 +0000)]
Add a comment about the PPC Interpretation64Bit bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179391
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Jyotsna Verma [Fri, 12 Apr 2013 18:01:06 +0000 (18:01 +0000)]
Hexagon: Set isPredicatedNew flag on predicate new instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179388
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Jyotsna Verma [Fri, 12 Apr 2013 17:46:52 +0000 (17:46 +0000)]
Hexagon: Set isPredicatedFlase flag for all the instructions with negated predication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179387
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David Majnemer [Fri, 12 Apr 2013 17:25:07 +0000 (17:25 +0000)]
Simplify (A & ~B) in icmp if A is a power of 2
The transform will execute like so:
(A & ~B) == 0 --> (A & B) != 0
(A & ~B) != 0 --> (A & B) == 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179386
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Chad Rosier [Fri, 12 Apr 2013 16:26:42 +0000 (16:26 +0000)]
[ms-inline asm] Add the implementation for the AOK_Delete kind, which was added
in r179325. Test case coming shortly on the clang side.
Part of rdar://
13453209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179383
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Arnold Schwaighofer [Fri, 12 Apr 2013 15:15:19 +0000 (15:15 +0000)]
LoopVectorizer: integer division is not a reduction operation
Don't classify idiv/udiv as a reduction operation. Integer division is lossy.
For example : (1 / 2) * 4 != 4/2.
Example:
int a[] = { 2, 5, 2, 2}
int x = 80;
for()
x /= a[i];
Scalar:
x /= 2 // = 40
x /= 5 // = 8
x /= 2 // = 4
x /= 2 // = 2
Vectorized:
<80, 1> / <2,5> //= <40,0>
<40, 0> / <2,2> //= <20,0>
20*0 = 0
radar://
13640654
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179381
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Fri, 12 Apr 2013 12:54:58 +0000 (12:54 +0000)]
AArch64: use full triple for ELF tests
These tests rely specifically on the names of ELF relocations, let alone any
other detail. There's no way they'd work if LLVM was emitting something else by
default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179376
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Fri, 12 Apr 2013 12:54:49 +0000 (12:54 +0000)]
AArch64: remove over-zealous use of CHECK-NEXT
It turns out some platforms (e.g. Windows) lay out their llvm-mc slightly
differently with extra newlines; there was no real reason for the test lines to
be consecutive, so this relaxes the FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179375
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Fri, 12 Apr 2013 12:13:51 +0000 (12:13 +0000)]
Revert broken pieces of r179373.
You can't copy an OwningPtr, and move semantics aren't available in C++98.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179374
91177308-0d34-0410-b5e6-
96231b3b80d8
Andy Gibbs [Fri, 12 Apr 2013 10:56:28 +0000 (10:56 +0000)]
Replace uses of the deprecated std::auto_ptr with OwningPtr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179373
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Fri, 12 Apr 2013 08:33:11 +0000 (08:33 +0000)]
Fix a disconcerting bug in Value::isUsedInBasicBlock, which gave wrong answers for blocks larger than 3 instrs.
Also add a unit test. PR15727.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179370
91177308-0d34-0410-b5e6-
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Alexey Samsonov [Fri, 12 Apr 2013 07:18:55 +0000 (07:18 +0000)]
Don't explicitly provide -pie in MSan bootstrap of LLVM, as it's now implied by the driver
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179367
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Rieck [Fri, 12 Apr 2013 04:07:39 +0000 (04:07 +0000)]
Teach llvm-readobj to print ELF program headers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179363
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Rieck [Fri, 12 Apr 2013 04:07:13 +0000 (04:07 +0000)]
Remove obsolete object file dumpers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179362
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Rieck [Fri, 12 Apr 2013 04:06:46 +0000 (04:06 +0000)]
Replace coff-/elf-dump with llvm-readobj
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179361
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Rieck [Fri, 12 Apr 2013 04:02:23 +0000 (04:02 +0000)]
Add extensive relocation tests for llvm-readobj
This test ensures that relocation type names returned by libObject match
the raw relocation type value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179360
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Rieck [Fri, 12 Apr 2013 04:01:52 +0000 (04:01 +0000)]
Add -expand-relocs to llvm-readobj
This option expands shown relocations from single line to a dictionary
format:
Relocation {
Offset: 0x4
Type: R_386_32 (1)
Symbol: sym
Info: 0x0
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179359
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Rieck [Fri, 12 Apr 2013 04:01:28 +0000 (04:01 +0000)]
Add missing relocation names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179358
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Rieck [Fri, 12 Apr 2013 03:59:28 +0000 (03:59 +0000)]
Support MIPS64EL relocation type names
MIPS64EL relocation entries have up to three relocation operations. Because
libObject only exposes a single relocation name, use the concatenation of
the individual relocation type names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179357
91177308-0d34-0410-b5e6-
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Hal Finkel [Fri, 12 Apr 2013 02:18:09 +0000 (02:18 +0000)]
Add PPC instruction record forms and associated query functions
This is prep. work for the implementation of optimizeCompare. Many PPC
instructions have 'record' forms (in almost all cases, this means that the RC
bit is set) that cause the result of the instruction to be compared with zero,
and the result of that comparison saved in a predefined condition register. In
order to add the record forms of the instructions without too much
copy-and-paste, the relevant functions have been refactored into multiclasses
which define both the record and normal forms.
Also, two TableGen-generated mapping functions have been added which allow
querying the instruction code for the record form given the normal form (and
vice versa).
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179356
91177308-0d34-0410-b5e6-
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Nadav Rotem [Fri, 12 Apr 2013 01:24:16 +0000 (01:24 +0000)]
Don't disable block layout when forcing block alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179355
91177308-0d34-0410-b5e6-
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Nadav Rotem [Fri, 12 Apr 2013 01:07:16 +0000 (01:07 +0000)]
Fix the test on linux by setting the triple and the align format
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179354
91177308-0d34-0410-b5e6-
96231b3b80d8
Nadav Rotem [Fri, 12 Apr 2013 00:48:32 +0000 (00:48 +0000)]
Add a flag to align all basic blocks in the function.
When debugging performance regressions we often ask ourselves if the regression
that we see is due to poor isel/sched/ra or due to some micro-architetural
problem. When comparing two code sequences one good way to rule out front-end
bottlenecks (and other the issues) is to force code alignment. This pass adds
a flag that forces the alignment of all of the basic blocks in the program.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179353
91177308-0d34-0410-b5e6-
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Rafael Espindola [Fri, 12 Apr 2013 00:17:33 +0000 (00:17 +0000)]
Add 179294 back, but don't use bit fields so that it works on big endian hosts.
Original message:
Print more information about relocations.
With this patch llvm-readobj now prints if a relocation is pcrel, its length,
if it is extern and if it is scattered.
It also refactors the code a bit to use bit fields instead of shifts and
masks all over the place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179345
91177308-0d34-0410-b5e6-
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Chad Rosier [Thu, 11 Apr 2013 23:57:04 +0000 (23:57 +0000)]
[ms-inline asm] Add support for using the LENGTH, TYPE, and SIZE operators with
variables that use namespace alias qualifiers. Test case coming on clang side
shortly.
Part of rdar://
13499009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179343
91177308-0d34-0410-b5e6-
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Chad Rosier [Thu, 11 Apr 2013 23:37:34 +0000 (23:37 +0000)]
[ms-inline asm] Add support for using offsetof operator with variables that use
namespace alias qualifiers. Test case coming on clang side shortly.
Part of rdar://
13499009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179339
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Manman Ren [Thu, 11 Apr 2013 23:24:18 +0000 (23:24 +0000)]
Aliasing rules for struct-path aware TBAA.
Added PathAliases to check if two struct-path tags can alias.
Added command line option -struct-path-tbaa.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179337
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Chad Rosier [Thu, 11 Apr 2013 23:24:15 +0000 (23:24 +0000)]
[ms-inline asm] Pass a StringRef reference to ParseIntelVarWithQualifier so we
can build up the identifier string. No test case as support for looking up
these type of identifiers hasn't been implemented on the clang side.
Part of rdar://
13499009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179336
91177308-0d34-0410-b5e6-
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Manman Ren [Thu, 11 Apr 2013 22:51:30 +0000 (22:51 +0000)]
TBAA: add utility to create a TBAA scalar type node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179331
91177308-0d34-0410-b5e6-
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Chad Rosier [Thu, 11 Apr 2013 22:00:03 +0000 (22:00 +0000)]
[ms-inline asm] Add a new AsmRewriteKind, AOK_Delete. To be used in a future
commit.
Part of rdar://
13453209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179325
91177308-0d34-0410-b5e6-
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Chad Rosier [Thu, 11 Apr 2013 21:49:30 +0000 (21:49 +0000)]
[ms-inline asm] Remove brackets from around a symbol reference in the target
specific logic. This makes the code much less fragile. Test case coming on the
clang side in a moment.
rdar://
13634327
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179323
91177308-0d34-0410-b5e6-
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Preston Gurd [Thu, 11 Apr 2013 21:39:01 +0000 (21:39 +0000)]
Use FileCheck instead of grep.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179322
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David Majnemer [Thu, 11 Apr 2013 20:13:52 +0000 (20:13 +0000)]
Fix undefined behavior in AArch64
A64Imms::isLogicalImmBits and A64Imms::isLogicalImm will attempt to
execute shifts that perform undefined behavior. Instead of attempting
to perform the 64-bit rotation, treat it as a no-op.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179317
91177308-0d34-0410-b5e6-
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David Majnemer [Thu, 11 Apr 2013 20:05:46 +0000 (20:05 +0000)]
Optimize icmp involving addition better
Allows LLVM to optimize sequences like the following:
%add = add nsw i32 %x, 1
%cmp = icmp sgt i32 %add, %y
into:
%cmp = icmp sge i32 %x, %y
as well as:
%add1 = add nsw i32 %x, 20
%add2 = add nsw i32 %y, 57
%cmp = icmp sge i32 %add1, %add2
into:
%add = add nsw i32 %y, 37
%cmp = icmp sle i32 %cmp, %x
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179316
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Jack Carter [Thu, 11 Apr 2013 19:39:19 +0000 (19:39 +0000)]
Mips specific inline asm memory operand modifier test case
These changes are based on commit responses for r179135.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179315
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Akira Hatanaka [Thu, 11 Apr 2013 19:29:26 +0000 (19:29 +0000)]
[mips] Custom-lower i64 MULHS and MULHU nodes. Remove the code which selects
multiply instructions in MipsSEDAGToDAGISel.
This patch was supposed to be part of r178403.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179314
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Akira Hatanaka [Thu, 11 Apr 2013 19:07:14 +0000 (19:07 +0000)]
[mips] Clean up MipsISelDAGToDAG.cpp and MipsISelLowering.cpp.
- Rename function.
- Pass iterator by value.
- Remove header include.
No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179312
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Rafael Espindola [Thu, 11 Apr 2013 17:46:10 +0000 (17:46 +0000)]
Revert my last two commits while I debug what is wrong in a big endian host.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179303
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 11 Apr 2013 17:23:23 +0000 (17:23 +0000)]
Fix llvm-readobj tests on big endian hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179298
91177308-0d34-0410-b5e6-
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Rafael Espindola [Thu, 11 Apr 2013 16:31:37 +0000 (16:31 +0000)]
Print more information about relocations.
With this patch llvm-readobj now prints if a relocation is pcrel, its length,
if it is extern and if it is scattered.
It also refactors the code a bit to use bit fields instead of shifts and
masks all over the place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179294
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Thu, 11 Apr 2013 15:10:09 +0000 (15:10 +0000)]
Fix for wrong instcombine on vector insert/extract
When trying to collapse sequences of insertelement/extractelement
instructions into single shuffle instructions, there is one specific
case where the Instruction Combiner wrongly updates the resulting
Mask of shuffle indexes.
The problem is in function CollectShuffleElments.
If we have a sequence of insert/extract element instructions
like the one below:
%tmp1 = extractelement <4 x float> %LHS, i32 0
%tmp2 = insertelement <4 x float> %RHS, float %tmp1, i32 1
%tmp3 = extractelement <4 x float> %RHS, i32 2
%tmp4 = insertelement <4 x float> %tmp2, float %tmp3, i32 3
Where:
. %RHS will have a mask of [4,5,6,7]
. %LHS will have a mask of [0,1,2,3]
The Mask of shuffle indexes is wrongly computed to [4,1,6,7]
instead of [4,0,6,7].
When analyzing %tmp2 in order to compute the Mask for the
resulting shuffle instruction, the algorithm forgets to update
the mask index at position 1 with the index associated to the
element extracted from %LHS by instruction %tmp1.
Patch by Andrea DiBiagio!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179291
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Eli Bendersky [Thu, 11 Apr 2013 14:43:19 +0000 (14:43 +0000)]
Add a CHECK-NOT for a more faithful translation of the original grep | count 2.
Thanks to Reid Kleckner for catching this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179289
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