oota-llvm.git
12 years ago- Define base classes for Jump-and-link instructions and make 32-bit and 64-bit
Akira Hatanaka [Wed, 4 Jan 2012 03:02:47 +0000 (03:02 +0000)]
- Define base classes for Jump-and-link instructions and make 32-bit and 64-bit
  versions derive from them.
- JALR64 is not needed since N64 does not emit jal.
- Add template parameter to BranchLink that sets the rt field.
- Fix the set of temporary registers for O32 and N64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147518 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoHave getRegForInlineAsmConstraint return the correct register class when target
Akira Hatanaka [Wed, 4 Jan 2012 02:45:01 +0000 (02:45 +0000)]
Have getRegForInlineAsmConstraint return the correct register class when target
is Mips64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147516 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix more places which should be checking for iOS, not darwin.
Evan Cheng [Wed, 4 Jan 2012 01:55:04 +0000 (01:55 +0000)]
Fix more places which should be checking for iOS, not darwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147513 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFor x86, canonicalize max
Evan Cheng [Wed, 4 Jan 2012 01:41:39 +0000 (01:41 +0000)]
For x86, canonicalize max
(x > y) ? x : y
=>
(x >= y) ? x : y

So for something like
(x - y) > 0 : (x - y) ? 0
It will be
(x - y) >= 0 : (x - y) ? 0

This makes is possible to test sign-bit and eliminate a comparison against
zero. e.g.
subl   %esi, %edi
testl  %edi, %edi
movl   $0, %eax
cmovgl %edi, %eax
=>
xorl   %eax, %eax
subl   %esi, $edi
cmovsl %eax, %edi

rdar://10633221

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147512 91177308-0d34-0410-b5e6-96231b3b80d8

12 years ago[asan] one more test for asan instrumentation: (*a)++ should be instrumented only...
Kostya Serebryany [Wed, 4 Jan 2012 01:02:14 +0000 (01:02 +0000)]
[asan] one more test for asan instrumentation: (*a)++ should be instrumented only once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147509 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTurn a few more inline asm errors into "emitErrors" instead of fatal errors.
Chris Lattner [Tue, 3 Jan 2012 23:51:01 +0000 (23:51 +0000)]
Turn a few more inline asm errors into "emitErrors" instead of fatal errors.

Before we'd get:

$ clang t.c
fatal error: error in backend: Invalid operand for inline asm constraint 'i'!

Now we get:

$ clang t.c
t.c:16:5: error: invalid operand for inline asm constraint 'i'!
    "movq         (%4), %%mm0\n"
    ^

Which at least gets us the inline asm that is the problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147502 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agogeneralize LLVMContext::emitError to take a twine instead of a StringRef.
Chris Lattner [Tue, 3 Jan 2012 23:47:05 +0000 (23:47 +0000)]
generalize LLVMContext::emitError to take a twine instead of a StringRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147501 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix 80-column violations.
Chad Rosier [Tue, 3 Jan 2012 23:19:12 +0000 (23:19 +0000)]
Fix 80-column violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147495 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDon't use enums larger than 1 << 31 for target features.
Jakob Stoklund Olesen [Tue, 3 Jan 2012 23:04:28 +0000 (23:04 +0000)]
Don't use enums larger than 1 << 31 for target features.

Patch by Andy Zhang!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147491 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRevert r146997, "Heed spill slot alignment on ARM."
Jakob Stoklund Olesen [Tue, 3 Jan 2012 22:34:35 +0000 (22:34 +0000)]
Revert r146997, "Heed spill slot alignment on ARM."

This patch caused a miscompilation of oggenc because a frame pointer was
suddenly needed halfway through register allocation.

<rdar://problem/10625436>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147487 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAssert when reserved registers have been assigned.
Jakob Stoklund Olesen [Tue, 3 Jan 2012 22:34:31 +0000 (22:34 +0000)]
Assert when reserved registers have been assigned.

This can only happen if the set of reserved registers changes during
register allocation.

<rdar://problem/10625436>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147486 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRevert 147426 because it caused pr11696.
Nadav Rotem [Tue, 3 Jan 2012 22:19:42 +0000 (22:19 +0000)]
Revert 147426 because it caused pr11696.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147485 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix incorrect widening of the bitcast sdnode in case the incoming operand is integer...
Nadav Rotem [Tue, 3 Jan 2012 22:12:28 +0000 (22:12 +0000)]
Fix incorrect widening of the bitcast sdnode in case the incoming operand is integer-promoted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147484 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoEnhance DAGCombine for transforming 128->256 casts into a vmovaps, rather
Chad Rosier [Tue, 3 Jan 2012 21:05:52 +0000 (21:05 +0000)]
Enhance DAGCombine for transforming 128->256 casts into a vmovaps, rather
then a vxorps + vinsertf128 pair if the original vector came from a load.
rdar://10594409

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147481 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoConform to the style guide; remove 'else' after 'return'. Also remove an extra
Nick Lewycky [Tue, 3 Jan 2012 20:33:00 +0000 (20:33 +0000)]
Conform to the style guide; remove 'else' after 'return'. Also remove an extra
if-statement by turning it into an assert. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147474 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove the restriction that target intrinsics can only involve legal types. Targets...
Owen Anderson [Tue, 3 Jan 2012 20:09:02 +0000 (20:09 +0000)]
Remove the restriction that target intrinsics can only involve legal types.  Targets can perfects well support intrinsics on illegal types, as long as they are prepared to perform custom expansion during type legalization.  For example, a target where i64 is illegal might still support the i64 intrinsic operation using pairs of i32's.  ARM already does some expansions like this for non-intrinsic operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147472 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoClarified assert text.
Lang Hames [Tue, 3 Jan 2012 20:05:57 +0000 (20:05 +0000)]
Clarified assert text.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147471 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix for PR11652: assertion failures when Type.cpp is compiled with -Os
Stepan Dyatkovskiy [Tue, 3 Jan 2012 20:04:35 +0000 (20:04 +0000)]
Fix for PR11652: assertion failures when Type.cpp is compiled with -Os

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147470 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix malformed assert.
Matt Beaumont-Gay [Tue, 3 Jan 2012 19:03:59 +0000 (19:03 +0000)]
Fix malformed assert.

If anybody has strong feelings about 'default: assert(0 && "blah")' vs
'default: llvm_unreachable("blah")', feel free to regularize the instances of
each in this file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147459 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix typo.
Eric Christopher [Tue, 3 Jan 2012 18:38:37 +0000 (18:38 +0000)]
Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147456 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix typo in ruler. No functionality change.
Nick Lewycky [Tue, 3 Jan 2012 18:22:43 +0000 (18:22 +0000)]
Fix typo in ruler. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147454 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoIntel style asm variant does not need '%' prefix.
Devang Patel [Tue, 3 Jan 2012 18:22:10 +0000 (18:22 +0000)]
Intel style asm variant does not need '%' prefix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147453 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoType: replaced usage of ID with getTypeID().
Stepan Dyatkovskiy [Tue, 3 Jan 2012 14:05:04 +0000 (14:05 +0000)]
Type: replaced usage of ID with getTypeID().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147446 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFixed a bug in SelectionDAG.cpp.
Elena Demikhovsky [Tue, 3 Jan 2012 11:59:04 +0000 (11:59 +0000)]
Fixed a bug in SelectionDAG.cpp.
The failure seen on win32, when i64 type is illegal.
It happens on stage of conversion VECTOR_SHUFFLE to BUILD_VECTOR.

The failure message is:
llc: SelectionDAG.cpp:784: void VerifyNodeCommon(llvm::SDNode*): Assertion `(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && "Wrong operand type!"' failed.

I added a special test that checks vector shuffle on win32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147445 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix SCEVExpander to handle loops with no preheader when LSR gives it a
Andrew Trick [Mon, 2 Jan 2012 21:25:10 +0000 (21:25 +0000)]
Fix SCEVExpander to handle loops with no preheader when LSR gives it a
"phony" insertion point.

Fixes rdar://10619599: "SelectionDAGBuilder shouldn't visit PHI nodes!" assert

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147439 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCorrect spelling.
Duncan Sands [Mon, 2 Jan 2012 16:55:01 +0000 (16:55 +0000)]
Correct spelling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147435 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUndo the hack in r147427 and move this unittest to a better home. This
Chandler Carruth [Mon, 2 Jan 2012 09:19:48 +0000 (09:19 +0000)]
Undo the hack in r147427 and move this unittest to a better home. This
is testing the bitcode reader's functionality, not VMCore's. Add the
what is a hope sufficient build system mojo to build and run a new
unittest.

Also clean up some of the test's naming. The goal for the file should be
to unittest the Bitcode Reader, and this is just one particular test
among potentially many in the future. Also, reverse my position and
relegate the PR# to a comment, but stash the comment on the same line as
the test name so it doesn't get lost. This makes the code more
self-documenting hopefully w/o losing track of the PR number.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147431 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMiscellaneous shuffle lowering cleanup. No functional changes. Primarily converting...
Craig Topper [Mon, 2 Jan 2012 09:17:37 +0000 (09:17 +0000)]
Miscellaneous shuffle lowering cleanup. No functional changes. Primarily converting the indexing loops to unsigned to be consistent across functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147430 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake CanXFormVExtractWithShuffleIntoLoad reject loads with multiple uses. Also make...
Craig Topper [Mon, 2 Jan 2012 08:46:48 +0000 (08:46 +0000)]
Make CanXFormVExtractWithShuffleIntoLoad reject loads with multiple uses. Also make it return false if there's not even a load at all. This makes the code better match the code in DAGCombiner that it tries to match. These two changes prevent some cases where vector_shuffles were making it to instruction selection and causing the older shuffle selection code to be triggered. Also needed to fix a bad pattern that this change exposed. This is the first step towards getting rid of the old shuffle selection support. No test cases yet because there's no way to tell whether a shuffle was handled in the legalize stage or at instruction selection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147428 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix unittest makefile after r147425. This should unbreak the makefile
Chandler Carruth [Mon, 2 Jan 2012 08:40:40 +0000 (08:40 +0000)]
Fix unittest makefile after r147425. This should unbreak the makefile
build. This didn't show up in the CMake build because the CMake build
for the unittests is rather poorly factored.

This probably isn't the correct fix. This should be a bitcode reader
unittest not a VMCore unittest. I'll move it and clean various parts of
the unittest up in a follow-up patch, but I wanted to unbreak the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147427 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoOptimize the sequence blend(sign_extend(x)) to blend(shl(x)) since SSE blend instruct...
Nadav Rotem [Mon, 2 Jan 2012 08:05:46 +0000 (08:05 +0000)]
Optimize the sequence blend(sign_extend(x)) to blend(shl(x)) since SSE blend instructions only look at the highest bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147426 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMaterialize functions whose basic blocks are used by global variables. Fixes
Rafael Espindola [Mon, 2 Jan 2012 07:49:53 +0000 (07:49 +0000)]
Materialize functions whose basic blocks are used by global variables. Fixes
PR11677.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147425 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAllow CRC32 instructions to be selected when AVX is enabled.
Craig Topper [Sun, 1 Jan 2012 19:51:58 +0000 (19:51 +0000)]
Allow CRC32 instructions to be selected when AVX is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147411 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix sfence, lfence, mfence, and clflush to be able to be selected when AVX is enabled...
Craig Topper [Sun, 1 Jan 2012 19:40:22 +0000 (19:40 +0000)]
Fix sfence, lfence, mfence, and clflush to be able to be selected when AVX is enabled. Fix monitor and mwait to require SSE3 or AVX, previously they worked even if SSE3 was disabled. Make prefetch instructions not set the execution domain since they don't use XMM registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147409 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoX86Disassembler: Fix undefined behavior found by GCC 4.6
Benjamin Kramer [Sun, 1 Jan 2012 17:55:36 +0000 (17:55 +0000)]
X86Disassembler: Fix undefined behavior found by GCC 4.6

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147404 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoPatternMatch: Introduce a matcher for instructions with the "exact" bit. Use it to...
Benjamin Kramer [Sun, 1 Jan 2012 17:55:30 +0000 (17:55 +0000)]
PatternMatch: Introduce a matcher for instructions with the "exact" bit. Use it to simplify a few matchers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147403 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoPatternMatch: Simplify code by reusing the Operator class.
Benjamin Kramer [Sun, 1 Jan 2012 17:55:23 +0000 (17:55 +0000)]
PatternMatch: Simplify code by reusing the Operator class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147402 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRevert 147399. It broke CodeGen/ARM/vext.ll.
Rafael Espindola [Sun, 1 Jan 2012 17:36:23 +0000 (17:36 +0000)]
Revert 147399. It broke CodeGen/ARM/vext.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147400 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFixed a bug in SelectionDAG.cpp.
Elena Demikhovsky [Sun, 1 Jan 2012 16:22:47 +0000 (16:22 +0000)]
Fixed a bug in SelectionDAG.cpp.
The failure seen on win32, when i64 type is illegal.
It happens on stage of conversion VECTOR_SHUFFLE to BUILD_VECTOR.

The failure message is:
llc: SelectionDAG.cpp:784: void VerifyNodeCommon(llvm::SDNode*): Assertion `(I->getValueType() == EltVT || (EltVT.isInteger() && I->getValueType().isInteger() && EltVT.bitsLE(I->getValueType()))) && "Wrong operand type!"' failed.

I added a special test that checks vector shuffle on win32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147399 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoHappy new year 2012!
NAKAMURA Takumi [Sun, 1 Jan 2012 08:16:56 +0000 (08:16 +0000)]
Happy new year 2012!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147395 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMerge X86 SHUFPS and SHUFPD node types.
Craig Topper [Sat, 31 Dec 2011 23:50:21 +0000 (23:50 +0000)]
Merge X86 SHUFPS and SHUFPD node types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147394 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd patterns for integer forms of SHUFPD/VSHUFPD with a memory load.
Craig Topper [Sat, 31 Dec 2011 23:24:49 +0000 (23:24 +0000)]
Add patterns for integer forms of SHUFPD/VSHUFPD with a memory load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147393 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix typo in a SHUFPD and VSHUFPD pattern that prevented SHUFPD/VSHUFPD with a load...
Craig Topper [Sat, 31 Dec 2011 23:15:11 +0000 (23:15 +0000)]
Fix typo in a SHUFPD and VSHUFPD pattern that prevented SHUFPD/VSHUFPD with a load from being selected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147392 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake use of the exact bit when optimizing '(X >>exact 3) << 1' to eliminate the
Nick Lewycky [Sat, 31 Dec 2011 21:30:22 +0000 (21:30 +0000)]
Make use of the exact bit when optimizing '(X >>exact 3) << 1' to eliminate the
'and' that would zero out the trailing bits, and to produce an exact shift
ourselves.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147391 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoVMCore: add assert for miscompile
Dylan Noblesmith [Sat, 31 Dec 2011 13:58:58 +0000 (13:58 +0000)]
VMCore: add assert for miscompile

See PR11652. Trying to add this assert to
setSubclassData() itself actually prevented
the miscompile entirely, so it has to be here.

This makes the source of the bug more obvious
than the other asserts triggering later on did.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147390 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCleanup Mips code and rename some variables. Patch by Jack Carter
Bruno Cardoso Lopes [Fri, 30 Dec 2011 21:09:41 +0000 (21:09 +0000)]
Cleanup Mips code and rename some variables. Patch by Jack Carter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147383 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoImprove Mips JIT.
Bruno Cardoso Lopes [Fri, 30 Dec 2011 21:04:30 +0000 (21:04 +0000)]
Improve Mips JIT.

Implement encoder methods getJumpTargetOpValue and getBranchTargetOpValue
for jmptarget and brtarget Mips tablegen operand types in the code emitter
for old-style JIT. Rename the pc relative relocation for branches - new
name is Mips::reloc_mips_pc16.

Patch by Sasa Stankovic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147382 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove extraneous ".get()->" which is just "->". No functionality change.
Nick Lewycky [Fri, 30 Dec 2011 19:17:23 +0000 (19:17 +0000)]
Remove extraneous ".get()->" which is just "->". No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147379 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake FMA4 imply AVX so that YMM registers would be available. Necessitates removing...
Craig Topper [Fri, 30 Dec 2011 07:16:00 +0000 (07:16 +0000)]
Make FMA4 imply AVX so that YMM registers would be available. Necessitates removing from Bulldozer CPU types since it would enable AVX code generation implicitly. Also make SSE4A imply SSE3. Without some level of SSE implied, XMM registers wouldn't be legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147369 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd disassembler support for VPERMIL2PD and VPERMIL2PS.
Craig Topper [Fri, 30 Dec 2011 06:23:39 +0000 (06:23 +0000)]
Add disassembler support for VPERMIL2PD and VPERMIL2PS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147368 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd FMA4 instructions to disassembler.
Craig Topper [Fri, 30 Dec 2011 05:20:36 +0000 (05:20 +0000)]
Add FMA4 instructions to disassembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147367 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSeparate the concept of having memory access in operand 4 from the concept of having...
Craig Topper [Fri, 30 Dec 2011 04:48:54 +0000 (04:48 +0000)]
Separate the concept of having memory access in operand 4 from the concept of having the W bit set for XOP instructons. Removes ORing W-bits in the encoder and will similarly simplify the disassembler implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147366 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCombine FMA4 SS/SD patterns with the instruction definitions.
Craig Topper [Fri, 30 Dec 2011 03:33:59 +0000 (03:33 +0000)]
Combine FMA4 SS/SD patterns with the instruction definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147365 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCombine FMA4 PS/PD patterns with the instruction definitions.
Craig Topper [Fri, 30 Dec 2011 03:17:15 +0000 (03:17 +0000)]
Combine FMA4 PS/PD patterns with the instruction definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147364 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoChange FMA4 memory forms to use memopv* instead of alignedloadv*. No need to force...
Craig Topper [Fri, 30 Dec 2011 02:18:36 +0000 (02:18 +0000)]
Change FMA4 memory forms to use memopv* instead of alignedloadv*. No need to force alignment on these instructions. Add a couple testcases for memory forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147361 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix load size for FMA4 SS/SD instructions. They need to use f32 and f64 size, but...
Craig Topper [Fri, 30 Dec 2011 01:49:53 +0000 (01:49 +0000)]
Fix load size for FMA4 SS/SD instructions. They need to use f32 and f64 size, but with the special handling to be compatible with the intrinsic expecting a vector. Similar handling is already used elsewhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147360 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCleanup stack/frame register define/kill states. This fixes two bugs:
Hal Finkel [Fri, 30 Dec 2011 00:34:00 +0000 (00:34 +0000)]
Cleanup stack/frame register define/kill states. This fixes two bugs:

1. The ST*UX instructions that store and update the stack pointer did not set define/kill on R1. This became a problem when I activated post-RA scheduling (and had incorrectly adjusted the Frames-large test).

2. eliminateFrameIndex did not kill its scavenged temporary register, and this could cause the scavenger to exhaust all available registers (and its emergency spill slot) when there were a lot of CR values to spill. The 2010-02-12-saveCR test has been adjusted to check for this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147359 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoImplement cfi_restore. Patch by Brian Anderson!
Rafael Espindola [Thu, 29 Dec 2011 21:43:03 +0000 (21:43 +0000)]
Implement cfi_restore. Patch by Brian Anderson!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147356 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRename Remember and Restore to RememberState and RestoreState for consistency.
Rafael Espindola [Thu, 29 Dec 2011 21:09:08 +0000 (21:09 +0000)]
Rename Remember and Restore to RememberState and RestoreState for consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147354 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix execution domains for PS/PD FMA3 instructions. Add SS/SD forms o FMA3 instructions.
Craig Topper [Thu, 29 Dec 2011 20:43:40 +0000 (20:43 +0000)]
Fix execution domains for PS/PD FMA3 instructions. Add SS/SD forms o FMA3 instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147353 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoImplement .cfi_escape. Patch by Brian Anderson!
Rafael Espindola [Thu, 29 Dec 2011 20:24:47 +0000 (20:24 +0000)]
Implement .cfi_escape. Patch by Brian Anderson!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147352 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoExpose FMA3 instructions to the disassembler.
Craig Topper [Thu, 29 Dec 2011 20:03:14 +0000 (20:03 +0000)]
Expose FMA3 instructions to the disassembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147351 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake FMA3 imply AVX needs to be enabled. Particularly because 256-bit types aren...
Craig Topper [Thu, 29 Dec 2011 19:46:19 +0000 (19:46 +0000)]
Make FMA3 imply AVX needs to be enabled. Particularly because 256-bit types aren't valid unless AVX is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147349 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoChange XOP detection to use the correct CPUID bit instead of using the FMA4 bit.
Craig Topper [Thu, 29 Dec 2011 19:25:56 +0000 (19:25 +0000)]
Change XOP detection to use the correct CPUID bit instead of using the FMA4 bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147348 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd FeaturePOPCNT to all CPU types that lost it was removed from SSE42/SSE4A in r147339.
Craig Topper [Thu, 29 Dec 2011 18:47:31 +0000 (18:47 +0000)]
Add FeaturePOPCNT to all CPU types that lost it was removed from SSE42/SSE4A in r147339.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147347 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMark non-VEX forms of PCLMUL instructions as requiring SSE2 to be enabled along with...
Craig Topper [Thu, 29 Dec 2011 18:08:36 +0000 (18:08 +0000)]
Mark non-VEX forms of PCLMUL instructions as requiring SSE2 to be enabled along with CLMUL. That's required for the XMM registers to be valid for integer data. Doesn't change any behavior since the CLMUL instructions don't have patterns yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147345 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMark non-VEX forms of AES instructions as requiring SSE2 to be enabled along with...
Craig Topper [Thu, 29 Dec 2011 18:00:08 +0000 (18:00 +0000)]
Mark non-VEX forms of AES instructions as requiring SSE2 to be enabled along with AES. Since that's required for the XMM registers to be valid for integer data. Doesn't change any behavior though since you can't use an intrinsic with an illegal type anyway. Just makes it consistent with the VEX forms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147344 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove the separate explicit AES instruction patterns. They are equivalent to the...
Craig Topper [Thu, 29 Dec 2011 17:41:56 +0000 (17:41 +0000)]
Remove the separate explicit AES instruction patterns. They are equivalent to the patterns specified by the instructions. Also remove unnecessary bitconverts from the AES patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147342 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake SSE42 and SSE4A not imply POPCNT. POPCNT should be able to be disabled on its...
Craig Topper [Thu, 29 Dec 2011 15:51:45 +0000 (15:51 +0000)]
Make SSE42 and SSE4A not imply POPCNT. POPCNT should be able to be disabled on its own without disabling SSE4.2 or SSE4A.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147339 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake LowerBUILD_VECTOR keep node vector types consistent when creating MOVL for v16i1...
Craig Topper [Thu, 29 Dec 2011 03:34:54 +0000 (03:34 +0000)]
Make LowerBUILD_VECTOR keep node vector types consistent when creating MOVL for v16i16 and v32i8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147337 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove some elses after returns.
Craig Topper [Thu, 29 Dec 2011 03:20:51 +0000 (03:20 +0000)]
Remove some elses after returns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147336 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove trailing spaces. Fix an assert to use && instead of || before string. Add...
Craig Topper [Thu, 29 Dec 2011 03:09:33 +0000 (03:09 +0000)]
Remove trailing spaces. Fix an assert to use && instead of || before string. Add same assert on similar code path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147335 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix grammar error noticed by Duncan.
Rafael Espindola [Thu, 29 Dec 2011 02:15:06 +0000 (02:15 +0000)]
Fix grammar error noticed by Duncan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147333 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoChange CaptureTracking to pass a Use* instead of a Value* when a value is
Nick Lewycky [Wed, 28 Dec 2011 23:24:21 +0000 (23:24 +0000)]
Change CaptureTracking to pass a Use* instead of a Value* when a value is
captured. This allows the tracker to look at the specific use, which may be
especially interesting for function calls.

Use this to fix 'nocapture' deduction in FunctionAttrs. The existing one does
not iterate until a fixpoint and does not guarantee that it produces the same
result regardless of iteration order. The new implementation builds up a graph
of how arguments are passed from function to function, and uses a bottom-up walk
on the argument-SCCs to assign nocapture. This gets us nocapture more often, and
does so rather efficiently and independent of iteration order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147327 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix type-checking for load transformation which is not legal on floating-point types...
Eli Friedman [Wed, 28 Dec 2011 21:24:44 +0000 (21:24 +0000)]
Fix type-checking for load transformation which is not legal on floating-point types.  PR11674.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147323 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUpdate OCaml bindings for the new half float type.
Bob Wilson [Wed, 28 Dec 2011 18:51:08 +0000 (18:51 +0000)]
Update OCaml bindings for the new half float type.
Patch by Jonathan Ragan-Kelley!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147314 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd support for mipsel in configure. Fixes PR11669. Patch by Sylvestre Ledru.
Rafael Espindola [Wed, 28 Dec 2011 17:08:00 +0000 (17:08 +0000)]
Add support for mipsel in configure. Fixes PR11669. Patch by Sylvestre Ledru.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147312 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoPR11662.
Nadav Rotem [Wed, 28 Dec 2011 13:08:20 +0000 (13:08 +0000)]
PR11662.

Promotion of the mask operand needs to be done using PromoteTargetBoolean, and not padded with garbage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147309 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFixed a bug in LowerVECTOR_SHUFFLE and LowerBUILD_VECTOR.
Elena Demikhovsky [Wed, 28 Dec 2011 08:14:01 +0000 (08:14 +0000)]
Fixed a bug in LowerVECTOR_SHUFFLE and LowerBUILD_VECTOR.
Matching MOVLP mask for AVX (265-bit vectors) was wrong.
The failure was detected by conformance tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147308 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDemystify this comment.
Nick Lewycky [Wed, 28 Dec 2011 06:57:32 +0000 (06:57 +0000)]
Demystify this comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147307 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoPR11642 has been fixed, enable -fvisibility-inlines-hidden everywhere.
Rafael Espindola [Tue, 27 Dec 2011 21:37:11 +0000 (21:37 +0000)]
PR11642 has been fixed, enable -fvisibility-inlines-hidden everywhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147296 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSwitch StringMap from an array of structures to a structure of arrays.
Benjamin Kramer [Tue, 27 Dec 2011 20:35:07 +0000 (20:35 +0000)]
Switch StringMap from an array of structures to a structure of arrays.

- -25% memory usage of the main table on x86_64 (was wasted in struct padding).
- no significant performance change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147294 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUse false not zero, as a bool.
Nick Lewycky [Tue, 27 Dec 2011 18:27:22 +0000 (18:27 +0000)]
Use false not zero, as a bool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147292 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTurn cos(-x) into cos(x). Patch by Alexander Malyshev!
Nick Lewycky [Tue, 27 Dec 2011 18:25:50 +0000 (18:25 +0000)]
Turn cos(-x) into cos(x). Patch by Alexander Malyshev!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147291 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoClean up some Release build warnings.
Benjamin Kramer [Tue, 27 Dec 2011 11:41:05 +0000 (11:41 +0000)]
Clean up some Release build warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147289 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd handling of x86_avx2_pmovmskb to computeMaskedBitsForTargetNode for consistency...
Craig Topper [Tue, 27 Dec 2011 06:27:23 +0000 (06:27 +0000)]
Add handling of x86_avx2_pmovmskb to computeMaskedBitsForTargetNode for consistency. Add comments and an assert for BMI instructions to PerformXorCombine since the enabling of the combine is conditional on it, but the function itself isn't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147287 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTeach simplifycfg to recompute branch weights when merging some branches, and
Nick Lewycky [Tue, 27 Dec 2011 04:31:52 +0000 (04:31 +0000)]
Teach simplifycfg to recompute branch weights when merging some branches, and
to discard weights when appropriate. Still more to do (and a new TODO), but
it's a start!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147286 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUsing Inst->setMetadata(..., NULL) should be safe to remove metadata even when
Nick Lewycky [Tue, 27 Dec 2011 01:17:40 +0000 (01:17 +0000)]
Using Inst->setMetadata(..., NULL) should be safe to remove metadata even when
there is non of that type to remove. This fixes a crasher in the particular
case where the instruction has metadata but no metadata storage in the context
(this is only possible if the instruction has !dbg but no other metadata info).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147285 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix warning.
Rafael Espindola [Mon, 26 Dec 2011 23:12:42 +0000 (23:12 +0000)]
Fix warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147284 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake sure DAGCombiner doesn't introduce multiple loads from the same memory location...
Eli Friedman [Mon, 26 Dec 2011 22:49:32 +0000 (22:49 +0000)]
Make sure DAGCombiner doesn't introduce multiple loads from the same memory location.  PR10747, part 2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147283 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUpdate the branch weight metadata when reversing the order of a branch.
Nick Lewycky [Mon, 26 Dec 2011 20:54:14 +0000 (20:54 +0000)]
Update the branch weight metadata when reversing the order of a branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147280 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSort includes, canonicalize whitespace, fix typos. No functionality change.
Nick Lewycky [Mon, 26 Dec 2011 20:37:40 +0000 (20:37 +0000)]
Sort includes, canonicalize whitespace, fix typos. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147279 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUpdate the LangRef documentation: the codegen does support this instruction.
Nadav Rotem [Sun, 25 Dec 2011 21:32:35 +0000 (21:32 +0000)]
Update the LangRef documentation: the codegen does support this instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147274 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix a typo in the widening of vectors in PromoteIntRes. Patch by Shemer Anat.
Nadav Rotem [Sun, 25 Dec 2011 20:01:38 +0000 (20:01 +0000)]
Fix a typo in the widening of vectors in PromoteIntRes. Patch by Shemer Anat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147272 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSparc: Implement emitFrameIndexDebugValue and getDebugValue Location hooks.
Venkatraman Govindaraju [Sun, 25 Dec 2011 18:50:24 +0000 (18:50 +0000)]
Sparc: Implement emitFrameIndexDebugValue and getDebugValue Location hooks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147269 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd braces to remove silly warning.
Bill Wendling [Sun, 25 Dec 2011 06:56:22 +0000 (06:56 +0000)]
Add braces to remove silly warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147264 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove unused variables.
Rafael Espindola [Sun, 25 Dec 2011 01:20:19 +0000 (01:20 +0000)]
Remove unused variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147261 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd an explicit test that we now fold cttz.i32(..., true) >> 5 -> 0.
Chandler Carruth [Sat, 24 Dec 2011 22:34:15 +0000 (22:34 +0000)]
Add an explicit test that we now fold cttz.i32(..., true) >> 5 -> 0.
This is a result of Benjamin's work on ValueTracking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147259 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoInstCombine: Add a combine that turns (2^n)-1 ^ x back into (2^n)-1 - x iff x is...
Benjamin Kramer [Sat, 24 Dec 2011 17:31:53 +0000 (17:31 +0000)]
InstCombine: Add a combine that turns (2^n)-1 ^ x back into (2^n)-1 - x iff x is smaller than 2^n and it fuses with a following add.

This was intended to undo the sub canonicalization in cases where it's not profitable, but it also
finds some cases on it's own.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147256 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoComputeMaskedBits: Make knownzero computation more aggressive for ctlz with undef...
Benjamin Kramer [Sat, 24 Dec 2011 17:31:46 +0000 (17:31 +0000)]
ComputeMaskedBits: Make knownzero computation more aggressive for ctlz with undef zero.

unsigned foo(unsigned x) { return 31 - __builtin_clz(x); }
now compiles into a single "bsrl" instruction on x86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147255 91177308-0d34-0410-b5e6-96231b3b80d8