Mikhail Glushenkov [Tue, 2 Nov 2010 20:32:26 +0000 (20:32 +0000)]
Path: Add GetEXESuffix() to complement GetDLLSuffix().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118042
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Andrew Trick [Tue, 2 Nov 2010 18:16:45 +0000 (18:16 +0000)]
Fixes <rdar://problem/
8612856>: During postRAsched, the antidependence
breaker needs to check all definitions of the antidepenent register to
avoid multiple defs of the same new register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118032
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Chris Lattner [Tue, 2 Nov 2010 18:10:06 +0000 (18:10 +0000)]
a bunch of random cleanup, move a helper to CGT where it belongs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118031
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Dale Johannesen [Tue, 2 Nov 2010 17:59:27 +0000 (17:59 +0000)]
Apply patch for use-after-free in InlineAsm constant handling,
PR 8522 /
8616046. Test reduction, analysis and patch by Tim Deegan!
(However, review by someone who understands the classes here better
is welcome. John Krum will return!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118030
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Jim Grosbach [Tue, 2 Nov 2010 17:59:04 +0000 (17:59 +0000)]
Sort bit assignments. Cosmetic change only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118029
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Devang Patel [Tue, 2 Nov 2010 17:37:00 +0000 (17:37 +0000)]
Simplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118027
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Jim Grosbach [Tue, 2 Nov 2010 17:35:25 +0000 (17:35 +0000)]
Revert r114340 (improvements in Darwin function prologue/epilogue), as it broke
assumptions about stack layout. Specifically, LR must be saved next to FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118026
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Chris Lattner [Tue, 2 Nov 2010 17:34:28 +0000 (17:34 +0000)]
add and update comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118025
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Chris Lattner [Tue, 2 Nov 2010 17:30:52 +0000 (17:30 +0000)]
refactor/cleanup MatchableInfo by eliminating the Tokens array,
merging it into a Token field in Operand, and moving the first
token to an explicit mnemonic field. These were parallel
arrays before (except for the mnemonic) which kept confusing me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118024
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Rafael Espindola [Tue, 2 Nov 2010 17:22:24 +0000 (17:22 +0000)]
Add support for expressions in .sleb/.uleb directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118023
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Devang Patel [Tue, 2 Nov 2010 17:19:03 +0000 (17:19 +0000)]
If value map does not have register for an argument then try to find frame index before giving up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118022
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Devang Patel [Tue, 2 Nov 2010 17:01:30 +0000 (17:01 +0000)]
Use frameindex, if available, as a last resort to emit debug info for a parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118020
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Duncan Sands [Tue, 2 Nov 2010 15:12:48 +0000 (15:12 +0000)]
Fix comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118016
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Duncan Sands [Tue, 2 Nov 2010 13:57:09 +0000 (13:57 +0000)]
Add some comments explaining what MVT and EVT are, and how they differ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118014
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Duncan Sands [Tue, 2 Nov 2010 13:43:07 +0000 (13:43 +0000)]
Remove trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118013
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Owen Anderson [Tue, 2 Nov 2010 01:24:55 +0000 (01:24 +0000)]
Add correct NEON encodings for vld2, vld3, and vld4 basic variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117997
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Eric Christopher [Tue, 2 Nov 2010 01:24:49 +0000 (01:24 +0000)]
Remove an assert - it's possible to be hit, and we just want to avoid
handling those cases for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117996
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Eric Christopher [Tue, 2 Nov 2010 01:22:45 +0000 (01:22 +0000)]
Whitespeace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117995
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Eric Christopher [Tue, 2 Nov 2010 01:21:28 +0000 (01:21 +0000)]
No really, no thumb1 for arm fast isel. Also add an informative comment as
to what someone would need to do to support thumb1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117994
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Chris Lattner [Tue, 2 Nov 2010 01:03:43 +0000 (01:03 +0000)]
rename operands -> asmoperands to be more descriptive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117993
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Jakob Stoklund Olesen [Tue, 2 Nov 2010 00:58:37 +0000 (00:58 +0000)]
Don't try to split weird critical edges that really aren't:
BB#1: derived from LLVM BB %bb.nph28
Live Ins: %AL
Predecessors according to CFG: BB#0
TEST8rr %reg16384<kill>, %reg16384, %EFLAGS<imp-def>; GR8:%reg16384
JNE_4 <BB#2>, %EFLAGS<imp-use,kill>
JMP_4 <BB#2>
Successors according to CFG: BB#2 BB#2
These double CFG edges only ever occur in bugpoint-generated code, so there is
no need to attempt something clever.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117992
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Owen Anderson [Tue, 2 Nov 2010 00:24:52 +0000 (00:24 +0000)]
Attempt to provide correct encodings for a number of other vld1 variants, which we can't test
since we can neither generate nor parse them at the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117988
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Jim Grosbach [Tue, 2 Nov 2010 00:16:39 +0000 (00:16 +0000)]
Tidy up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117987
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Owen Anderson [Tue, 2 Nov 2010 00:14:00 +0000 (00:14 +0000)]
Add aesthetic break.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117986
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Jim Grosbach [Tue, 2 Nov 2010 00:13:15 +0000 (00:13 +0000)]
Tweak to fix spelling and grammar in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117985
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Owen Anderson [Tue, 2 Nov 2010 00:05:05 +0000 (00:05 +0000)]
Add correct NEON encodings for the "multiple single elements" form of vld.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117984
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Jakob Stoklund Olesen [Mon, 1 Nov 2010 23:59:55 +0000 (23:59 +0000)]
MachineLICM should not claim to be preserving the CFG when it can split critical
edges on demand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117982
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Jakob Stoklund Olesen [Mon, 1 Nov 2010 23:59:53 +0000 (23:59 +0000)]
Be more precise about verifying missing kill flags.
It is legal for an instruction to have two operands using the same register,
only one a kill. This is interpreted as a kill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117981
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Jakob Stoklund Olesen [Mon, 1 Nov 2010 23:59:48 +0000 (23:59 +0000)]
When inserting copies during splitting, always use the parent register as the
source, and let rewrite() clean it up.
This way, kill flags on the inserted copies are fixed as well during rewrite().
We can't just assume that all the copies we insert are going to be kills since
critical edges into loop headers sometimes require both source and dest to be
live out of a block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117980
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Chris Lattner [Mon, 1 Nov 2010 23:57:23 +0000 (23:57 +0000)]
fix computation of ambiguous instructions to not ignore the mnemonic.
FWIW, X86 has 254 ambiguous instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117979
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Jim Grosbach [Mon, 1 Nov 2010 23:45:50 +0000 (23:45 +0000)]
Explicitly check for non-consant reference in an LDRi12 instruction. Add FIXME
for handling the fixup necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117978
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Jim Grosbach [Mon, 1 Nov 2010 23:40:56 +0000 (23:40 +0000)]
Remove unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117977
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Bob Wilson [Mon, 1 Nov 2010 23:40:51 +0000 (23:40 +0000)]
Add support for alignment operands on VLD1-lane instructions.
This is another part of the fix for Radar
8599955.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117976
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Bob Wilson [Mon, 1 Nov 2010 23:40:46 +0000 (23:40 +0000)]
Add VLD1-lane testcases for quad-register types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117975
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Bill Wendling [Mon, 1 Nov 2010 23:17:54 +0000 (23:17 +0000)]
Missed reverting this bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117971
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Bill Wendling [Mon, 1 Nov 2010 23:11:22 +0000 (23:11 +0000)]
Minor cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117969
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Chris Lattner [Mon, 1 Nov 2010 23:08:02 +0000 (23:08 +0000)]
give MatchableInfo::Operand a constructor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117968
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Chris Lattner [Mon, 1 Nov 2010 23:07:52 +0000 (23:07 +0000)]
rearrange a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117967
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Bob Wilson [Mon, 1 Nov 2010 22:04:05 +0000 (22:04 +0000)]
Add NEON VLD1-lane instructions. Partial fix for Radar
8599955.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117964
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Jakob Stoklund Olesen [Mon, 1 Nov 2010 21:51:31 +0000 (21:51 +0000)]
Add kill flag verification.
At least X86FloatingPoint requires correct kill flags after register allocation,
and targets using register scavenging benefit. Conservative kill flags are not
enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117960
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Jakob Stoklund Olesen [Mon, 1 Nov 2010 21:51:29 +0000 (21:51 +0000)]
Update kill flags while rewriting instructions after splitting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117959
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Bill Wendling [Mon, 1 Nov 2010 21:17:06 +0000 (21:17 +0000)]
Move the machine operand MC encoding patterns to the parent classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117956
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Bill Wendling [Mon, 1 Nov 2010 21:16:39 +0000 (21:16 +0000)]
Use ARM-style comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117955
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Owen Anderson [Mon, 1 Nov 2010 21:08:20 +0000 (21:08 +0000)]
When folding away a (shl (shr)) pair, we need to check that the bits that will BECOME the low
bits are zero, not that the current low bits are zero. Fixes <rdar://problem/
8606771>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117953
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Chris Lattner [Mon, 1 Nov 2010 21:06:34 +0000 (21:06 +0000)]
use our fancy new MnemonicAlias mechanism to remove a bunch of hacks
from X86AsmParser.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117952
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Bill Wendling [Mon, 1 Nov 2010 20:41:43 +0000 (20:41 +0000)]
When we look at instructions to convert to setting the 's' flag, we need to look
at more than those which define CPSR. You can have this situation:
(1) subs ...
(2) sub r6, r5, r4
(3) movge ...
(4) cmp r6, 0
(5) movge ...
We cannot convert (2) to "subs" because (3) is using the CPSR set by
(1). There's an analogous situation here:
(1) sub r1, r2, r3
(2) sub r4, r5, r6
(3) cmp r4, ...
(5) movge ...
(6) cmp r1, ...
(7) movge ...
We cannot convert (1) to "subs" because of the intervening use of CPSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117950
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Jakob Stoklund Olesen [Mon, 1 Nov 2010 19:49:57 +0000 (19:49 +0000)]
Don't assign new registers created during a split to the same stack slot, but
give them individual stack slots once the are actually spilled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117945
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Jakob Stoklund Olesen [Mon, 1 Nov 2010 19:49:52 +0000 (19:49 +0000)]
Add basic LiveStacks verification.
When an instruction refers to a spill slot with a LiveStacks entry, check that
the spill slot is live at the instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117944
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Owen Anderson [Mon, 1 Nov 2010 18:33:37 +0000 (18:33 +0000)]
Use ARM-style comment syntax.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117941
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Bob Wilson [Mon, 1 Nov 2010 18:31:39 +0000 (18:31 +0000)]
NEON does not support truncating vector stores. Radar
8598391.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117940
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Owen Anderson [Mon, 1 Nov 2010 18:30:39 +0000 (18:30 +0000)]
Covert this test to .s form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117939
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Owen Anderson [Mon, 1 Nov 2010 18:26:43 +0000 (18:26 +0000)]
Convert this test to .s form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117938
91177308-0d34-0410-b5e6-
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Owen Anderson [Mon, 1 Nov 2010 18:13:11 +0000 (18:13 +0000)]
Covert this test to .s form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117937
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Jim Grosbach [Mon, 1 Nov 2010 18:11:14 +0000 (18:11 +0000)]
Add FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117936
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Owen Anderson [Mon, 1 Nov 2010 18:03:16 +0000 (18:03 +0000)]
Covert this test to .s form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117935
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Rafael Espindola [Mon, 1 Nov 2010 17:10:53 +0000 (17:10 +0000)]
Fix test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117932
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Jim Grosbach [Mon, 1 Nov 2010 17:08:58 +0000 (17:08 +0000)]
Add 'IsThumb' predicate to patterns marked as 'IsThumb1Only'. The latter gates
codegen using the patterns; the latter gates the assembler recognizing the
instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117931
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Rafael Espindola [Mon, 1 Nov 2010 17:07:14 +0000 (17:07 +0000)]
Write the line info to .debug_line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117930
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Jim Grosbach [Mon, 1 Nov 2010 16:59:54 +0000 (16:59 +0000)]
Mark ARM subtarget features that are available for the assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117929
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Jim Grosbach [Mon, 1 Nov 2010 16:44:21 +0000 (16:44 +0000)]
trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117927
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Rafael Espindola [Mon, 1 Nov 2010 16:27:31 +0000 (16:27 +0000)]
Move EmitInstruction to MCObjectStreamer so that ELF and MachO can share it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117925
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Jim Grosbach [Mon, 1 Nov 2010 15:59:52 +0000 (15:59 +0000)]
The T2 extract/pack instructions are only valid in Thumb2 mode. Mark the
patterns as such
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117923
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Rafael Espindola [Mon, 1 Nov 2010 15:29:07 +0000 (15:29 +0000)]
Add support for .value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117922
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Rafael Espindola [Mon, 1 Nov 2010 14:28:48 +0000 (14:28 +0000)]
Implement .weakref.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117911
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Bill Wendling [Mon, 1 Nov 2010 06:00:39 +0000 (06:00 +0000)]
Move instruction encoding bits into the parent class and remove the temporary
*_Encode classes. These instructions are the only ones which use those classes,
so a subclass isn't necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117906
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Bill Wendling [Mon, 1 Nov 2010 05:59:43 +0000 (05:59 +0000)]
More tests to XFAIL. The arm-and-txt-peephole.ll test passes even when the
peephole optimizer is disabled. That's not good at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117905
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Bill Wendling [Mon, 1 Nov 2010 05:50:55 +0000 (05:50 +0000)]
The testcase is now XFAILed. Sorry about the breakage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117904
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Bill Wendling [Mon, 1 Nov 2010 05:48:44 +0000 (05:48 +0000)]
Disable because peephole is disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117903
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Chris Lattner [Mon, 1 Nov 2010 05:41:10 +0000 (05:41 +0000)]
"mov[zs]x (mem), GR16" are not ambiguous: the mem
must be 8 bits. Support this memory form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117902
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Chris Lattner [Mon, 1 Nov 2010 05:34:34 +0000 (05:34 +0000)]
Implement enough of the missing instalias support to get
aliases installed and working. They now work when the
matched pattern and the result instruction have exactly
the same operand list.
This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://
8017633 and PR7459.
Note that we do not accept instructions like:
movzx 0(%rsp), %rsi
GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand. It could be 8/16/32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117901
91177308-0d34-0410-b5e6-
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Owen Anderson [Mon, 1 Nov 2010 05:23:58 +0000 (05:23 +0000)]
Convert this test to .s form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117900
91177308-0d34-0410-b5e6-
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Chris Lattner [Mon, 1 Nov 2010 05:06:45 +0000 (05:06 +0000)]
rename InstructionInfo -> MatchableInfo since it now
represents InstAliases as well. Rename
isAssemblerInstruction -> Validate since that is what
it does (modulo the ARM $lane hack).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117899
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Chris Lattner [Mon, 1 Nov 2010 04:53:48 +0000 (04:53 +0000)]
refactor initialization of InstructionInfo to be sharable between
instructions and InstAliases. Start creating InstructionInfo's
for Aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117898
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Chris Lattner [Mon, 1 Nov 2010 04:44:29 +0000 (04:44 +0000)]
make the asm matcher emitter reject instructions that have comments
in their asmstring. Fix the two x86 "NOREX" instructions that have them.
If these comments are important, the instlowering stuff can print them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117897
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Chris Lattner [Mon, 1 Nov 2010 04:34:44 +0000 (04:34 +0000)]
refactor InstructionInfo to not have a pointer to CodeGenInstruction
member, and make isAssemblerInstruction() a method (pushing some code
around inside it).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117895
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Chris Lattner [Mon, 1 Nov 2010 04:05:41 +0000 (04:05 +0000)]
define a new CodeGenInstAlias. It has an asmstring and operand list for now,
todo: the result field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117894
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Chris Lattner [Mon, 1 Nov 2010 04:03:32 +0000 (04:03 +0000)]
factor the operand list (and related fields/operations) out of
CodeGenInstruction into its own helper class. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117893
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Chris Lattner [Mon, 1 Nov 2010 03:19:09 +0000 (03:19 +0000)]
avoid needless throw/catch/rethrow, stringref'ize some simple stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117892
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Chris Lattner [Mon, 1 Nov 2010 02:15:23 +0000 (02:15 +0000)]
eliminate the old InstFormatName which is always "AsmString",
simplify CodeGenInstruction. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117891
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Chris Lattner [Mon, 1 Nov 2010 02:09:21 +0000 (02:09 +0000)]
all predicates on an MnemonicAlias must be AssemblerPredicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117890
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Chris Lattner [Mon, 1 Nov 2010 01:47:07 +0000 (01:47 +0000)]
change the singleton register handling code to be based on Record*'s
instead of strings, simplifying it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117889
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Chris Lattner [Mon, 1 Nov 2010 01:37:30 +0000 (01:37 +0000)]
Give AsmMatcherInfo a CodeGenTarget, which simplifies a bunch of
argument passing. Consolidate all SingletonRegister detection
and handling into a new
InstructionInfo::getSingletonRegisterForToken method instead of
having it scattered about. No change in generated .inc files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117888
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Chris Lattner [Mon, 1 Nov 2010 01:07:14 +0000 (01:07 +0000)]
move FlattenVariants out of AsmMatcherEmitter into a shared
CodeGenInstruction::FlattenAsmStringVariants method. Use it
to simplify the code in AsmWriterInst, which now no longer
needs to worry about variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117886
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Chris Lattner [Mon, 1 Nov 2010 00:51:32 +0000 (00:51 +0000)]
add a FIXME, $lane in ARM is an issue that needs to be resolved before
this can start rejecting instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117885
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Chris Lattner [Mon, 1 Nov 2010 00:46:16 +0000 (00:46 +0000)]
reject instructions that contain a \n in their asmstring. Mark
various X86 and ARM instructions that are bitten by this as isCodeGenOnly,
as they are.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117884
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Chandler Carruth [Sun, 31 Oct 2010 22:57:03 +0000 (22:57 +0000)]
Add a specialization for 'long', a hole in the set of fundamental
specializations provided here. This is a little annoying because its size
changes from platform to platform. If possible, I may follow up with a patch
that uses standard constants to simplify much of this, but assuming for now
that was avoided for a reason.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117880
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Eric Christopher [Sun, 31 Oct 2010 22:42:55 +0000 (22:42 +0000)]
Revert r117876 for now, it's causing more testsuite failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117879
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Bill Wendling [Sun, 31 Oct 2010 22:07:12 +0000 (22:07 +0000)]
Disable the peephole optimizer until 186.crafty on armv6 is fixed. This is what
looks like is happening:
Without the peephole optimizer:
(1) sub r6, r6, #32
orr r12, r12, lr, lsl r9
orr r2, r2, r3, lsl r10
(x) cmp r6, #0
ldr r9, LCPI2_10
ldr r10, LCPI2_11
(2) sub r8, r8, #32
(a) movge r12, lr, lsr r6
(y) cmp r8, #0
LPC2_10:
ldr lr, [pc, r10]
(b) movge r2, r3, lsr r8
With the peephole optimizer:
ldr r9, LCPI2_10
ldr r10, LCPI2_11
(1*) subs r6, r6, #32
(2*) subs r8, r8, #32
(a*) movge r12, lr, lsr r6
(b*) movge r2, r3, lsr r8
(1) is used by (x) for the conditional move at (a). (2) is used by (y) for the
conditional move at (b). After the peephole optimizer, these the flags resulting
from (1*) are ignored and only the flags from (2*) are considered for both
conditional moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117876
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Nicolas Geoffray [Sun, 31 Oct 2010 20:38:38 +0000 (20:38 +0000)]
Attach a GCModuleInfo to a MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117867
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Chris Lattner [Sun, 31 Oct 2010 19:27:15 +0000 (19:27 +0000)]
fix a crash on:
let Constraints = "$val = $dst", Defs = [EFLAGS] in, isCodeGenOnly = 1 {
we now get:
X86InstrCompiler.td:653:52: error: Expected class, def, defm, multiclass or let definition
let Constraints = "$val = $dst", Defs = [EFLAGS] in, isCodeGenOnly = 1 {
^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117863
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Chris Lattner [Sun, 31 Oct 2010 19:22:57 +0000 (19:22 +0000)]
fix the !eq operator in tblgen to return a bit instead of an int.
Use this to make the X86 and ARM targets set isCodeGenOnly=1
automatically for their instructions that have Format=Pseudo,
resolving a hack in tblgen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117862
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Chris Lattner [Sun, 31 Oct 2010 19:15:18 +0000 (19:15 +0000)]
two changes: make the asmmatcher generator ignore ARM pseudos properly,
and make it a hard error for instructions to not have an asm string.
These instructions should be marked isCodeGenOnly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117861
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Chris Lattner [Sun, 31 Oct 2010 19:10:56 +0000 (19:10 +0000)]
reapply r117858 with apparent editor malfunction fixed (somehow I
got a dulicated line).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117860
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Chris Lattner [Sun, 31 Oct 2010 19:05:32 +0000 (19:05 +0000)]
revert r117858 while I check out a failure I missed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117859
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Chris Lattner [Sun, 31 Oct 2010 18:48:12 +0000 (18:48 +0000)]
the asm matcher can't handle operands with modifiers (like ${foo:bar}).
Instead of silently ignoring these instructions, emit a hard error and
force the target author to either refactor the target or mark the
instruction 'isCodeGenOnly'.
Mark a few instructions in ARM and MBlaze as isCodeGenOnly the are
doing this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117858
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Chris Lattner [Sun, 31 Oct 2010 18:43:46 +0000 (18:43 +0000)]
sketch out the planned instruction alias mechanism, add some comments about
how the push/pop mnemonic aliases are wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117857
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Duncan Sands [Sun, 31 Oct 2010 13:21:44 +0000 (13:21 +0000)]
Factorize the duplicated logic for choosing the right argument
calling convention out of the fast and normal ISel files, and
into the calling convention TD file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117856
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Duncan Sands [Sun, 31 Oct 2010 13:02:38 +0000 (13:02 +0000)]
Remove CCAssignFnForRet from X86 FastISel in favour of RetCC_X86,
which has the same logic specified in the CallingConv TD file.
This brings FastISel in line with the standard X86 ISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117855
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Duncan Sands [Sun, 31 Oct 2010 10:29:14 +0000 (10:29 +0000)]
Explain the return value of CCAssignFn.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117854
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Rafael Espindola [Sun, 31 Oct 2010 00:16:26 +0000 (00:16 +0000)]
Add support for files with more than 65280 sections. No testcase since
it would be a bit too big :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117849
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