Merged in tools/lli/JIT/SparcEmitter.cpp, coupled with the JITResolver taken
from lib/Target/X86/X86CodeEmitter.cpp .

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6530 91177308-0d34-0410-b5e6-96231b3b80d8

Remove spurious assert()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6529 91177308-0d34-0410-b5e6-96231b3b80d8

Renamed MachineCodeEmitter.cpp -> X86CodeEmitter.cpp as it conflicts with the
target-independent lib/CodeGen/MachineCodeEmitter.cpp; preserved CVS history.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6528 91177308-0d34-0410-b5e6-96231b3b80d8

* Removed SparcEmitter.cpp; rolled into lib/Target/Sparc/SparcV9CodeEmitter.cpp
* No more createX86Emitter() vs. createSparcEmitter() -- there can be only one
* As a result, the memory management semantics must be handled according to
  platform -- the parameters to mmap() are particularly sensitive to the host
  architecture.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6527 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: CBackend/2003-06-01-NullPointerType.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6526 91177308-0d34-0410-b5e6-96231b3b80d8

Testcase distilled from 255.vortex

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6525 91177308-0d34-0410-b5e6-96231b3b80d8

Deal with %lo/%lm/%hm/%hh flags in getMachineOpValue().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6522 91177308-0d34-0410-b5e6-96231b3b80d8

Old testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6521 91177308-0d34-0410-b5e6-96231b3b80d8

The flag modifications weren't picking up the old values of the
flags before. Save them in a temporary variable, then restore them from the
temporary after creating the new constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6520 91177308-0d34-0410-b5e6-96231b3b80d8

Remove obsolete code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6518 91177308-0d34-0410-b5e6-96231b3b80d8

Move target specific code to target files.  The new MachineCodeEmitter
class is actually target independent!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6517 91177308-0d34-0410-b5e6-96231b3b80d8

Move X86 specific code out of the JIT into the X86 backend

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6516 91177308-0d34-0410-b5e6-96231b3b80d8

Changes to be compatible with MachineCodeEmitter.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6515 91177308-0d34-0410-b5e6-96231b3b80d8

Hack up MachineCodeEmitter to actually be target independent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6514 91177308-0d34-0410-b5e6-96231b3b80d8

Fix induction variable name clash in for loops, in finishFunction().
Modify new MachineOperand so that its flags match the old MachineOperand's
 flags, for the flags that matter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6513 91177308-0d34-0410-b5e6-96231b3b80d8

Make the .inc file depend on $(TBLGEN), so that changes to TableGen followed
by a re-link of TableGen will notify Make to rebuild the .inc file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6512 91177308-0d34-0410-b5e6-96231b3b80d8

Don't print out unique identifier for opaque types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6511 91177308-0d34-0410-b5e6-96231b3b80d8

* Implement cast (long|ulong) to bool
* Fix cast of (short|ushort|int|uint) to bool to work right

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6510 91177308-0d34-0410-b5e6-96231b3b80d8

Add RR forms of test instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6509 91177308-0d34-0410-b5e6-96231b3b80d8

Add tests for cast of long to bool

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6508 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug with casts to bool.  This fixes testcase UnitTests/2003-05-31-CastToBool.c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6507 91177308-0d34-0410-b5e6-96231b3b80d8

Implement xform: (X != 0) -> (bool)X

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6506 91177308-0d34-0410-b5e6-96231b3b80d8

New testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6505 91177308-0d34-0410-b5e6-96231b3b80d8

Add map info for arguments to call (copies)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6503 91177308-0d34-0410-b5e6-96231b3b80d8

Added the #(internal functions) to output

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6502 91177308-0d34-0410-b5e6-96231b3b80d8

Add tests for 64 bit shifts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6501 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for shl and shr for 64 bit integer types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6499 91177308-0d34-0410-b5e6-96231b3b80d8

Add definitions for TEST instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6498 91177308-0d34-0410-b5e6-96231b3b80d8

Add new cmovne32 instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6496 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: CBackend/2003-05-31-MissingStructName.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6495 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6494 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: FunctionResolve/2003-05-31-AllInternalDecls.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6486 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for: -o -

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6485 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6484 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase for behavior we depend on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6483 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: FuncResolve/2003-05-31-InternalDecl.ll
Count resolutions correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6482 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6481 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify funcresolve a bit more

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6480 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: FunctionResolve/2003-05-31-FuncPointerResolve.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6479 91177308-0d34-0410-b5e6-96231b3b80d8

Add another testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6478 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6477 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed comment width, changed arg to be const, fixed indentation, removed unnecessary includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6476 91177308-0d34-0410-b5e6-96231b3b80d8

* Correct title
* Give credit to John for making the page

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6475 91177308-0d34-0410-b5e6-96231b3b80d8

*** empty log message ***

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6474 91177308-0d34-0410-b5e6-96231b3b80d8

Made a single common InvalidRegNum = -1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6473 91177308-0d34-0410-b5e6-96231b3b80d8

Renamed a variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6472 91177308-0d34-0410-b5e6-96231b3b80d8

Support for annul/pred and other future flags on op codes.
Support for recording the physical register for implcit references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6471 91177308-0d34-0410-b5e6-96231b3b80d8

Minor changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6470 91177308-0d34-0410-b5e6-96231b3b80d8

Added MachineCodeForInstruction object as an argument to
TmpInstruction constructors because every TmpInstruction object has
to be registered with a MachineCodeForInstruction to prevent leaks.
This simplifies the user's code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6469 91177308-0d34-0410-b5e6-96231b3b80d8

Allow explicit physical registers for implicit operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6468 91177308-0d34-0410-b5e6-96231b3b80d8

Changes to allow explicit physical register arguments that have been
preallocated.  While reg-to-reg dependences were already handled, this
change required new code for adding edges to/from call instructions.
This was part of the extensive changes to the way code generation occurs
for function call arguments and return values.
See log for CodeGen/PhyRegAlloc.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6467 91177308-0d34-0410-b5e6-96231b3b80d8

Several bug fixes: globals in call operands were not being pulled out;
globals in some other places may not have been pulled out either;
globals in phi operands were being put just before the phi instead of
in the predecessor basic blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6466 91177308-0d34-0410-b5e6-96231b3b80d8

Extensive changes to the way code generation occurs for function
call arguments and return values:
Now all copy operations before and after a call are generated during
selection instead of during register allocation.
The values are copied to virtual registers (or to the stack), but
in the former case these operands are marked with the correct physical
registers according to the calling convention.
Although this complicates scheduling and does not work well with
live range analysis, it simplifies the machine-dependent part of
register allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6465 91177308-0d34-0410-b5e6-96231b3b80d8

Reverting previous beautification changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6464 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed rewriting of branches -- they now work forward and backward.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6463 91177308-0d34-0410-b5e6-96231b3b80d8

Removed useless code -- the byte order of output code is correct as is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6462 91177308-0d34-0410-b5e6-96231b3b80d8

The 'rd' register is consistently mentioned last in instruction definitions.
Created new classes from which instructions inherit their ordering of fields.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6461 91177308-0d34-0410-b5e6-96231b3b80d8

* Put back into action SLL/SRL/SRA{r,i}6 instructions
* Fixed page numbers referring to the Sparc manual

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6460 91177308-0d34-0410-b5e6-96231b3b80d8

Code beautification, no functional changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6459 91177308-0d34-0410-b5e6-96231b3b80d8

3 more bugs from the SPEC codes and from richards_benchmark.c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6458 91177308-0d34-0410-b5e6-96231b3b80d8

Enabling some of these passes causes lli to break

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6457 91177308-0d34-0410-b5e6-96231b3b80d8

The actual order of parameters in a 2-reg-immediate assembly instructions is
"rs1, imm, rd": most importantly, rd goes last.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6456 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6454 91177308-0d34-0410-b5e6-96231b3b80d8

Since malloc is no longer used, no need to free() memory.
Fixed BasicBlock patching by supplying correct type for the displacement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6453 91177308-0d34-0410-b5e6-96231b3b80d8

When converting virtual registers to immediate constants, change the opcode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6452 91177308-0d34-0410-b5e6-96231b3b80d8

Added saveBBreferences() for BasicBlock resolution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6451 91177308-0d34-0410-b5e6-96231b3b80d8

getValueOp() now takes a MachineInstr as well as a MachineOperand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6450 91177308-0d34-0410-b5e6-96231b3b80d8

Added:
* ability to save BasicBlock references to be resolved later
* register remappings from the enum values to the real hardware numbers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6449 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed the namespace to match SparcInternals.h; added notes on some missing
sections of instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6448 91177308-0d34-0410-b5e6-96231b3b80d8

The register types need to be visible outside of the class to be useful.
For one, converting register numbers based on class in the code emitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6447 91177308-0d34-0410-b5e6-96231b3b80d8

Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes.
Code beautification for the rest of the code: changed layout to match the rest
of the code base.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6446 91177308-0d34-0410-b5e6-96231b3b80d8

Make LLI behave just like LLC with regard to the compile passes it uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6444 91177308-0d34-0410-b5e6-96231b3b80d8

Add SRoA pass to gccas

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6442 91177308-0d34-0410-b5e6-96231b3b80d8

Move indvars pass after mem2reg pass where it is more likely to be useful

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6441 91177308-0d34-0410-b5e6-96231b3b80d8

Okay totally give up on trying to optimize aggregates that cannot be completely
broken up into their elements.  Too many programs break because of this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6440 91177308-0d34-0410-b5e6-96231b3b80d8

Made the register and immediate versions of instructions consecutive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6439 91177308-0d34-0410-b5e6-96231b3b80d8

add a check that allows the SRoA pass to avoid breaking programs, even if their
behavior is technically undefined

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6438 91177308-0d34-0410-b5e6-96231b3b80d8

Because the format of the shift instructions is `shift r, shcnt, r', the
instructions of format 3.12 and 3.13 cannot inherit from F3rdrs1, because that
implies that the two registers are the first two parameters to the instruction.

Thus I made the instructions inherit from F3rd again, and manually added an rs1
field AFTER the shcnt field in the instruction, which maps to the appropriate
place in the instruction.

The other changes are just elimination of unnecessary spaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6437 91177308-0d34-0410-b5e6-96231b3b80d8

Sorry, correcting small typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6433 91177308-0d34-0410-b5e6-96231b3b80d8

Added configurable options for the Linker and Archiver.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6432 91177308-0d34-0410-b5e6-96231b3b80d8

Added the CloneTrace function which clones traces. It takes a vector of basic blocks, removes
internal phi nodes, and returns a new vector of basic blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6431 91177308-0d34-0410-b5e6-96231b3b80d8

Added support for cloning a trace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6430 91177308-0d34-0410-b5e6-96231b3b80d8

Makefile: Make SparcV9CodeEmitter.inc depend on SparcV9_F*.td as well.
SparcV9_F3.td: F3_12 and F3_13 instructions have rd and rs1 fields. Also,
 their fields were totally screwed up. This seems to fix the problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6429 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: ScalarRepl/2003-05-30-MultiLevel.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6428 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6427 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug: ScalarRepl/2003-05-29-ArrayFail.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6425 91177308-0d34-0410-b5e6-96231b3b80d8

Fix call to mmap, so that it can be used on sparc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6424 91177308-0d34-0410-b5e6-96231b3b80d8

 so far everything compiles

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6423 91177308-0d34-0410-b5e6-96231b3b80d8

Implementation of Equivalence Classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6422 91177308-0d34-0410-b5e6-96231b3b80d8

Changes to support function pointers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6421 91177308-0d34-0410-b5e6-96231b3b80d8

Added support for function pointers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6420 91177308-0d34-0410-b5e6-96231b3b80d8

Prevent lines from wrapping.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6419 91177308-0d34-0410-b5e6-96231b3b80d8

Added documentation for the project options

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6418 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6417 91177308-0d34-0410-b5e6-96231b3b80d8

Get rid of extraneous ""s

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6416 91177308-0d34-0410-b5e6-96231b3b80d8

Add comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6415 91177308-0d34-0410-b5e6-96231b3b80d8

Initial checkin

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6414 91177308-0d34-0410-b5e6-96231b3b80d8

New testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6412 91177308-0d34-0410-b5e6-96231b3b80d8

Since there is now another derived .inc file, ignore them all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6411 91177308-0d34-0410-b5e6-96231b3b80d8

Use an absolute path to TableGen because not everyone (e.g. automatic tester)
has their path set up by this point.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6410 91177308-0d34-0410-b5e6-96231b3b80d8