Fix AsmParser binary precedence for shift operators.

rdar://9976729

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138208 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up. Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138207 91177308-0d34-0410-b5e6-96231b3b80d8

Add constant folding support for bitcasts of splat vectors to integers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138206 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Support/CrashRecoveryContext.cpp: Add Win32 support to CrashRecoveryContext. Thanks to Aaron Ballman!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138199 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Support/Windows/Windows.h: Require at least Windows XP(5.1) API. We will not support Windows 2000 any more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138198 91177308-0d34-0410-b5e6-96231b3b80d8

utils/lit/lit/TestingConfig.py: Pass TEMP and TMP to tests on Win32 hosts.

Win32 GetTempPath() tends to pick up %WINDIR% when neither TEMP nor TMP was found. %WINDIR% should not be treated writable on recent Windows OS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138192 91177308-0d34-0410-b5e6-96231b3b80d8

utils/lit/lit/TestingConfig.py: Split out environment vars for Win32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138191 91177308-0d34-0410-b5e6-96231b3b80d8

Cast through intptr_t, ISO C++ requires it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138186 91177308-0d34-0410-b5e6-96231b3b80d8

Remove remainder of migrated or obsolete tests from FrontendC and remove
the empty directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138181 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the VMOVQQ pseudo instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138177 91177308-0d34-0410-b5e6-96231b3b80d8

Remove migrated or obsolete tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138176 91177308-0d34-0410-b5e6-96231b3b80d8

Remove VMOVQQQQ pseudo instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138174 91177308-0d34-0410-b5e6-96231b3b80d8

Remove obsolete or migrated tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138173 91177308-0d34-0410-b5e6-96231b3b80d8

With the fix in r138164: "Add <imp-def> operands to QQ and QQQQ stack loads."
-verify-machineinstrs can be enabled for this test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138171 91177308-0d34-0410-b5e6-96231b3b80d8

Remove obsoleted test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138170 91177308-0d34-0410-b5e6-96231b3b80d8

Remove tests that were either migrated to clang or are obsolete.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138168 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the rest of the files in FrontendC++ and the directory itself.

All tests have been updated and migrated into clang or were obsolete.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138165 91177308-0d34-0410-b5e6-96231b3b80d8

Add <imp-def> operands to QQ and QQQQ stack loads.

This pleases the register scavenger and brings
test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll a little closer to
working with -verify-machineinstrs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138164 91177308-0d34-0410-b5e6-96231b3b80d8

VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::copyPhysReg.
Therefore, rather then generate a pseudo instruction, which is later expanded,
generate the necessary instructions in place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138163 91177308-0d34-0410-b5e6-96231b3b80d8

Remove migrated or obsolete tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138156 91177308-0d34-0410-b5e6-96231b3b80d8

If we're splitting the landing pad block and assigning it only one predecessor,
then don't split it a second time, since that block will be dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138153 91177308-0d34-0410-b5e6-96231b3b80d8

Remove migrated or obsolete tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138149 91177308-0d34-0410-b5e6-96231b3b80d8

Do not use named md nodes to track variables that are completely optimized. This does not scale while doing LTO with debug info. New approach is to include list of variables in the subprogram info directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138145 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb parsing and encoding support for NOP.

The irony is not lost that this is not a completely trivial patchset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138143 91177308-0d34-0410-b5e6-96231b3b80d8

Remove obsolete test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138141 91177308-0d34-0410-b5e6-96231b3b80d8

Remove migrated test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138140 91177308-0d34-0410-b5e6-96231b3b80d8

Use regex to remove false dependencies on register allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138137 91177308-0d34-0410-b5e6-96231b3b80d8

Remove obsolete or migrated tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138135 91177308-0d34-0410-b5e6-96231b3b80d8

Fix bug in function IsShiftedMask. Remove parameter SizeInBits, which is not
needed for Mips32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138132 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for NEG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138131 91177308-0d34-0410-b5e6-96231b3b80d8

Roll back the rest of r126557. It's a hack that will break in some obscure cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138130 91177308-0d34-0410-b5e6-96231b3b80d8

Fix NEG alias

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138125 91177308-0d34-0410-b5e6-96231b3b80d8

Be more lenient on tied operand matching for MUL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138124 91177308-0d34-0410-b5e6-96231b3b80d8

Re-write part of VEX encoding logic, to be more easy to read! Also fix
a bug and add a testcase!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138123 91177308-0d34-0410-b5e6-96231b3b80d8

Remove tests migrated to clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138121 91177308-0d34-0410-b5e6-96231b3b80d8

Remove previously migrated test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138120 91177308-0d34-0410-b5e6-96231b3b80d8

Update tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138116 91177308-0d34-0410-b5e6-96231b3b80d8

Remove tests migrated to clang or are unnecessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138115 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for MVN.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138109 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for MUL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138108 91177308-0d34-0410-b5e6-96231b3b80d8

Add IntervalMap::const_iterator::atBegin().

It returns true when operator--() can be called.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138107 91177308-0d34-0410-b5e6-96231b3b80d8

The landingpad instruction isn't dead simply because it's value isn't used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138102 91177308-0d34-0410-b5e6-96231b3b80d8

Remove this test. The feature and test have already been migrated to clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138101 91177308-0d34-0410-b5e6-96231b3b80d8

Remove tests migrated to clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138100 91177308-0d34-0410-b5e6-96231b3b80d8

Eli points out that this is what report_fatal_error() is for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138091 91177308-0d34-0410-b5e6-96231b3b80d8

Remove 2009-09-04-modify-crash.cpp as clang doesn't support 32-bit kext.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138087 91177308-0d34-0410-b5e6-96231b3b80d8

Remove migrated tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138086 91177308-0d34-0410-b5e6-96231b3b80d8

Remove migrated test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138085 91177308-0d34-0410-b5e6-96231b3b80d8

Remove this test. There are other, duplicates, in the clang test suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138084 91177308-0d34-0410-b5e6-96231b3b80d8

Add file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138083 91177308-0d34-0410-b5e6-96231b3b80d8

Move 2010-03-22-empty-baseclass.cpp from a frontend+opt test to just
an opt test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138082 91177308-0d34-0410-b5e6-96231b3b80d8

Add FIXME.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138077 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for MOV.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138076 91177308-0d34-0410-b5e6-96231b3b80d8

Allow non zero_reg explicit values for OptionalDefOperands in aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138073 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up. Tab character.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138072 91177308-0d34-0410-b5e6-96231b3b80d8

This is not actually unreachable, so don't use llvm_unreachable for it. Since
the intent seems to be to terminate even in Release builds, just use abort()
directly.

If program flow ever reaches a __builtin_unreachable (which llvm_unreachable is
#define'd to on newer GCCs) then the program is undefined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138068 91177308-0d34-0410-b5e6-96231b3b80d8

Tidy up. Formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138067 91177308-0d34-0410-b5e6-96231b3b80d8

Tab characters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138066 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for LSR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138065 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for LSL(register).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138064 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for LSL(immediate).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138063 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for LDRSB and LDRSH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138061 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for LDRH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138060 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for LDRB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138059 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for LDR(register).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138056 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed a memory bug in the MCDisassembler where
MCParsedAsmOperand objects were being leaked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138053 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for LDR(literal).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138052 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for LDR(immediate) form T2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138050 91177308-0d34-0410-b5e6-96231b3b80d8

Use helper function to check for low registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138048 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for LDR(immediate) form T1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138047 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed some punctuation.  Sentences can be combined with semi-colons but not
commas.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138043 91177308-0d34-0410-b5e6-96231b3b80d8

Add explanatory comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138042 91177308-0d34-0410-b5e6-96231b3b80d8

Have SPU backend use the external TCE scheduler, if the library is loaded as a
module.

Patch by Pekka Jääskeläinen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138037 91177308-0d34-0410-b5e6-96231b3b80d8

Add TB encoding to VEX versions of SSE fp logical operations to fix disassembler

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138034 91177308-0d34-0410-b5e6-96231b3b80d8

Add test case for r138018.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138033 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the
implementation!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138029 91177308-0d34-0410-b5e6-96231b3b80d8

Add llc flags to disable machine DCE and CSE.

This is useful for unit tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138028 91177308-0d34-0410-b5e6-96231b3b80d8

Make a bunch of symbols private.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138025 91177308-0d34-0410-b5e6-96231b3b80d8

C API functions must be able to see their extern "C" definitions, or it will be impossible to call them from C.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138022 91177308-0d34-0410-b5e6-96231b3b80d8

Don't treat a partial <def,undef> operand as a read.

Normally, a partial register def is treated as reading the
super-register unless it also defines the full register like this:

  %vreg110:sub_32bit<def> = COPY %vreg77:sub_32bit, %vreg110<imp-def>

This patch also uses the <undef> flag on partial defs to recognize
non-reading operands:

  %vreg110:sub_32bit<def,undef> = COPY %vreg77:sub_32bit

This fixes a subtle bug in RegisterCoalescer where LIS->shrinkToUses
would treat a coalesced copy as still reading the register, extending
the live range artificially.

My test case only works when I disable DCE so a dead copy is left for
RegisterCoalescer, so I am not including it.

<rdar://problem/9967101>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138018 91177308-0d34-0410-b5e6-96231b3b80d8

Track a retain+release nesting level independently of the
known-incremented level, because the two concepts can be used
to prove the saftey of a retain+release removal in different
ways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138016 91177308-0d34-0410-b5e6-96231b3b80d8

Intelligently split the landing pad block.

We have to be careful when splitting the landing pad block, because the
landingpad instruction is required to remain as the first non-PHI of an invoke's
unwind edge. To retain this, we split the block into two blocks, moving the
predecessors within the loop to one block and the remaining predecessors to the
other. The landingpad instruction is cloned into the new blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138015 91177308-0d34-0410-b5e6-96231b3b80d8

Add SplitLandingPadPredecessors().

SplitLandingPadPredecessors is similar to SplitBlockPredecessors in that it
splits the current block and attaches a set of predecessors to the new basic
block. However, it differs from SplitBlockPredecessors in that it's specifically
designed to handle landing pad blocks.

Two new basic blocks are created: one that is has the vector of predecessors as
its predecessors and one that has the remaining predecessors as its
predecessors. Those two new blocks then receive a cloned copy of the landingpad
instruction from the original block. The landingpad instructions are joined in a
PHI, etc. Like SplitBlockPredecessors, it updates the LLVM IR, AliasAnalysis,
DominatorTree, DominanceFrontier, LoopInfo, and LCCSA analyses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138014 91177308-0d34-0410-b5e6-96231b3b80d8

Re-encoded 128-bit AVX versions of SQRT, RSQRT, RCP have 3 operands
instead of 2. They were already defined this way in their regular
version, but not for the intrinsics versions (*_Int), and that would work
for assembly emission but not for object code, since a MachineOperand
would be missing. This commit fix PR10697.

Also removed the {VSQRT,VRSQRT,VRCP}r_Int forms and match the intrinsic
via INSERT_SUBREG+EXTRACT_SUBREG patterns. The same couldn't be done for
memory versions because sse_load_f32/sse_load_f64 operand need special
handling and don't work like regular "addr" operands.

There are right now 114 "*_Int" and 98 "Int_*" forms! I'm slowly
removing them as I step through, but hope we can get rid of these
someday, they are really annoying :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138012 91177308-0d34-0410-b5e6-96231b3b80d8

There is no need to add file as context for subroutine type. The subroutine type does not need any context.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138010 91177308-0d34-0410-b5e6-96231b3b80d8

add the comments of each declaration follow it, making it easier to read and compare to GCC's result.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138009 91177308-0d34-0410-b5e6-96231b3b80d8

Use 'getFirstInsertionPt' when trying to insert new instructions during LICM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138008 91177308-0d34-0410-b5e6-96231b3b80d8

Use subword loads instead of a 4-byte load when the size of a structure (or a
piece of it) that is being passed by value is smaller than a word.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138007 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate unnecessary forwarding function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138006 91177308-0d34-0410-b5e6-96231b3b80d8

Add NativeClient operating system support.

This patch adds support of NativeClient (*-*-nacl) OS support to LLVM.
It's already supported in autoconf/config.sub.

The motivation for this change is to start upstreaming PNaCl work. The
whole set of patches include llvm backends (i686, x86_64, ARM),
llvm-gcc (probably, would not be upstreamed because it's deprecated)
and clang (the work has been just started, the amount of changes is
going to be low and the most of the work is expected to be done close
to the mainline).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138005 91177308-0d34-0410-b5e6-96231b3b80d8

STC2L_POST and STC2L_POST should be handled the same as STCL_POST/LDC_POST for the purposes of decoding all operands except the predicate.
Found by randomized testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138003 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the decoding of RFE instruction.  RFEs have the load bit set, while SRSs have it unset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138000 91177308-0d34-0410-b5e6-96231b3b80d8

Add new DIE into the map asap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137998 91177308-0d34-0410-b5e6-96231b3b80d8

Remember to fill in some operands so we can print _something_ coherent even when decoding the CPS instruction soft-fails.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137997 91177308-0d34-0410-b5e6-96231b3b80d8

Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions.
Fixes a large class of disassembler crashes found by randomized testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137995 91177308-0d34-0410-b5e6-96231b3b80d8

FastISel: avoid function calls between the materialization of the constant and its use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137993 91177308-0d34-0410-b5e6-96231b3b80d8

Thumb assembly parsing and encoding for LDM instruction.

Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137986 91177308-0d34-0410-b5e6-96231b3b80d8

Make it clear that this code is iterating in reverse order through the array.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137985 91177308-0d34-0410-b5e6-96231b3b80d8

Update autoconfig/config.{sub,guess} to the latest version
from the GNU upstream: git://git.savannah.gnu.org/config.git

1. It eliminates a local LLVM patch for auroraux (because, the
mainline config.sub has already got support of auroraux)
2. It adds several new recognized target cpus and operating systems
(in particular, PNaCl)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137984 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r137871. The loop simplify pass should require all exits from a loop that
aren't from an indirect branch need to be dominated by the loop header.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137981 91177308-0d34-0410-b5e6-96231b3b80d8