ARM: LPAE: accomodate >32-bit addresses for page table base
authorCyril Chemparathy <cyril@ti.com>
Sat, 21 Jul 2012 19:55:04 +0000 (15:55 -0400)
committerWill Deacon <will.deacon@arm.com>
Thu, 30 May 2013 15:02:15 +0000 (16:02 +0100)
commit4756dcbfd37819a8359d3c69a22be2ee41666d0f
treea9c172f6940e607b9c0c9a3bd7393bf0cc03e940
parenta7fbc0d62a4d46e642af889e7288fede5078bc46
ARM: LPAE: accomodate >32-bit addresses for page table base

This patch redefines the early boot time use of the R4 register to steal a few
low order bits (ARCH_PGD_SHIFT bits) on LPAE systems.  This allows for up to
38-bit physical addresses.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Subash Patel <subash.rp@samsung.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm/include/asm/memory.h
arch/arm/kernel/head.S
arch/arm/kernel/smp.c
arch/arm/mm/proc-v7-3level.S