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r8169: use correct barrier between cacheable and non-cacheable memory
authorDavid Dillow <dave@thedillows.org>
Wed, 3 Mar 2010 16:33:10 +0000 (16:33 +0000)
committerDavid S. Miller <davem@davemloft.net>
Thu, 4 Mar 2010 08:53:53 +0000 (00:53 -0800)
commit4c020a961a812ffae9846b917304cea504c3a733
treec2cae6ab8a1d9b62452b26ea865fdf51573464f3tree | snapshot
parentd0021b252eaf65ca07ed14f0d66425dd9ccab9a6commit | diff
r8169: use correct barrier between cacheable and non-cacheable memory

r8169 needs certain writes to be visible to other CPUs or the NIC before
touching the hardware, but was using smp_wmb() which is only required to
order cacheable memory access. Switch to wmb() which is required to
order both cacheable and non-cacheable memory.

Noticed by Catalin Marinas and Paul Mackerras.

Signed-off-by: David Dillow <dave@thedillows.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/r8169.c diff | blob | history
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