x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1
authorBorislav Petkov <borislav.petkov@amd.com>
Thu, 4 Feb 2010 11:09:07 +0000 (12:09 +0100)
committerH. Peter Anvin <hpa@zytor.com>
Fri, 19 Feb 2010 05:58:57 +0000 (21:58 -0800)
commitf619b3d8427eb57f0134dab75b0d217325c72411
treee24abaf637f2f91e337a6d5877b0361c8015e1d4
parent414bb144efa2d2fe16d104d836d0d6b6e9265788
x86, cacheinfo: Remove NUMA dependency, fix for AMD Fam10h rev D1

The show/store_cache_disable routines depend unnecessarily on NUMA's
cpu_to_node and the disabling of cache indices broke when !CONFIG_NUMA.
Remove that dependency by using a helper which is always correct.

While at it, enable L3 Cache Index disable on rev D1 Istanbuls which
sport the feature too.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
LKML-Reference: <20100218184339.GG20473@aftab>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
arch/x86/kernel/cpu/intel_cacheinfo.c