From 015cca6c08a5da57b78796d82ab2679e8f5dabe1 Mon Sep 17 00:00:00 2001
From: James Molloy <james.molloy@arm.com>
Date: Wed, 26 Oct 2011 08:53:19 +0000
Subject: [PATCH] Revert r142530 at least temporarily while a discussion is had
 on llvm-commits regarding exactly how much optsize should optimize for size
 over performance.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143023 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMISelLowering.cpp            |  7 ++---
 .../CodeGen/ARM/2011-10-18-DisableMovtSize.ll | 26 -------------------
 2 files changed, 2 insertions(+), 31 deletions(-)
 delete mode 100644 test/CodeGen/ARM/2011-10-18-DisableMovtSize.ll

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index d7aca309807..472bf4c42f3 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -2104,11 +2104,8 @@ SDValue ARMTargetLowering::LowerGlobalAddressELF(SDValue Op,
   }
 
   // If we have T2 ops, we can materialize the address directly via movt/movw
-  // pair. This is always cheaper in terms of performance, but uses at least 2
-  // extra bytes.
-  MachineFunction &MF = DAG.getMachineFunction();
-  if (Subtarget->useMovt() &&
-      !MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize)) {
+  // pair. This is always cheaper.
+  if (Subtarget->useMovt()) {
     ++NumMovwMovt;
     // FIXME: Once remat is capable of dealing with instructions with register
     // operands, expand this into two nodes.
diff --git a/test/CodeGen/ARM/2011-10-18-DisableMovtSize.ll b/test/CodeGen/ARM/2011-10-18-DisableMovtSize.ll
deleted file mode 100644
index 4f84ab09e4b..00000000000
--- a/test/CodeGen/ARM/2011-10-18-DisableMovtSize.ll
+++ /dev/null
@@ -1,26 +0,0 @@
-; RUN: llc < %s -mtriple=armv7-unknown-linux-eabi | FileCheck %s
-
-; Check that when optimizing for size, a literal pool load is used
-; instead of the (potentially faster) movw/movt pair when loading
-; a large constant.
-
-@x = global i32* inttoptr (i32 305419888 to i32*), align 4
-
-define i32 @f() optsize {
-  ; CHECK: f:
-  ; CHECK: ldr  r{{.}}, {{.?}}LCPI{{.}}_{{.}}
-  ; CHECK: ldr  r{{.}}, [{{(pc, )?}}r{{.}}]
-  ; CHECK: ldr  r{{.}}, [r{{.}}]
-  %1 = load i32** @x, align 4
-  %2 = load i32* %1
-  ret i32 %2
-}
-
-define i32 @g() {
-  ; CHECK: g:
-  ; CHECK: movw
-  ; CHECK: movt
-  %1 = load i32** @x, align 4
-  %2 = load i32* %1
-  ret i32 %2
-}
-- 
2.34.1