From 04b304caf633a471946c59c7d313e1560c5d07a5 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 10 Jul 2009 05:37:11 +0000 Subject: [PATCH] the "isDirectCall" operand of GVRequiresRegister is always false, eliminate it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75229 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 6 +++--- lib/Target/X86/X86Subtarget.cpp | 9 ++++----- lib/Target/X86/X86Subtarget.h | 5 ++--- 3 files changed, 9 insertions(+), 11 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 35c9056d536..8084cd58e9e 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -7078,7 +7078,7 @@ bool X86TargetLowering::isLegalAddressingMode(const AddrMode &AM, if (Subtarget->GVRequiresExtraLoad(AM.BaseGV, getTargetMachine(), false)) return false; // If BaseGV requires a register, we cannot also have a BaseReg. - if (Subtarget->GVRequiresRegister(AM.BaseGV, getTargetMachine(), false) && + if (Subtarget->GVRequiresRegister(AM.BaseGV, getTargetMachine()) && AM.HasBaseReg) return false; @@ -8841,8 +8841,8 @@ void X86TargetLowering::LowerAsmOperandForConstraint(SDValue Op, } // If we require an extra load to get this address, as in PIC mode, we // can't accept it. - if (Subtarget->GVRequiresExtraLoad(GA->getGlobal(), - getTargetMachine(), false)) + if (Subtarget->GVRequiresExtraLoad(GA->getGlobal(), getTargetMachine(), + false)) return; if (hasMemory) diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index f181b38cb28..7d1f972b4e7 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -76,15 +76,14 @@ bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV, /// cases where GVRequiresExtraLoad is true. Some variations of PIC require /// a register, but not an extra load. bool X86Subtarget::GVRequiresRegister(const GlobalValue *GV, - const TargetMachine& TM, - bool isDirectCall) const { - if (GVRequiresExtraLoad(GV, TM, isDirectCall)) + const TargetMachine &TM) const { + if (GVRequiresExtraLoad(GV, TM, false)) return true; + // Code below here need only consider cases where GVRequiresExtraLoad // returns false. if (TM.getRelocationModel() == Reloc::PIC_) - return !isDirectCall && - (GV->hasLocalLinkage() || GV->hasExternalLinkage()); + return GV->hasLocalLinkage() || GV->hasExternalLinkage(); return false; } diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h index 5a4f8c5e27e..db3b5d5eaf9 100644 --- a/lib/Target/X86/X86Subtarget.h +++ b/lib/Target/X86/X86Subtarget.h @@ -201,14 +201,13 @@ public: /// symbols are indirect, loading the value at address GV rather then the /// value of GV itself. This means that the GlobalAddress must be in the base /// or index register of the address, not the GV offset field. - bool GVRequiresExtraLoad(const GlobalValue* GV, const TargetMachine& TM, + bool GVRequiresExtraLoad(const GlobalValue* GV, const TargetMachine &TM, bool isDirectCall) const; /// True if accessing the GV requires a register. This is a superset of the /// cases where GVRequiresExtraLoad is true. Some variations of PIC require /// a register, but not an extra load. - bool GVRequiresRegister(const GlobalValue* GV, const TargetMachine& TM, - bool isDirectCall) const; + bool GVRequiresRegister(const GlobalValue* GV, const TargetMachine &TM) const; /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls /// to immediate address. -- 2.34.1