From 0540e58d542032434a7f9fb8d12180ab99c53646 Mon Sep 17 00:00:00 2001 From: dkl Date: Wed, 19 Mar 2014 17:18:39 +0800 Subject: [PATCH] rk3288: add clock info to some device nodes in dts --- arch/arm/boot/dts/rk3288-clocks.dtsi | 44 +++++++++---------- arch/arm/boot/dts/rk3288.dtsi | 63 +++++++++++++++------------- 2 files changed, 55 insertions(+), 52 deletions(-) diff --git a/arch/arm/boot/dts/rk3288-clocks.dtsi b/arch/arm/boot/dts/rk3288-clocks.dtsi index 0c09d23299ff..b8586b1c5faf 100644 --- a/arch/arm/boot/dts/rk3288-clocks.dtsi +++ b/arch/arm/boot/dts/rk3288-clocks.dtsi @@ -440,7 +440,7 @@ #address-cells = <1>; #size-cells = <1>; - i2s0_pll_div: i2s0_pll_div { + i2s_pll_div: i2s_pll_div { compatible = "rockchip,rk3188-div-con"; rockchip,bits = <0 7>; clocks = <&clk_i2s_pll>; @@ -454,22 +454,22 @@ /* reg[7]: reserved */ - clk_i2s0: i2s0_mux { + clk_i2s: i2s_mux { compatible = "rockchip,rk3188-mux-con"; rockchip,bits = <8 2>; - clocks = <&clk_i2s_pll>, <&i2s0_frac>, <&i2s_clkin>, <&xin12m>; - clock-output-names = "clk_i2s0"; + clocks = <&clk_i2s_pll>, <&i2s_frac>, <&i2s_clkin>, <&xin12m>; + clock-output-names = "clk_i2s"; #clock-cells = <0>; rockchip,flags = ; }; /* reg[11:10]: reserved */ - clk_i2s0_out: i2s0_outclk_mux { + clk_i2s_out: i2s_outclk_mux { compatible = "rockchip,rk3188-mux-con"; rockchip,bits = <12 1>; - clocks = <&clk_i2s0>, <&xin12m>; - clock-output-names = "clk_i2s0_out"; + clocks = <&clk_i2s>, <&xin12m>; + clock-output-names = "clk_i2s_out"; #clock-cells = <0>; }; @@ -591,10 +591,10 @@ #address-cells = <1>; #size-cells = <1>; - i2s0_frac: i2s0_frac { + i2s_frac: i2s_frac { compatible = "rockchip,rk3188-frac-con"; clocks = <&clk_i2s_pll>; - clock-output-names = "i2s0_frac"; + clock-output-names = "i2s_frac"; /* numerator denominator */ rockchip,bits = <0 32>; rockchip,clkops-idx = @@ -690,22 +690,22 @@ #address-cells = <1>; #size-cells = <1>; - clk_sdmmc0_div: clk_sdmmc0_div { + clk_sdmmc_div: clk_sdmmc_div { compatible = "rockchip,rk3188-div-con"; rockchip,bits = <0 6>; - clocks = <&clk_sdmmc0>; - clock-output-names = "clk_sdmmc0"; + clocks = <&clk_sdmmc>; + clock-output-names = "clk_sdmmc"; rockchip,div-type = ; #clock-cells = <0>; rockchip,clkops-idx = ; }; - clk_sdmmc0: clk_sdmmc0_mux { + clk_sdmmc: clk_sdmmc_mux { compatible = "rockchip,rk3188-mux-con"; rockchip,bits = <6 2>; clocks = <&clk_cpll>, <&clk_gpll>, <&xin24m>; - clock-output-names = "clk_sdmmc0"; + clock-output-names = "clk_sdmmc"; #clock-cells = <0>; }; @@ -2097,8 +2097,8 @@ compatible = "rockchip,rk3188-gate-clk"; reg = <0x0170 0x4>; clocks = - <&clk_i2s0_out>, <&clk_i2s_pll>, - <&i2s0_frac>, <&clk_i2s0>, + <&clk_i2s_out>, <&clk_i2s_pll>, + <&i2s_frac>, <&clk_i2s>, <&spdif_div>, <&spdif_frac>, <&clk_spdif>, <&spdif_8ch_div>, @@ -2110,8 +2110,8 @@ <&jtag_clkin>, <&dummy>; clock-output-names = - "clk_i2s0_out", "clk_i2s_pll", - "i2s0_frac", "g_clk_i2s0", + "clk_i2s_out", "clk_i2s_pll", + "i2s_frac", "g_clk_i2s", "spdif_div", "spdif_frac", "clk_spdif", "spdif_8ch_div", @@ -2182,9 +2182,9 @@ "g_pclk_spi2", "g_pclk_ps2c", "g_pclk_uart0", "g_pclk_uart1", - "reserved", "g_pclk_uart2", + "reserved", "g_pclk_uart3", - "g_pclk_uart3", "g_pclk_i2c2", + "g_pclk_uart4", "g_pclk_i2c2", "g_pclk_i2c3", "g_pclk_i2c4"; #clock-cells = <1>; @@ -2386,7 +2386,7 @@ compatible = "rockchip,rk3188-gate-clk"; reg = <0x0194 0x4>; clocks = - <&clk_sdmmc0>, <&clk_sdio0>, + <&clk_sdmmc>, <&clk_sdio0>, <&clk_sdio1>, <&clk_emmc>, <&xin24m>, <&xin24m>, @@ -2399,7 +2399,7 @@ <&clk_hevc_cabac>, <&clk_hevc_core>; clock-output-names = - "clk_sdmmc0", "clk_sdio0", + "clk_sdmmc", "clk_sdio0", "clk_sdio1", "clk_emmc", "clk_otgphy0", "clk_otgphy1", diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 02dd24a047bb..369015c32eaa 100755 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -229,8 +229,8 @@ //pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>; /*gate8_0 --hclk_sdmmc_ahb_arbi_gate_en, gate13_3 --clk_emmc_src_gate_en*/ - //clocks = <&clk_gates8 0>, <&clk_gates8 0>; - clock-names = "emmc_clk", "arbi_emmc_clk"; + clocks = <&clk_emmc>, <&clk_gates8 6>; + clock-names = "clk_mmc", "hclk_mmc"; num-slots = <1>; fifo-depth = <0x80>; bus-width = <4>; @@ -248,8 +248,8 @@ //pinctrl-1 = <&sd0_cd_gpio>; //for int gpio? /*gate8_0 --hclk_sdmmc_ahb_arbi_gate_en, gate13_0 --clk_mmc0_src_gate_en*/ - //clocks = <&clk_gates8 0>, <&clk_gates13 0>; - clock-names = "sdmmc_clk", "arbi_sdmmc_clk"; + clocks = <&clk_sdmmc>, <&clk_gates8 3>; + clock-names = "clk_mmc", "hclk_mmc"; num-slots = <1>; fifo-depth = <0x100>; bus-width = <4>; @@ -266,8 +266,8 @@ //pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>; /*gate8_0 --hclk_sdmmc_ahb_arbi_gate_en, gate13_1 --clk_sdio0_src_gate_en*/ - //clocks = <&clk_gates8 0>, <&clk_gates13 1>; - clock-names = "sdio_clk", "arbi_sdio_clk"; + clocks = <&clk_sdio0>, <&clk_gates8 4>; + clock-names = "clk_mmc", "hclk_mmc"; num-slots = <1>; fifo-depth = <0x100>; @@ -284,8 +284,8 @@ //pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>; /*gate8_0 --hclk_sdmmc_ahb_arbi_gate_en, gate13_2 --clk_sdio1_src_gate_en*/ - //clocks = <&clk_gates8 0>, <&clk_gates13 2>; - clock-names = "sdio1_clk", "arbi_sdio1_clk"; + clocks = <&clk_sdio1>, <&clk_gates8 5>; + clock-names = "clk_mmc", "hclk_mmc"; num-slots = <1>; fifo-depth = <0x100>; @@ -351,8 +351,8 @@ reg = <0xff180000 0x100>; interrupts = ; clock-frequency = <24000000>; - //clocks = <&clk_uart0>, <&clk_gates8 0>; - //clock-names = "sclk_uart", "pclk_uart"; + clocks = <&clk_uart0>, <&clk_gates6 8>; + clock-names = "sclk_uart", "pclk_uart"; reg-shift = <2>; reg-io-width = <4>; dmas = <&pdma1 1>, <&pdma1 2>; @@ -367,8 +367,8 @@ reg = <0xff190000 0x100>; interrupts = ; clock-frequency = <24000000>; - //clocks = <&clk_uart1>, <&clk_gates8 1>; - //clock-names = "sclk_uart", "pclk_uart"; + clocks = <&clk_uart1>, <&clk_gates6 9>; + clock-names = "sclk_uart", "pclk_uart"; reg-shift = <2>; reg-io-width = <4>; dmas = <&pdma1 3>, <&pdma1 4>; @@ -383,6 +383,8 @@ reg = <0xff690000 0x100>; interrupts = ; clock-frequency = <24000000>; + clocks = <&clk_uart2>, <&clk_gates11 9>; + clock-names = "sclk_uart", "pclk_uart"; reg-shift = <2>; reg-io-width = <4>; dmas = <&pdma0 4>, <&pdma0 5>; @@ -397,8 +399,8 @@ reg = <0xff1b0000 0x100>; interrupts = ; clock-frequency = <24000000>; - //clocks = <&clk_uart2>, <&clk_gates8 2>; - //clock-names = "sclk_uart", "pclk_uart"; + clocks = <&clk_uart3>, <&clk_gates6 11>; + clock-names = "sclk_uart", "pclk_uart"; current-speed = <115200>; reg-shift = <2>; reg-io-width = <4>; @@ -414,8 +416,8 @@ reg = <0xff1c0000 0x100>; interrupts = ; clock-frequency = <24000000>; - //clocks = <&clk_uart3>, <&clk_gates8 3>; - //clock-names = "sclk_uart", "pclk_uart"; + clocks = <&clk_uart4>, <&clk_gates6 12>; + clock-names = "sclk_uart", "pclk_uart"; reg-shift = <2>; reg-io-width = <4>; dmas = <&pdma1 9>, <&pdma1 10>; @@ -461,7 +463,7 @@ pinctrl-0 = <&i2c0_sda &i2c0_scl>; pinctrl-1 = <&i2c0_gpio>; gpios = <&gpio0 GPIO_B7 GPIO_ACTIVE_LOW>, <&gpio0 GPIO_C0 GPIO_ACTIVE_LOW>; - //clocks = <&clk_gates8 4>; + clocks = <&clk_gates10 2>; rockchip,check-idle = <1>; status = "disabled"; }; @@ -476,7 +478,7 @@ pinctrl-0 = <&i2c1_sda &i2c1_scl>; pinctrl-1 = <&i2c1_gpio>; gpios = <&gpio8 GPIO_A4 GPIO_ACTIVE_LOW>, <&gpio8 GPIO_A5 GPIO_ACTIVE_LOW>; - //clocks = <&clk_gates8 5>; + clocks = <&clk_gates10 3>; rockchip,check-idle = <1>; status = "disabled"; }; @@ -491,7 +493,7 @@ pinctrl-0 = <&i2c2_sda &i2c2_scl>; pinctrl-1 = <&i2c2_gpio>; gpios = <&gpio6 GPIO_B1 GPIO_ACTIVE_LOW>, <&gpio6 GPIO_B2 GPIO_ACTIVE_LOW>; - //clocks = <&clk_gates8 6>; + clocks = <&clk_gates6 13>; rockchip,check-idle = <1>; status = "disabled"; }; @@ -506,7 +508,7 @@ pinctrl-0 = <&i2c3_sda &i2c3_scl>; pinctrl-1 = <&i2c3_gpio>; gpios = <&gpio2 GPIO_C1 GPIO_ACTIVE_LOW>, <&gpio2 GPIO_C0 GPIO_ACTIVE_LOW>; - //clocks = <&clk_gates8 7>; + clocks = <&clk_gates6 14>; rockchip,check-idle = <1>; status = "disabled"; }; @@ -521,7 +523,7 @@ pinctrl-0 = <&i2c4_sda &i2c4_scl>; pinctrl-1 = <&i2c4_gpio>; gpios = <&gpio7 GPIO_C1 GPIO_ACTIVE_LOW>, <&gpio7 GPIO_C2 GPIO_ACTIVE_LOW>; - //clocks = <&clk_gates8 8>; + clocks = <&clk_gates6 15>; rockchip,check-idle = <1>; status = "disabled"; }; @@ -536,7 +538,7 @@ pinctrl-0 = <&i2c5_sda &i2c5_scl>; pinctrl-1 = <&i2c5_gpio>; gpios = <&gpio7 GPIO_C3 GPIO_ACTIVE_LOW>, <&gpio7 GPIO_C4 GPIO_ACTIVE_LOW>; - //clocks = <&clk_gates8 8>; + clocks = <&clk_gates7 0>; rockchip,check-idle = <1>; status = "disabled"; }; @@ -588,7 +590,7 @@ pinctrl-0 = <&lcdc0_lcdc>; pinctrl-1 = <&lcdc0_gpio>; status = "disabled"; - clocks = <&aclk_vio1>, <&dclk_lcdc1>, <&hclk_vio>; + clocks = <&clk_gates15 7>, <&dclk_lcdc1>, <&clk_gates15 8>; clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc"; }; @@ -602,7 +604,7 @@ //pinctrl-0 = <&lcdc0_lcdc>; //pinctrl-1 = <&lcdc0_gpio>; status = "disabled"; - clocks = <&aclk_vio0>, <&dclk_lcdc0>, <&hclk_vio>; + clocks = <&clk_gates15 5>, <&dclk_lcdc0>, <&clk_gates15 6>; clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc"; }; @@ -614,6 +616,7 @@ io-channel-ranges; rockchip,adc-vref = <1800>; clock-frequency = <1000000>; + clocks = <&clk_saradc>, <&clk_gates7 1>; clock-names = "saradc", "pclk_saradc"; status = "disabled"; }; @@ -645,8 +648,8 @@ compatible = "rockchip-spdif"; reg = <0xff8b0000 0x10000>; //8channel //reg = ;//2channel - clocks = <&clk_spdif>; - clock-names = "spdif_mclk"; + clocks = <&clk_spdif>, <&clk_spdif_8ch>; + clock-names = "spdif_mclk","spdif_8ch_mclk"; interrupts = ; dmas = <&pdma0 3>; //dmas = <&pdma0 2>; //2channel @@ -776,7 +779,7 @@ reg = <0xff9a0000 0x800>; interrupts = , ; interrupt-names = "irq_enc", "irq_dec"; - + clocks = <&clk_vepu>, <&hclk_vepu>; clock-names = "aclk_vcodec", "hclk_vcodec"; name = "vpu_service"; status = "disabled"; @@ -787,8 +790,8 @@ reg = <0xff9c0000 0x800>; interrupts = ; interrupt-names = "irq_dec"; - - clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core", "clk_cabac"; + clocks = <&aclk_hevc>, <&hclk_hevc>, <&clk_hevc_core>, <&clk_hevc_cabac>; + clock-names = "aclk_hevc", "hclk_hevc", "clk_core", "clk_cabac"; name = "hevc_service"; status = "disabled"; }; @@ -797,7 +800,7 @@ compatible = "rockchip,iep"; reg = <0xff900000 0x800>; interrupts = ; - + clocks = <&clk_gates15 2>, <&clk_gates15 3>; clock_names = "aclk_iep", "hclk_iep"; status = "disabled"; }; -- 2.34.1