From 05cd88656135255b545d24adb51c2ba1b5c8b99e Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 23 May 2011 00:21:50 +0000 Subject: [PATCH] Transform any logical shift of a power of two into an exact/NUW shift when in a known-non-zero context. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131887 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../InstCombine/InstCombineMulDivRem.cpp | 17 +++++++++++++++ test/Transforms/InstCombine/shift.ll | 21 +++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp index fdec6407b80..f3d10611ad2 100644 --- a/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp +++ b/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp @@ -29,6 +29,23 @@ static Value *simplifyValueKnownNonZero(Value *V, InstCombiner &IC) { // code. if (!V->hasOneUse()) return 0; + + // (PowerOfTwo >>u B) --> isExact since shifting out the result would make it + // inexact. Similarly for <<. + if (BinaryOperator *I = dyn_cast(V)) + if (I->isLogicalShift() && + isPowerOfTwo(I->getOperand(0), IC.getTargetData())) { + if (I->getOpcode() == Instruction::LShr && !I->isExact()) { + I->setIsExact(); + return I; + } + + if (I->getOpcode() == Instruction::Shl && !I->hasNoUnsignedWrap()) { + I->setHasNoUnsignedWrap(); + return I; + } + } + // ((1 << A) >>u B) --> (1 << (A-B)) // Because V cannot be zero, we know that B is less than A. Value *A = 0, *B = 0, *PowerOf2 = 0; diff --git a/test/Transforms/InstCombine/shift.ll b/test/Transforms/InstCombine/shift.ll index bded68ac475..d9ac9cbfe9e 100644 --- a/test/Transforms/InstCombine/shift.ll +++ b/test/Transforms/InstCombine/shift.ll @@ -506,3 +506,24 @@ define i32 @test41(i32 %a, i32 %b) nounwind { ; CHECK-NEXT: shl i32 8, %b ; CHECK-NEXT: ret i32 } + +define i32 @test42(i32 %a, i32 %b) nounwind { + %div = lshr i32 4096, %b ; must be exact otherwise we'd divide by zero + %div2 = udiv i32 %a, %div + ret i32 %div2 +; CHECK: @test42 +; CHECK-NEXT: lshr exact i32 4096, %b +} + +define i32 @test43(i32 %a, i32 %b) nounwind { + %div = shl i32 4096, %b ; must be exact otherwise we'd divide by zero + %div2 = udiv i32 %a, %div + ret i32 %div2 +; CHECK: @test43 +; CHECK-NEXT: add i32 %b, 12 +; CHECK-NEXT: lshr +; CHECK-NEXT: ret +} + + + -- 2.34.1