From 0734b0f474aea8ac3d7650c4490339749cefba8d Mon Sep 17 00:00:00 2001 From: xubilv Date: Tue, 18 Jul 2017 11:24:39 +0800 Subject: [PATCH] drm/rockchip: dw-mipi-dsi: fix escape clock rate Use the same calculation as the vendor kernel to derive the escape clock speed. Change-Id: I7aff4dc7fa9598df164148eaf44304caad704f23 Signed-off-by: xubilv --- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c index 890fd83b7a08..642caf1247a2 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -749,11 +749,16 @@ static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi, static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi) { + u32 esc_clk_div; + dsi_write(dsi, DSI_PWR_UP, RESET); dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK | PHY_RSTZ | PHY_SHUTDOWNZ); + + /* The maximum value of the escape clock frequency is 20MHz */ + esc_clk_div = DIV_ROUND_UP(dsi->lane_mbps >> 3, 20); dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVIDSION(10) | - TX_ESC_CLK_DIVIDSION(7)); + TX_ESC_CLK_DIVIDSION(esc_clk_div)); } static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi, -- 2.34.1