From 08c5a347a05e73a34c70ec8b694b1e89b96a6bf5 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Wed, 20 Apr 2011 22:14:17 +0000 Subject: [PATCH] Permit remat when a virtual register has multiple defs. TII::isTriviallyReMaterializable() shouldn't depend on any properties of the register being defined by the instruction. Rematerialization is going to create a new virtual register anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129882 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/TargetInstrInfoImpl.cpp | 5 ----- 1 file changed, 5 deletions(-) diff --git a/lib/CodeGen/TargetInstrInfoImpl.cpp b/lib/CodeGen/TargetInstrInfoImpl.cpp index 15340a3f108..b9fcd3804d7 100644 --- a/lib/CodeGen/TargetInstrInfoImpl.cpp +++ b/lib/CodeGen/TargetInstrInfoImpl.cpp @@ -388,11 +388,6 @@ isReallyTriviallyReMaterializableGeneric(const MachineInstr *MI, if (MO.isDef() != (i == 0)) return false; - // For the def, it should be the only def of that register. - if (MO.isDef() && (llvm::next(MRI.def_begin(Reg)) != MRI.def_end() || - MRI.isLiveIn(Reg))) - return false; - // Don't allow any virtual-register uses. Rematting an instruction with // virtual register uses would length the live ranges of the uses, which // is not necessarily a good idea, certainly not "trivial". -- 2.34.1