From 097d277ef0ca572a33d20c4b26153121760b37c3 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Sat, 12 Nov 2011 19:53:52 +0000 Subject: [PATCH] Switch a few tests off linearscan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144460 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll | 2 +- test/CodeGen/ARM/fast-isel-redefinition.ll | 2 +- test/CodeGen/Thumb2/thumb2-ldrd.ll | 5 +++-- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll b/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll index e47c0383937..a65cf4b5e6d 100644 --- a/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll +++ b/test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+neon -O0 -regalloc=linearscan +; RUN: llc < %s -march=arm -mattr=+neon -O0 -regalloc=basic ; This test would crash the rewriter when trying to handle a spill after one of ; the @llvm.arm.neon.vld3.v8i8 defined three parts of a register. diff --git a/test/CodeGen/ARM/fast-isel-redefinition.ll b/test/CodeGen/ARM/fast-isel-redefinition.ll index 08dcc64c9c8..4203537807c 100644 --- a/test/CodeGen/ARM/fast-isel-redefinition.ll +++ b/test/CodeGen/ARM/fast-isel-redefinition.ll @@ -1,4 +1,4 @@ -; RUN: llc -O0 -regalloc=linearscan < %s +; RUN: llc -O0 -regalloc=basic < %s ; This isn't exactly a useful set of command-line options, but check that it ; doesn't crash. (It was crashing because a register was getting redefined.) diff --git a/test/CodeGen/Thumb2/thumb2-ldrd.ll b/test/CodeGen/Thumb2/thumb2-ldrd.ll index d3b781dbc0d..2e83ea146cd 100644 --- a/test/CodeGen/Thumb2/thumb2-ldrd.ll +++ b/test/CodeGen/Thumb2/thumb2-ldrd.ll @@ -1,10 +1,11 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 -regalloc=linearscan | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s @b = external global i64* define i64 @t(i64 %a) nounwind readonly { entry: -;CHECK: ldrd r2, r3, [r2] +; CHECK: ldrd +; CHECK: umull %0 = load i64** @b, align 4 %1 = load i64* %0, align 4 %2 = mul i64 %1, %a -- 2.34.1