From 0e5b4860b5043f88f64ca8f2380b99aae3c7a713 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Tue, 11 Mar 2014 01:38:53 +0000 Subject: [PATCH] R600: Calculate store mask instead of using switch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203527 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/AMDGPUISelLowering.cpp | 20 +++----------------- 1 file changed, 3 insertions(+), 17 deletions(-) diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp index 0fa8133edf2..8e19e66aaf3 100644 --- a/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/lib/Target/R600/AMDGPUISelLowering.cpp @@ -630,17 +630,8 @@ SDValue AMDGPUTargetLowering::MergeVectorStore(const SDValue &Op, unsigned MemEltBits = MemEltVT.getSizeInBits(); unsigned MemNumElements = MemVT.getVectorNumElements(); EVT PackedVT = EVT::getIntegerVT(*DAG.getContext(), MemVT.getSizeInBits()); - SDValue Mask; - switch(MemEltBits) { - case 8: - Mask = DAG.getConstant(0xFF, PackedVT); - break; - case 16: - Mask = DAG.getConstant(0xFFFF, PackedVT); - break; - default: - llvm_unreachable("Cannot lower this vector store"); - } + SDValue Mask = DAG.getConstant((1 << MemEltBits) - 1, PackedVT); + SDValue PackedValue; for (unsigned i = 0; i < MemNumElements; ++i) { EVT ElemVT = VT.getVectorElementType(); @@ -725,12 +716,7 @@ SDValue AMDGPUTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const { return SDValue(); - unsigned Mask = 0; - if (Load->getMemoryVT() == MVT::i8) { - Mask = 0xff; - } else if (Load->getMemoryVT() == MVT::i16) { - Mask = 0xffff; - } + unsigned Mask = (1 << Load->getMemoryVT().getSizeInBits()) - 1; SDValue Ptr = DAG.getNode(ISD::SRL, DL, MVT::i32, Load->getBasePtr(), DAG.getConstant(2, MVT::i32)); SDValue Ret = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, Op.getValueType(), -- 2.34.1