From 0e66a5f53c74056f95d178c86531d7d9cfb23da9 Mon Sep 17 00:00:00 2001 From: Renato Golin Date: Thu, 12 Nov 2015 13:34:50 +0000 Subject: [PATCH] Revert "[ARM] Enable shrink-wrapping by default." This reverts commit r252825, as it broke ASAN on ARM. Investigating... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252889 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMFrameLowering.h | 5 ----- test/CodeGen/ARM/call-tc.ll | 8 +++----- test/CodeGen/ARM/fold-stack-adjust.ll | 4 +--- test/CodeGen/ARM/ifcvt5.ll | 4 ++-- test/CodeGen/ARM/ifcvt6.ll | 2 +- test/CodeGen/ARM/ifcvt8.ll | 4 +--- test/CodeGen/ARM/machine-cse-cmp.ll | 2 +- test/CodeGen/ARM/thumb-alignment.ll | 2 +- test/CodeGen/Thumb2/ifcvt-compare.ll | 6 ++---- test/CodeGen/Thumb2/thumb2-ifcvt1.ll | 7 +++---- test/CodeGen/Thumb2/thumb2-ifcvt2.ll | 4 ++-- test/CodeGen/Thumb2/v8_IT_5.ll | 2 +- 12 files changed, 18 insertions(+), 32 deletions(-) diff --git a/lib/Target/ARM/ARMFrameLowering.h b/lib/Target/ARM/ARMFrameLowering.h index 66f4dfb6ef5..c85d7ee3309 100644 --- a/lib/Target/ARM/ARMFrameLowering.h +++ b/lib/Target/ARM/ARMFrameLowering.h @@ -57,11 +57,6 @@ public: void adjustForSegmentedStacks(MachineFunction &MF, MachineBasicBlock &MBB) const override; - /// Returns true if the target will correctly handle shrink wrapping. - bool enableShrinkWrapping(const MachineFunction &MF) const override { - return true; - } - private: void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector &CSI, unsigned StmOpc, diff --git a/test/CodeGen/ARM/call-tc.ll b/test/CodeGen/ARM/call-tc.ll index 8821029520f..b2b6aaec813 100644 --- a/test/CodeGen/ARM/call-tc.ll +++ b/test/CodeGen/ARM/call-tc.ll @@ -83,11 +83,9 @@ declare void @foo() nounwind define void @t7() nounwind { entry: ; CHECKT2D-LABEL: t7: -; CHECKT2D: it ne -; CHECKT2D-NEXT: bne.w _foo -; CHECKT2D-NEXT: push -; CHECKT2D-NEXT: mov r7, sp -; CHECKT2D-NEXT: blx _foo +; CHECKT2D: blxeq _foo +; CHECKT2D-NEXT: pop.w +; CHECKT2D-NEXT: b.w _foo br i1 undef, label %bb, label %bb1.lr.ph bb1.lr.ph: diff --git a/test/CodeGen/ARM/fold-stack-adjust.ll b/test/CodeGen/ARM/fold-stack-adjust.ll index 8944a40f311..5bec6445560 100644 --- a/test/CodeGen/ARM/fold-stack-adjust.ll +++ b/test/CodeGen/ARM/fold-stack-adjust.ll @@ -1,6 +1,4 @@ -; Disable shrink-wrapping on the first test otherwise we wouldn't -; exerce the path for PR18136. -; RUN: llc -mtriple=thumbv7-apple-none-macho < %s -enable-shrink-wrap=false | FileCheck %s +; RUN: llc -mtriple=thumbv7-apple-none-macho < %s | FileCheck %s ; RUN: llc -mtriple=thumbv6m-apple-none-macho -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-T1 ; RUN: llc -mtriple=thumbv7-apple-darwin-ios -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-IOS ; RUN: llc -mtriple=thumbv7--linux-gnueabi -disable-fp-elim < %s | FileCheck %s --check-prefix=CHECK-LINUX diff --git a/test/CodeGen/ARM/ifcvt5.ll b/test/CodeGen/ARM/ifcvt5.ll index 9fb8abde613..3aa2139cc03 100644 --- a/test/CodeGen/ARM/ifcvt5.ll +++ b/test/CodeGen/ARM/ifcvt5.ll @@ -13,10 +13,10 @@ entry: define i32 @t1(i32 %a, i32 %b) { ; A8-LABEL: t1: -; A8: bxlt lr +; A8: poplt {r7, pc} ; SWIFT-LABEL: t1: -; SWIFT: bxlt lr +; SWIFT: pop {r7, pc} ; SWIFT: pop {r7, pc} entry: %tmp1 = icmp sgt i32 %a, 10 ; [#uses=1] diff --git a/test/CodeGen/ARM/ifcvt6.ll b/test/CodeGen/ARM/ifcvt6.ll index 668069751cf..78901930e4b 100644 --- a/test/CodeGen/ARM/ifcvt6.ll +++ b/test/CodeGen/ARM/ifcvt6.ll @@ -3,7 +3,7 @@ define void @foo(i32 %X, i32 %Y) { entry: ; CHECK: cmpne -; CHECK: bxhi lr +; CHECK: pophi %tmp1 = icmp ult i32 %X, 4 ; [#uses=1] %tmp4 = icmp eq i32 %Y, 0 ; [#uses=1] %tmp7 = or i1 %tmp4, %tmp1 ; [#uses=1] diff --git a/test/CodeGen/ARM/ifcvt8.ll b/test/CodeGen/ARM/ifcvt8.ll index e8b7f692639..ca9a5c63cda 100644 --- a/test/CodeGen/ARM/ifcvt8.ll +++ b/test/CodeGen/ARM/ifcvt8.ll @@ -5,9 +5,7 @@ declare void @abort() define fastcc void @t(%struct.SString* %word, i8 signext %c) { -; CHECK-NOT: pop -; CHECK: bxne -; CHECK-NOT: pop +; CHECK: popne entry: %tmp1 = icmp eq %struct.SString* %word, null ; [#uses=1] br i1 %tmp1, label %cond_true, label %cond_false diff --git a/test/CodeGen/ARM/machine-cse-cmp.ll b/test/CodeGen/ARM/machine-cse-cmp.ll index 611cba6ed1f..1f92ff4e119 100644 --- a/test/CodeGen/ARM/machine-cse-cmp.ll +++ b/test/CodeGen/ARM/machine-cse-cmp.ll @@ -27,7 +27,7 @@ define void @f2() nounwind ssp { entry: ; CHECK-LABEL: f2: ; CHECK: cmp -; CHECK: bxlt +; CHECK: poplt ; CHECK-NOT: cmp ; CHECK: movle %0 = load i32, i32* @foo, align 4 diff --git a/test/CodeGen/ARM/thumb-alignment.ll b/test/CodeGen/ARM/thumb-alignment.ll index b9ddfbb714d..c11d4b6da3c 100644 --- a/test/CodeGen/ARM/thumb-alignment.ll +++ b/test/CodeGen/ARM/thumb-alignment.ll @@ -23,7 +23,7 @@ define i32* @bar() { ; CHECK: .globl baz ; CHECK-NEXT: .align 2 -; CHECK: tbb +; CHECK: adr.w define i32 @baz() { %1 = load i32, i32* @c, align 4 switch i32 %1, label %7 [ diff --git a/test/CodeGen/Thumb2/ifcvt-compare.ll b/test/CodeGen/Thumb2/ifcvt-compare.ll index 7b5ce4fa3f5..8af139a5ef6 100644 --- a/test/CodeGen/Thumb2/ifcvt-compare.ll +++ b/test/CodeGen/Thumb2/ifcvt-compare.ll @@ -19,8 +19,7 @@ f: define void @f1(i32 %x) optsize { ; CHECK-LABEL: f1: ; CHECK: cmp r0, #1 - ; CHECK: it ne - ; CHECK-NEXT: bxne lr + ; CHECK: it eq %p = icmp eq i32 %x, 1 br i1 %p, label %t, label %f @@ -35,8 +34,7 @@ f: define void @f2(i32 %x) { ; CHECK-LABEL: f2: ; CHECK: cmp r0, #0 - ; CHECK: it ne - ; CHECK-NEXT: bxne lr + ; CHECK: it eq %p = icmp eq i32 %x, 0 br i1 %p, label %t, label %f diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll index eb48ffb7d80..09def7372f5 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt1.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt1.ll @@ -72,10 +72,9 @@ entry: define void @t3(i32 %a, i32 %b) nounwind { entry: ; CHECK-LABEL: t3: -; CHECK: it lt -; CHECK-NEXT: bxlt lr -; CHECK: mov r0, r1 -; CHECK: bl {{_?}}foo +; CHECK: itt ge +; CHECK: movge r0, r1 +; CHECK: blge {{_?}}foo %tmp1 = icmp sgt i32 %a, 10 ; [#uses=1] br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt2.ll b/test/CodeGen/Thumb2/thumb2-ifcvt2.ll index 4a76e100b65..1d2ba0008be 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt2.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt2.ll @@ -8,7 +8,7 @@ entry: ; CHECK: it ne ; CHECK: cmpne ; CHECK: it hi -; CHECK: bxhi lr +; CHECK: pophi {r7, pc} %tmp1 = icmp ult i32 %X, 4 ; [#uses=1] %tmp4 = icmp eq i32 %Y, 0 ; [#uses=1] %tmp7 = or i1 %tmp4, %tmp1 ; [#uses=1] @@ -69,7 +69,7 @@ define fastcc void @t1(%struct.SString* %word, i8 signext %c) { entry: ; CHECK-LABEL: t1: ; CHECK: it ne -; CHECK: bxne lr +; CHECK: popne {r7, pc} %tmp1 = icmp eq %struct.SString* %word, null ; [#uses=1] br i1 %tmp1, label %cond_true, label %cond_false diff --git a/test/CodeGen/Thumb2/v8_IT_5.ll b/test/CodeGen/Thumb2/v8_IT_5.ll index 6a7a7a0b0aa..08df9e699b1 100644 --- a/test/CodeGen/Thumb2/v8_IT_5.ll +++ b/test/CodeGen/Thumb2/v8_IT_5.ll @@ -9,7 +9,7 @@ ; CHECK-NEXT: b ; CHECK: [[JUMPTARGET]]:{{.*}}%if.else173 ; CHECK-NEXT: mov.w -; CHECK-NEXT: bx lr +; CHECK-NEXT: pop ; CHECK-NEXT: %if.else145 ; CHECK-NEXT: mov.w -- 2.34.1