From 0ea5e605ec2f397390b976502eb81d995a55c470 Mon Sep 17 00:00:00 2001 From: Randy Li Date: Wed, 20 Jul 2016 19:58:40 +0800 Subject: [PATCH] ARM: dts: enable SD and GMAC at rk3288-evb There is a bug in GMAC IP, it supports RGMII clock but not a speed mode for it. Change-Id: I8e5cca355c30920db37400901d3411eebca711ae Signed-off-by: Randy Li --- arch/arm/boot/dts/rk3288-evb.dtsi | 20 ++++++++++++++++++-- arch/arm/boot/dts/rk3288.dtsi | 1 + 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi index d621b540cac3..976f3276049c 100644 --- a/arch/arm/boot/dts/rk3288-evb.dtsi +++ b/arch/arm/boot/dts/rk3288-evb.dtsi @@ -226,7 +226,6 @@ */ vcc_sd: sdmmc-regulator { compatible = "regulator-fixed"; - gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&sdmmc_pwr>; regulator-name = "vcc_sd"; @@ -276,6 +275,22 @@ status = "okay"; }; +&gmac { + phy-supply = <&vcc_phy>; + phy-mode = "rgmii"; + clock_in_out = "input"; + snps,reset-gpio = <&gpio4 7 0>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 1000000>; + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&ext_gmac>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + tx_delay = <0x30>; + rx_delay = <0x10>; + status = "ok"; +}; + &hdmi { #address-cells = <1>; #size-cells = <0>; @@ -308,6 +323,7 @@ status = "okay"; vmmc-supply = <&vcc_sd>; vqmmc-supply = <&vccio_sd>; + supports-sd; }; &gmac { @@ -323,7 +339,7 @@ pinctrl-0 = <&rgmii_pins>; tx_delay = <0x30>; rx_delay = <0x10>; - status = "ok"; + status = "okay"; }; &edp_phy { diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index f65e406f2a60..422760e63814 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -494,6 +494,7 @@ "aclk_mac", "pclk_mac"; resets = <&cru SRST_MAC>; reset-names = "stmmaceth"; + max-speed = <100>; status = "disabled"; }; -- 2.34.1