From 0f8180aba77da2495993f1ed68837d5c44211fe3 Mon Sep 17 00:00:00 2001 From: "Huang, Tao" Date: Wed, 2 Mar 2016 10:03:17 +0800 Subject: [PATCH] arm64: dts: rockchip: remove unused files Change-Id: I5264e3967cd6dfbe776d03bc77d7434656d58772 Signed-off-by: Huang, Tao --- arch/arm64/boot/dts/rk3368-box-r88.dts | 1071 ------- arch/arm64/boot/dts/rk3368-box-r88_808.dts | 1138 ------- arch/arm64/boot/dts/rk3368-box.dts | 1061 ------ arch/arm64/boot/dts/rk3368-cif-sensor.dtsi | 30 - arch/arm64/boot/dts/rk3368-clocks.dtsi | 2847 ----------------- arch/arm64/boot/dts/rk3368-fpga.dts | 168 - arch/arm64/boot/dts/rk3368-p9_818.dts | 779 ----- arch/arm64/boot/dts/rk3368-tb_8846.dts | 1098 ------- arch/arm64/boot/dts/rk3368-tb_mipi.dts | 1123 ------- arch/arm64/boot/dts/rk3368-thermal.dtsi | 74 - arch/arm64/boot/dts/rk3368.dtsi | 2238 ------------- .../boot/dts/rk3368_dram_default_timing.dtsi | 37 - 12 files changed, 11664 deletions(-) delete mode 100644 arch/arm64/boot/dts/rk3368-box-r88.dts delete mode 100644 arch/arm64/boot/dts/rk3368-box-r88_808.dts delete mode 100644 arch/arm64/boot/dts/rk3368-box.dts delete mode 100644 arch/arm64/boot/dts/rk3368-cif-sensor.dtsi delete mode 100644 arch/arm64/boot/dts/rk3368-clocks.dtsi delete mode 100644 arch/arm64/boot/dts/rk3368-fpga.dts delete mode 100644 arch/arm64/boot/dts/rk3368-p9_818.dts delete mode 100644 arch/arm64/boot/dts/rk3368-tb_8846.dts delete mode 100644 arch/arm64/boot/dts/rk3368-tb_mipi.dts delete mode 100644 arch/arm64/boot/dts/rk3368-thermal.dtsi delete mode 100644 arch/arm64/boot/dts/rk3368.dtsi delete mode 100644 arch/arm64/boot/dts/rk3368_dram_default_timing.dtsi diff --git a/arch/arm64/boot/dts/rk3368-box-r88.dts b/arch/arm64/boot/dts/rk3368-box-r88.dts deleted file mode 100644 index 4bfe5e697fef..000000000000 --- a/arch/arm64/boot/dts/rk3368-box-r88.dts +++ /dev/null @@ -1,1071 +0,0 @@ -/dts-v1/; - -#include -#include -#include -#include "rk3368.dtsi" -#include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi" -//#include "../../../arm/boot/dts/lcd-b101ew05.dtsi" -#include "../../../arm/boot/dts/lcd-box.dtsi" - - -/ { - chosen { - bootargs = "earlyprintk=uart8250-32bit,0xff690000"; - }; - - wireless-wlan { - compatible = "wlan-platdata"; - rockchip,grf = <&grf>; - - /* wifi_chip_type - wifi chip define - * ap6210, ap6330, ap6335 - * rtl8188eu, rtl8723bs, rtl8723bu - * esp8089 - */ - wifi_chip_type = "ap6335"; - - sdio_vref = <1800>; //1800mv or 3300mv - - //keep_wifi_power_on; - - //power_ctrl_by_pmu; - power_pmu_regulator = "act_ldo3"; - power_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - //vref_ctrl_enable; - //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>; - vref_pmu_regulator = "act_ldo3"; - vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>; - WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>; - //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - - status = "okay"; - }; - - wireless-bluetooth { - compatible = "bluetooth-platdata"; - - //wifi-bt-power-toggle; - - uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default","rts_gpio"; - pinctrl-0 = <&uart0_rts>; - pinctrl-1 = <&uart0_rts_gpio>; - - BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>; - BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>; - BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>; - BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - hallsensor { - compatible = "hall_och165t"; - type = ; - irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000>; - brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240 - 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220 - 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 - 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 - 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 - 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 - 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 - 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 - 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 - 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 - 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 - 9 8 7 6 5 4 3 2 1 0>; - default-brightness-level = <200>; - enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>; - status = "disabled"; - }; - - pwm_regulator { - compatible = "rockchip_pwm_regulator"; - pwms = <&pwm1 0 2000>; - rockchip,pwm_id= <1>; - rockchip,pwm_voltage_map= <900000 925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000>; - rockchip,pwm_voltage= <1000000>; - rockchip,pwm_min_voltage= <900000>; - rockchip,pwm_max_voltage= <1375000>; - rockchip,pwm_suspend_voltage= <950000>; - rockchip,pwm_coefficient= <555>; - regulators { - #address-cells = <1>; - #size-cells = <0>; - pwm_reg0: regulator@0 { - regulator-compatible = "pwm_dcdc1"; - regulator-name= "vdd_logic"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1375000>; - regulator-always-on; - regulator-boot-on; - }; - }; - test-power{ - status = "okay"; - }; - }; - - codec_hdmi_i2s: codec-hdmi-i2s { - compatible = "hdmi-i2s"; - }; - - codec_hdmi_spdif: codec-hdmi-spdif { - compatible = "hdmi-spdif"; - }; - - rockchip-hdmi-i2s { - status = "disabled"; - compatible = "rockchip-hdmi-i2s"; - dais { - dai0 { - audio-codec = <&codec_hdmi_i2s>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - - - rockchip-spdif-card { - compatible = "rockchip-spdif-card"; - dais { - dai0 { - audio-codec = <&codec_hdmi_spdif>; - audio-controller = <&spdif>; - }; - }; - }; - rockchip-rk1000 { - compatible = "rockchip-rk1000"; - dais { - dai0 { - audio-codec = <&rk1000_codec>; - audio-controller = <&i2s0>; - format = "i2s"; - }; - }; - }; - rockchip-rt5631 { - compatible = "rockchip-rt5631"; - dais { - dai0 { - audio-codec = <&rt5631>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - rockchip-rt3224 { - compatible = "rockchip-rt3261"; - dais { - dai0 { - audio-codec = <&rt3261>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - dai1 { - audio-codec = <&rt3261>; - audio-controller = <&i2s0>; - format = "dsp_a"; - //continuous-clock; - bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - power-led { - compatible = "gpio-leds"; - green { - gpios = <&gpio3 GPIO_D5 GPIO_ACTIVE_LOW>; - default-state = "on"; - }; - }; - io-domains { - compatible = "rockchip,rk3368-io-voltage-domain"; - rockchip,grf = <&grf>; - rockchip,pmugrf = <&pmugrf>; - - /*GRF_IO_VSEL*/ - dvp-supply = <&ldo7_reg>; /*DVPIO_VDD*/ - flash0-supply = <&dcdc2_reg>; /*FLASH0_VDD*/ - wifi-supply = <&ldo7_reg>; /*APIO2_VDD*/ - audio-supply = <&dcdc2_reg>; /*APIO3_VDD*/ - sdcard-supply = <&ldo1_reg>; /*SDMMC0_VDD*/ - gpio30-supply = <&dcdc2_reg>; /*APIO1_VDD*/ - gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/ - - /*PMU_GRF_IO_VSEL*/ - pmu-supply = <&ldo5_reg>; /*PMUIO_VDD*/ - vop-supply = <&ldo5_reg>; /*LCDC_VDD*/ - }; -}; - -&gmac_clkin { - clock-frequency = <50000000>; -}; - -&gmac { - //power_ctl_by = "gpio"; //"gpio" "pmu" - //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>; - //power-pmu = "act_ldo" - reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rmii_pins>; - clock_in_out = "output"; - tx_delay = <0x28>; - rx_delay = <0x10>; - status = "okay"; //if want to use gmac, please set "okay" -}; - -&pinctrl { - //used for init some gpio - init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH - &gpio0 GPIO_B1 GPIO_ACTIVE_LOW>; - - gpio0_gpio { - gpio0_c7: gpio0-c7 { - rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>; - }; - gpio0_a3: gpio0-a3 { - rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>; - }; - gpio0_c2: gpio0-c2 { - rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - //to add - }; - -}; - -&nandc0 { - status = "disabled"; // used nand set "disabled" ,used emmc set "okay" -}; - -&nandc0reg { - status = "okay"; // used nand set "disabled" ,used emmc set "okay" -}; - -&emmc { - clock-frequency = <150000000>; - clock-freq-min-max = <400000 150000000>; - - supports-highspeed; - supports-emmc; - bootpart-no-access; - - //supports-sd; - supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board. - caps2-mmc-hs200; - - ignore-pm-notify; - keep-power-in-suspend; - - //poll-hw-reset - status = "okay"; -}; - -&sdmmc { - clock-frequency = <50000000>; - clock-freq-min-max = <400000 50000000>; - supports-highspeed; - supports-sd; - broken-cd; - card-detect-delay = <200>; - - ignore-pm-notify; - keep-power-in-suspend; - - vmmc-supply = <&ldo1_reg>; - status = "okay"; -}; - -&edp{ - status = "disabled"; -}; - -&sdio { - clock-frequency = <50000000>; - clock-freq-min-max = <200000 50000000>; - supports-highspeed; - supports-sdio; - ignore-pm-notify; - keep-power-in-suspend; - //cap-sdio-irq; - status = "okay"; -}; - -&spi0 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@00 { - compatible = "rockchip,spi_test_bus0_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - - }; - - spi_test@01 { - compatible = "rockchip,spi_test_bus0_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - spi-cpha; - spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&spi1 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@10 { - compatible = "rockchip,spi_test_bus1_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&spi2 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@20 { - compatible = "rockchip,spi_test_bus2_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - - spi_test@21 { - compatible = "rockchip,spi_test_bus2_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&uart_dbg { - status = "okay"; -}; - -&uart_bt { - status = "okay"; - dma-names = "!tx", "!rx"; - pinctrl-0 = <&uart0_xfer &uart0_cts>; -}; - -&tsadc { - tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ - //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ - status = "okay"; -}; - -&i2c0 { - status = "okay"; - syr827: syr827@40 { - compatible = "silergy,syr82x"; - reg = <0x40>; - status = "okay"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr827_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x1>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-disabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - syr828: syr828@41 { - compatible = "silergy,syr82x"; - reg = <0x41>; - status = "disabled"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr828_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x1>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - - xz3216: xz3216@60 { - compatible = "xz3216"; - reg = <0x60>; - status = "okay"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - xz3216_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "xz_dcdc1"; - regulator-name = "vdd_arm"; - regulator-min-microvolt = <902500>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x1>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <1000000>; - }; - }; - }; - }; - - act8846: act8846@5a { - reg = <0x5a>; - status = "diasbled"; - }; - - CW2015@62 { - compatible = "cw201x"; - reg = <0x62>; - dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>; - bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>; - chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>; - bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32 - 0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52 - 0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB - 0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>; - is_dc_charge = <1>; - is_usb_charge = <0>; - status = "diasbled"; - }; - rtc@51 { - compatible = "rtc,hym8563"; - reg = <0x51>; - /*box not used rtc irq,and this pin used as rk1000 spk ctrl*/ - #irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>; - }; - -}; - -&i2c1 { - status = "okay"; - rk1000_control@40 { - compatible = "rockchip,rk1000_control"; - reg = <0x40>; - gpio-reset = <&gpio0 GPIO_A1 GPIO_ACTIVE_LOW>; - #clocks = <&clk_i2s>, <&i2s_out>, <&clk_gates12 7>; - #clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk"; - #pinctrl-names = "default"; - #pinctrl-0 = <&i2s_mclk>; - status = "okay"; - }; - rk1000_tve@42 { - compatible = "rockchip,rk1000_tve"; - reg = <0x42>; - rockchip,source = <0>; //0: LCDC0; 1: LCDC1 - rockchip,prop = ;// - status = "okay"; - }; - rk1000_codec: rk1000_codec@60 { - compatible = "rockchip,rk1000_codec"; - reg = <0x60>; - spk_ctl_io = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>; - boot_depop = <1>; - pa_enable_time = <5000>; - status = "okay"; - }; - mpu6050:mpu@68{ - compatible = "mpu6050"; - reg = <0x68>; - mpu-int_config = <0x10>; - mpu-level_shifter = <0>; - mpu-orientation = <0 1 0 1 0 0 0 0 1>; - orientation-x= <0>; - orientation-y= <1>; - orientation-z= <1>; - irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>; - mpu-debug = <0>; - status = "disabled"; - }; - ak8963:compass@0d{ - compatible = "mpu_ak8963"; - reg = <0x0d>; - compass-bus = <0>; - compass-adapt_num = <0>; - compass-orientation = <1 0 0 0 1 0 0 0 1>; - orientation-x= <0>; - orientation-y= <0>; - orientation-z= <1>; - compass-debug = <1>; - status = "disabled"; - }; - rt3261: rt3261@1c { - compatible = "rt3261"; - reg = <0x1c>; - spk-num= <2>; - modem-input-mode = <1>; - lout-to-modem_mode = <1>; - spk-amplify = <2>; - status = "disabled"; - }; -}; - -&i2c2 { - status = "disabled"; - rt5631: rt5631@1a { - compatible = "rt5631"; - reg = <0x1a>; - }; - ts@01 { - compatible = "ct,vtl_ts"; - reg = <0x01>; - screen_max_x = <1536>; - screen_max_y = <2048>; - xy_swap = <1>; - x_reverse = <0>; - y_reverse = <0>; - x_mul = <2>; - y_mul = <2>; - bin_ver = <0>; - irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>; - rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>; - }; -}; - -&i2c3 { - status = "disabled"; -}; - -&i2c4 { - status = "disabled"; -}; - -&i2c5 { - status = "disabled"; -}; - -&CPU_SLEEP_0 { - arm,psci-suspend-param = <0x1010000>; -}; - -&fb { - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <1>; - rockchip,disp-policy = ; -}; - -&disp_timings { - native-mode = <&timing1>; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - - -&lvds { - status = "okay"; - //pinctrl-names = "lcdc", "sleep"; - //pinctrl-0 = <&lcdc_lcdc>; - //pinctrl-1 = <&lcdc_gpio>; -}; - -&lcdc { - status = "okay"; - rockchip,mirror = ; - rockchip,cabc_mode = <0>; - rockchip,fb-win-map = ; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&lcdc_lcdc>; - pinctrl-1 = <&lcdc_gpio>; - - power_ctr: power_ctr { - rockchip,debug = <0>; - /*lcd_en:lcd_en { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - - lcd_cs:lcd_cs { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - - lcd_rst:lcd_rst { - rockchip,power_type = ; - gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <5>; - };*/ - }; -}; - - - - -&hdmi { - status = "okay"; -}; - -&adc { - status = "disabled"; - - rockchip_headset { - compatible = "rockchip_headset"; - headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&gpio0_c7>;//gpio0_c7 - io-channels = <&adc 2>; - /* - hook_gpio = ; - hook_down_type = ; //interrupt hook key down status - */ - }; - - key { - compatible = "rockchip,key"; - io-channels = <&adc 1>; - - vol-up-key { - linux,code = <115>; - label = "volume up"; - rockchip,adc_value = <1>; - }; - - vol-down-key { - linux,code = <114>; - label = "volume down"; - rockchip,adc_value = <170>; - }; - - power-key { - gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "power"; - gpio-key,wakeup; - }; - - menu-key { - linux,code = <59>; - label = "menu"; - rockchip,adc_value = <355>; - }; - - home-key { - linux,code = <102>; - label = "home"; - rockchip,adc_value = <746>; - }; - - back-key { - linux,code = <158>; - label = "back"; - rockchip,adc_value = <560>; - }; - - camera-key { - linux,code = <212>; - label = "camera"; - rockchip,adc_value = <450>; - }; - }; -}; - -&pwm0 { - status = "disabled"; -}; - -&pwm1 { - status = "okay"; -}; - -&clk_core_b_dvfs_table { - operating-points = < - /* KHz uV */ - //216000 950000 - 312000 950000 - 408000 950000 - 600000 975000 - 696000 975000 - 816000 1000000 - 1008000 1100000 - 1200000 1175000 - 1296000 1250000 - 1416000 1300000 - //1488000 1325000 - 1512000 1350000 - >; - status = "okay"; -}; - -&clk_core_l_dvfs_table { - operating-points = < - /* KHz uV */ - //216000 950000 - 312000 950000 - 408000 950000 - 600000 950000 - 696000 975000 - 816000 1050000 - 1008000 1125000 - 1200000 1250000 - //1300000 1300000 - >; - status = "okay"; -}; - -&clk_gpu_dvfs_table { - operating-points = < - /* KHz uV */ - //200000 1200000 - 300000 1200000 - 400000 1200000 - 600000 1200000 - >; -}; - -&clk_ddr_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 1050000 - 300000 1050000 - 400000 1100000 - 533000 1150000 - 800000 1200000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 800000 - /*SYS_STATUS_SUSPEND 200000 - SYS_STATUS_VIDEO_1080P 240000 - SYS_STATUS_VIDEO_4K 400000 - SYS_STATUS_PERFORMANCE 528000 - SYS_STATUS_DUALVIEW 400000 - SYS_STATUS_BOOST 324000 - SYS_STATUS_ISP 400000*/ - >; - auto-freq-table = < - 240000 - 324000 - 396000 - 528000 - >; - auto-freq=<0>; - status="okay"; -}; - -&dwc_control_usb { - host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>; - otg_drv_gpio = <&gpio0 GPIO_A5 GPIO_ACTIVE_LOW>; - - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; - }; - -&usb0 { - /*0 - Normal, 1 - Force Host, 2 - Force Device*/ - rockchip,usb-mode = <0>; -}; - -/include/ "../../../arm/boot/dts/act8846.dtsi" -&act8846 { - gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>; - act8846,system-power-controller; - - regulators { - - dcdc1_reg: regulator@0{ - regulator-name= "act_dcdc1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - regulator-boot-on; - }; - - dcdc2_reg: regulator@1 { - regulator-name= "vccio"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - dcdc3_reg: regulator@2 { - regulator-name= "vdd_logic"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1000000>; - }; - - }; - - dcdc4_reg: regulator@3 { - regulator-name= "act_dcdc4"; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <2000000>; - }; - }; - - ldo1_reg: regulator@4 { - regulator-name= "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo2_reg: regulator@5 { - regulator-name= "act_ldo2"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - }; - - ldo3_reg: regulator@6 { - regulator-name= "act_ldo3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo4_reg:regulator@7 { - regulator-name= "act_ldo4"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo5_reg: regulator@8 { - regulator-name= "act_ldo5"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo6_reg: regulator@9 { - regulator-name= "act_ldo6"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - }; - - }; - - ldo7_reg: regulator@10 { - regulator-name= "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - }; - - }; - - ldo8_reg: regulator@11 { - regulator-name= "act_ldo8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - }; - }; -}; - -&ion_cma { - reg = <0x00000000 0x00000000>; /* 0MB */ -}; - -/* -&dwc_control_usb { - usb_uart { - status = "disabled"; - }; -}; - -&rk3288_cif_sensor{ - status = "okay"; -}; -*/ - -&remotectl { - handle_cpu_id = <1>; - status = "okay"; - ir_key1{ - rockchip,usercode = <0x4040>; - rockchip,key_table = - <0xf2 KEY_REPLY>, - <0xba KEY_BACK>, - <0xf4 KEY_UP>, - <0xf1 KEY_DOWN>, - <0xef KEY_LEFT>, - <0xee KEY_RIGHT>, - <0xbd KEY_HOME>, - <0xea KEY_VOLUMEUP>, - <0xe3 KEY_VOLUMEDOWN>, - <0xe2 KEY_SEARCH>, - <0xb2 KEY_POWER>, - <0xbc KEY_MUTE>, - <0xec KEY_MENU>, - <0xbf 0x190>, - <0xe0 0x191>, - <0xe1 0x192>, - <0xe9 183>, - <0xe6 248>, - <0xe8 185>, - <0xe7 186>, - <0xf0 388>, - <0xbe 0x175>; - }; - ir_key2{ - rockchip,usercode = <0xff00>; - rockchip,key_table = - <0xf9 KEY_HOME>, - <0xbf KEY_BACK>, - <0xfb KEY_MENU>, - <0xaa KEY_REPLY>, - <0xb9 KEY_UP>, - <0xe9 KEY_DOWN>, - <0xb8 KEY_LEFT>, - <0xea KEY_RIGHT>, - <0xeb KEY_VOLUMEDOWN>, - <0xef KEY_VOLUMEUP>, - <0xf7 KEY_MUTE>, - <0xe7 KEY_POWER>, - <0xfc KEY_POWER>, - <0xa9 KEY_VOLUMEDOWN>, - <0xa8 KEY_VOLUMEDOWN>, - <0xe0 KEY_VOLUMEDOWN>, - <0xa5 KEY_VOLUMEDOWN>, - <0xab 183>, - <0xb7 388>, - <0xf8 184>, - <0xaf 185>, - <0xed KEY_VOLUMEDOWN>, - <0xee 186>, - <0xb3 KEY_VOLUMEDOWN>, - <0xf1 KEY_VOLUMEDOWN>, - <0xf2 KEY_VOLUMEDOWN>, - <0xf3 KEY_SEARCH>, - <0xb4 KEY_VOLUMEDOWN>, - <0xbe KEY_SEARCH>; - }; - ir_key3{ - rockchip,usercode = <0x1dcc>; - rockchip,key_table = - <0xee KEY_REPLY>, - <0xf0 KEY_BACK>, - <0xf8 KEY_UP>, - <0xbb KEY_DOWN>, - <0xef KEY_LEFT>, - <0xed KEY_RIGHT>, - <0xfc KEY_HOME>, - <0xf1 KEY_VOLUMEUP>, - <0xfd KEY_VOLUMEDOWN>, - <0xb7 KEY_SEARCH>, - <0xff KEY_POWER>, - <0xf3 KEY_MUTE>, - <0xbf KEY_MENU>, - <0xf9 0x191>, - <0xf5 0x192>, - <0xb3 388>, - <0xbe KEY_1>, - <0xba KEY_2>, - <0xb2 KEY_3>, - <0xbd KEY_4>, - <0xf9 KEY_5>, - <0xb1 KEY_6>, - <0xfc KEY_7>, - <0xf8 KEY_8>, - <0xb0 KEY_9>, - <0xb6 KEY_0>, - <0xb5 KEY_BACKSPACE>; - }; -}; diff --git a/arch/arm64/boot/dts/rk3368-box-r88_808.dts b/arch/arm64/boot/dts/rk3368-box-r88_808.dts deleted file mode 100644 index 4d786230923e..000000000000 --- a/arch/arm64/boot/dts/rk3368-box-r88_808.dts +++ /dev/null @@ -1,1138 +0,0 @@ -/dts-v1/; - -#include -#include -#include -#include "rk3368.dtsi" -#include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi" -//#include "../../../arm/boot/dts/lcd-b101ew05.dtsi" -#include "../../../arm/boot/dts/lcd-box.dtsi" - - -/ { - chosen { - bootargs = "earlyprintk=uart8250-32bit,0xff690000"; - }; - - wireless-wlan { - compatible = "wlan-platdata"; - rockchip,grf = <&grf>; - - /* wifi_chip_type - wifi chip define - * ap6210, ap6330, ap6335 - * rtl8188eu, rtl8723bs, rtl8723bu - * esp8089 - */ - wifi_chip_type = "rtl8189es"; - - sdio_vref = <1800>; //1800mv or 3300mv - - //keep_wifi_power_on; - - //power_ctrl_by_pmu; - power_pmu_regulator = "rk808_ldo3_reg"; - power_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - //vref_ctrl_enable; - //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>; - vref_pmu_regulator = "rk808_ldo3_reg"; - vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>; - WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>; - //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - - status = "okay"; - }; - - wireless-bluetooth { - compatible = "bluetooth-platdata"; - - //wifi-bt-power-toggle; - - uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default","rts_gpio"; - pinctrl-0 = <&uart0_rts>; - pinctrl-1 = <&uart0_rts_gpio>; - - BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>; - BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>; - BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>; - BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - hallsensor { - compatible = "hall_och165t"; - type = ; - irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000>; - brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240 - 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220 - 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 - 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 - 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 - 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 - 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 - 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 - 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 - 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 - 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 - 9 8 7 6 5 4 3 2 1 0>; - default-brightness-level = <200>; - enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>; - status = "disabled"; - }; - - pwm_regulator { - compatible = "rockchip_pwm_regulator"; - pwms = <&pwm1 0 2000>; - rockchip,pwm_id= <1>; - rockchip,pwm_voltage_map= <900000 925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000>; - rockchip,pwm_voltage= <1000000>; - rockchip,pwm_min_voltage= <900000>; - rockchip,pwm_max_voltage= <1375000>; - rockchip,pwm_suspend_voltage= <950000>; - rockchip,pwm_coefficient= <555>; - regulators { - #address-cells = <1>; - #size-cells = <0>; - pwm_reg0: regulator@0 { - regulator-compatible = "pwm_dcdc1"; - regulator-name= "vdd_logic"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1375000>; - regulator-always-on; - regulator-boot-on; - }; - }; - test-power{ - status = "okay"; - }; - }; - - codec_hdmi_i2s: codec-hdmi-i2s { - compatible = "hdmi-i2s"; - }; - - codec_hdmi_spdif: codec-hdmi-spdif { - compatible = "hdmi-spdif"; - }; - - rockchip-hdmi-i2s { - status = "disabled"; - compatible = "rockchip-hdmi-i2s"; - dais { - dai0 { - audio-codec = <&codec_hdmi_i2s>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - - - rockchip-spdif-card { - compatible = "rockchip-spdif-card"; - dais { - dai0 { - audio-codec = <&codec_hdmi_spdif>; - audio-controller = <&spdif>; - }; - }; - }; - rockchip-rk1000 { - compatible = "rockchip-rk1000"; - dais { - dai0 { - audio-codec = <&rk1000_codec>; - audio-controller = <&i2s0>; - format = "i2s"; - }; - }; - }; - rockchip-rt5631 { - compatible = "rockchip-rt5631"; - dais { - dai0 { - audio-codec = <&rt5631>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - rockchip-rt3224 { - compatible = "rockchip-rt3261"; - dais { - dai0 { - audio-codec = <&rt3261>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - dai1 { - audio-codec = <&rt3261>; - audio-controller = <&i2s0>; - format = "dsp_a"; - //continuous-clock; - bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - power-led { - compatible = "gpio-leds"; - green { - gpios = <&gpio3 GPIO_D5 GPIO_ACTIVE_LOW>; - default-state = "on"; - }; - }; - io-domains { - compatible = "rockchip,rk3368-io-voltage-domain"; - rockchip,grf = <&grf>; - rockchip,pmugrf = <&pmugrf>; - - /*GRF_IO_VSEL*/ - dvp-supply = <&rk808_dcdc4_reg>; /*DVPIO_VDD*/ - flash0-supply = <&rk808_ldo1_reg>; /*FLASH0_VDD*/ - wifi-supply = <&rk808_dcdc4_reg>; /*APIO2_VDD*/ - audio-supply = <&rk808_dcdc4_reg>; /*APIO3_VDD*/ - sdcard-supply = <&rk808_ldo5_reg>; /*SDMMC0_VDD*/ - gpio30-supply = <&rk808_dcdc4_reg>; /*APIO1_VDD*/ - gpio1830-supply = <&rk808_dcdc4_reg>;/*ADIO4_VDD*/ - - /*PMU_GRF_IO_VSEL*/ - pmu-supply = <&rk808_ldo3_reg>; /*PMUIO_VDD*/ - vop-supply = <&rk808_ldo8_reg>; /*LCDC_VDD*/ - }; -}; - -&gmac_clkin { - clock-frequency = <50000000>; -}; - -&gmac { - //power_ctl_by = "gpio"; //"gpio" "pmu" - //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>; - //power-pmu = "act_ldo" - reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>; - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rmii_pins>; - clock_in_out = "output"; - tx_delay = <0x28>; - rx_delay = <0x10>; - status = "okay"; //if want to use gmac, please set "okay" -}; - -&pinctrl { - //used for init some gpio - init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH - &gpio0 GPIO_B1 GPIO_ACTIVE_LOW>; - - gpio0_gpio { - gpio0_c7: gpio0-c7 { - rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>; - }; - gpio0_a3: gpio0-a3 { - rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>; - }; - gpio0_c2: gpio0-c2 { - rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - gpio0_a5: gpio0-a5{ - rockchip,pins = <0 GPIO_A5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - //to add - }; - -}; - -&nandc0 { - status = "disabled"; // used nand set "disabled" ,used emmc set "okay" -}; - -&nandc0reg { - status = "okay"; // used nand set "disabled" ,used emmc set "okay" -}; - -&emmc { - clock-frequency = <150000000>; - clock-freq-min-max = <400000 150000000>; - - supports-highspeed; - supports-emmc; - bootpart-no-access; - - //supports-sd; - supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board. - caps2-mmc-hs200; - - ignore-pm-notify; - keep-power-in-suspend; - - //poll-hw-reset - status = "okay"; -}; - -&sdmmc { - clock-frequency = <50000000>; - clock-freq-min-max = <400000 50000000>; - supports-highspeed; - supports-sd; - broken-cd; - card-detect-delay = <200>; - - ignore-pm-notify; - keep-power-in-suspend; - - vmmc-supply = <&rk808_ldo5_reg>; - status = "okay"; -}; - -&edp{ - status = "disabled"; -}; - -&sdio { - clock-frequency = <50000000>; - clock-freq-min-max = <200000 50000000>; - supports-highspeed; - supports-sdio; - ignore-pm-notify; - keep-power-in-suspend; - //cap-sdio-irq; - status = "okay"; -}; - -&spi0 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@00 { - compatible = "rockchip,spi_test_bus0_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - - }; - - spi_test@01 { - compatible = "rockchip,spi_test_bus0_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - spi-cpha; - spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&spi1 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@10 { - compatible = "rockchip,spi_test_bus1_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&spi2 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@20 { - compatible = "rockchip,spi_test_bus2_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - - spi_test@21 { - compatible = "rockchip,spi_test_bus2_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&uart_dbg { - status = "okay"; -}; - -&uart_bt { - status = "okay"; - dma-names = "!tx", "!rx"; - pinctrl-0 = <&uart0_xfer &uart0_cts>; -}; - -&tsadc { - tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ - //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ - status = "okay"; -}; - -&i2c0 { - status = "okay"; - syr827: syr827@40 { - compatible = "silergy,syr82x"; - reg = <0x40>; - status = "okay"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr827_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x1>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-disabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - syr828: syr828@41 { - compatible = "silergy,syr82x"; - reg = <0x41>; - status = "disabled"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr828_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x1>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - - act8846: act8846@5a { - reg = <0x5a>; - status = "diasbled"; - }; - - rk808: rk808@1b { - reg = <0x1b>; - status = "okay"; - compatible = "rockchip,rk808"; - }; - - CW2015@62 { - compatible = "cw201x"; - reg = <0x62>; - dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>; - bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>; - chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>; - bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32 - 0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52 - 0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB - 0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>; - is_dc_charge = <1>; - is_usb_charge = <0>; - status = "diasbled"; - }; - rtc@51 { - compatible = "rtc,hym8563"; - reg = <0x51>; - /*box not used rtc irq,and this pin used as rk1000 spk ctrl*/ - #irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>; - }; - -}; - -&i2c1 { - status = "okay"; - rk1000_control@40 { - compatible = "rockchip,rk1000_control"; - reg = <0x40>; - gpio-reset = <&gpio0 GPIO_A1 GPIO_ACTIVE_LOW>; - #clocks = <&clk_i2s>, <&i2s_out>, <&clk_gates12 7>; - #clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk"; - #pinctrl-names = "default"; - #pinctrl-0 = <&i2s_mclk>; - status = "okay"; - }; - rk1000_tve@42 { - compatible = "rockchip,rk1000_tve"; - reg = <0x42>; - rockchip,source = <0>; //0: LCDC0; 1: LCDC1 - rockchip,prop = ;// - status = "okay"; - }; - rk1000_codec: rk1000_codec@60 { - compatible = "rockchip,rk1000_codec"; - reg = <0x60>; - spk_ctl_io = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>; - boot_depop = <1>; - pa_enable_time = <5000>; - status = "okay"; - }; - mpu6050:mpu@68{ - compatible = "mpu6050"; - reg = <0x68>; - mpu-int_config = <0x10>; - mpu-level_shifter = <0>; - mpu-orientation = <0 1 0 1 0 0 0 0 1>; - orientation-x= <0>; - orientation-y= <1>; - orientation-z= <1>; - irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>; - mpu-debug = <0>; - status = "disabled"; - }; - ak8963:compass@0d{ - compatible = "mpu_ak8963"; - reg = <0x0d>; - compass-bus = <0>; - compass-adapt_num = <0>; - compass-orientation = <1 0 0 0 1 0 0 0 1>; - orientation-x= <0>; - orientation-y= <0>; - orientation-z= <1>; - compass-debug = <1>; - status = "disabled"; - }; - rt3261: rt3261@1c { - compatible = "rt3261"; - reg = <0x1c>; - spk-num= <2>; - modem-input-mode = <1>; - lout-to-modem_mode = <1>; - spk-amplify = <2>; - status = "disabled"; - }; -}; - -&i2c2 { - status = "disabled"; - rt5631: rt5631@1a { - compatible = "rt5631"; - reg = <0x1a>; - }; - ts@01 { - compatible = "ct,vtl_ts"; - reg = <0x01>; - screen_max_x = <1536>; - screen_max_y = <2048>; - xy_swap = <1>; - x_reverse = <0>; - y_reverse = <0>; - x_mul = <2>; - y_mul = <2>; - bin_ver = <0>; - irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>; - rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>; - }; -}; - -&i2c3 { - status = "disabled"; -}; - -&i2c4 { - status = "disabled"; -}; - -&i2c5 { - status = "disabled"; -}; - -&CPU_SLEEP_0 { - arm,psci-suspend-param = <0x1010000>; -}; - -&fb { - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <1>; - rockchip,disp-policy = ; -}; - -&disp_timings { - native-mode = <&timing1>; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - - -&lvds { - status = "okay"; - //pinctrl-names = "lcdc", "sleep"; - //pinctrl-0 = <&lcdc_lcdc>; - //pinctrl-1 = <&lcdc_gpio>; -}; - -&lcdc { - status = "okay"; - rockchip,mirror = ; - rockchip,cabc_mode = <0>; - rockchip,fb-win-map = ; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&lcdc_lcdc>; - pinctrl-1 = <&lcdc_gpio>; - - power_ctr: power_ctr { - rockchip,debug = <0>; - /*lcd_en:lcd_en { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - - lcd_cs:lcd_cs { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - - lcd_rst:lcd_rst { - rockchip,power_type = ; - gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <5>; - };*/ - }; -}; - - - - -&hdmi { - status = "okay"; -}; - -&adc { - status = "disabled"; - - rockchip_headset { - compatible = "rockchip_headset"; - headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&gpio0_c7>;//gpio0_c7 - io-channels = <&adc 2>; - /* - hook_gpio = ; - hook_down_type = ; //interrupt hook key down status - */ - }; - - key { - compatible = "rockchip,key"; - io-channels = <&adc 1>; - - vol-up-key { - linux,code = <115>; - label = "volume up"; - rockchip,adc_value = <1>; - }; - - vol-down-key { - linux,code = <114>; - label = "volume down"; - rockchip,adc_value = <170>; - }; - - power-key { - gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "power"; - gpio-key,wakeup; - }; - - menu-key { - linux,code = <59>; - label = "menu"; - rockchip,adc_value = <355>; - }; - - home-key { - linux,code = <102>; - label = "home"; - rockchip,adc_value = <746>; - }; - - back-key { - linux,code = <158>; - label = "back"; - rockchip,adc_value = <560>; - }; - - camera-key { - linux,code = <212>; - label = "camera"; - rockchip,adc_value = <450>; - }; - }; -}; - -&pwm0 { - status = "disabled"; -}; - -&pwm1 { - status = "okay"; -}; - -&clk_core_b_dvfs_table { - operating-points = < - /* KHz uV */ - //216000 950000 - 312000 950000 - 408000 950000 - 600000 975000 - 696000 975000 - 816000 1000000 - 1008000 1100000 - 1200000 1175000 - 1296000 1250000 - 1416000 1300000 - //1488000 1325000 - 1512000 1350000 - >; - status = "okay"; -}; - -&clk_core_l_dvfs_table { - operating-points = < - /* KHz uV */ - //216000 950000 - 312000 950000 - 408000 950000 - 600000 950000 - 696000 975000 - 816000 1050000 - 1008000 1125000 - 1200000 1250000 - //1300000 1300000 - >; - status = "okay"; -}; - -&clk_gpu_dvfs_table { - operating-points = < - /* KHz uV */ - //200000 1200000 - 300000 1200000 - 400000 1200000 - 600000 1200000 - >; -}; - -&clk_ddr_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 1050000 - 300000 1050000 - 400000 1100000 - 533000 1150000 - 800000 1200000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 800000 - /*SYS_STATUS_SUSPEND 200000 - SYS_STATUS_VIDEO_1080P 240000 - SYS_STATUS_VIDEO_4K 400000 - SYS_STATUS_PERFORMANCE 528000 - SYS_STATUS_DUALVIEW 400000 - SYS_STATUS_BOOST 324000 - SYS_STATUS_ISP 400000*/ - >; - auto-freq-table = < - 240000 - 324000 - 396000 - 528000 - >; - auto-freq=<0>; - status="okay"; -}; - -&dwc_control_usb { - host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>; - /*otg_drv_gpio = <&gpio0 GPIO_A5 GPIO_ACTIVE_LOW>;*/ - - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; - }; - -&usb0 { - /*0 - Normal, 1 - Force Host, 2 - Force Device*/ - rockchip,usb-mode = <1>; -}; - -#include "../../../arm/boot/dts/rk808.dtsi" -&rk808 { - gpios =<&gpio0 GPIO_A5 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>; - rk808,system-power-controller; - - regulators { - - rk808_dcdc1_reg: regulator@0{ - regulator-name= "vdd_arm";/*vcc arm*/ - regulator-min-microvolt = <700000>;/*<725000>;*/ - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-disabled; - regulator-state-uv =<900000>; - }; - }; - - rk808_dcdc2_reg: regulator@1 { - regulator-name= "vdd_logic";/*vcc gpu*/ - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <1200000>; - }; - }; - - rk808_dcdc3_reg: regulator@2 { - regulator-name= "vcc_ddr"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <1200000>; - }; - }; - - rk808_dcdc4_reg: regulator@3 { - regulator-name= "vccio"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <3000000>; - }; - }; - - rk808_ldo1_reg: regulator@4 { - regulator-name= "vcc_flash"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - - rk808_ldo2_reg: regulator@5 { - regulator-name= "vcca_33"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <3300000>; - }; - }; - - rk808_ldo3_reg: regulator@6 { - regulator-name= "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1000000>; - }; - }; - - rk808_ldo4_reg:regulator@7 { - regulator-name= "vcca_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <1800000>; - }; - }; - - rk808_ldo5_reg: regulator@8 { - regulator-name= "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - rk808_ldo6_reg: regulator@9 { - regulator-name= "vdd10_lcd"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <1100000>; - }; - }; - - rk808_ldo7_reg: regulator@10 { - regulator-name= "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - rk808_ldo8_reg: regulator@11 { - regulator-name= "vccio18_lcd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo9_reg: regulator@12 { - regulator-name= "vcc_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - rk818_ldo10_reg: regulator@13 { - regulator-name= "vcc_lan"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <3300000>; - }; - }; - - }; -}; - -&ion_cma { - reg = <0x00000000 0x00000000>; /* 0MB */ -}; - -/* -&dwc_control_usb { - usb_uart { - status = "disabled"; - }; -}; - -&rk3288_cif_sensor{ - status = "okay"; -}; -*/ - -&remotectl { - handle_cpu_id = <1>; - status = "okay"; - ir_key1{ - rockchip,usercode = <0x4040>; - rockchip,key_table = - <0xf2 KEY_REPLY>, - <0xba KEY_BACK>, - <0xf4 KEY_UP>, - <0xf1 KEY_DOWN>, - <0xef KEY_LEFT>, - <0xee KEY_RIGHT>, - <0xbd KEY_HOME>, - <0xea KEY_VOLUMEUP>, - <0xe3 KEY_VOLUMEDOWN>, - <0xe2 KEY_SEARCH>, - <0xb2 KEY_POWER>, - <0xbc KEY_MUTE>, - <0xec KEY_MENU>, - <0xbf 0x190>, - <0xe0 0x191>, - <0xe1 0x192>, - <0xe9 183>, - <0xe6 248>, - <0xe8 185>, - <0xe7 186>, - <0xf0 388>, - <0xbe 0x175>; - }; - ir_key2{ - rockchip,usercode = <0xff00>; - rockchip,key_table = - <0xf9 KEY_HOME>, - <0xbf KEY_BACK>, - <0xfb KEY_MENU>, - <0xaa KEY_REPLY>, - <0xb9 KEY_UP>, - <0xe9 KEY_DOWN>, - <0xb8 KEY_LEFT>, - <0xea KEY_RIGHT>, - <0xeb KEY_VOLUMEDOWN>, - <0xef KEY_VOLUMEUP>, - <0xf7 KEY_MUTE>, - <0xe7 KEY_POWER>, - <0xfc KEY_POWER>, - <0xa9 KEY_VOLUMEDOWN>, - <0xa8 KEY_VOLUMEDOWN>, - <0xe0 KEY_VOLUMEDOWN>, - <0xa5 KEY_VOLUMEDOWN>, - <0xab 183>, - <0xb7 388>, - <0xf8 184>, - <0xaf 185>, - <0xed KEY_VOLUMEDOWN>, - <0xee 186>, - <0xb3 KEY_VOLUMEDOWN>, - <0xf1 KEY_VOLUMEDOWN>, - <0xf2 KEY_VOLUMEDOWN>, - <0xf3 KEY_SEARCH>, - <0xb4 KEY_VOLUMEDOWN>, - <0xbe KEY_SEARCH>; - }; - ir_key3{ - rockchip,usercode = <0x1dcc>; - rockchip,key_table = - <0xee KEY_REPLY>, - <0xf0 KEY_BACK>, - <0xf8 KEY_UP>, - <0xbb KEY_DOWN>, - <0xef KEY_LEFT>, - <0xed KEY_RIGHT>, - <0xfc KEY_HOME>, - <0xf1 KEY_VOLUMEUP>, - <0xfd KEY_VOLUMEDOWN>, - <0xb7 KEY_SEARCH>, - <0xff KEY_POWER>, - <0xf3 KEY_MUTE>, - <0xbf KEY_MENU>, - <0xf9 0x191>, - <0xf5 0x192>, - <0xb3 388>, - <0xbe KEY_1>, - <0xba KEY_2>, - <0xb2 KEY_3>, - <0xbd KEY_4>, - <0xf9 KEY_5>, - <0xb1 KEY_6>, - <0xfc KEY_7>, - <0xf8 KEY_8>, - <0xb0 KEY_9>, - <0xb6 KEY_0>, - <0xb5 KEY_BACKSPACE>; - }; -}; diff --git a/arch/arm64/boot/dts/rk3368-box.dts b/arch/arm64/boot/dts/rk3368-box.dts deleted file mode 100644 index 1a0ff5ad465d..000000000000 --- a/arch/arm64/boot/dts/rk3368-box.dts +++ /dev/null @@ -1,1061 +0,0 @@ -/dts-v1/; - -#include -#include -#include -#include "rk3368.dtsi" -#include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi" -//#include "../../../arm/boot/dts/lcd-b101ew05.dtsi" -#include "../../../arm/boot/dts/lcd-box.dtsi" - - -/ { - chosen { - bootargs = "earlyprintk=uart8250-32bit,0xff690000"; - }; - - wireless-wlan { - compatible = "wlan-platdata"; - rockchip,grf = <&grf>; - - /* wifi_chip_type - wifi chip define - * ap6210, ap6330, ap6335 - * rtl8188eu, rtl8723bs, rtl8723bu - * esp8089 - */ - wifi_chip_type = "ap6335"; - - sdio_vref = <1800>; //1800mv or 3300mv - - //keep_wifi_power_on; - - //power_ctrl_by_pmu; - power_pmu_regulator = "act_ldo3"; - power_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - //vref_ctrl_enable; - //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>; - vref_pmu_regulator = "act_ldo3"; - vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>; - WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>; - //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - - status = "okay"; - }; - - wireless-bluetooth { - compatible = "bluetooth-platdata"; - - //wifi-bt-power-toggle; - - uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default","rts_gpio"; - pinctrl-0 = <&uart0_rts>; - pinctrl-1 = <&uart0_rts_gpio>; - - BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>; - BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>; - BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>; - BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - hallsensor { - compatible = "hall_och165t"; - type = ; - irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000>; - brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240 - 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220 - 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 - 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 - 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 - 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 - 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 - 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 - 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 - 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 - 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 - 9 8 7 6 5 4 3 2 1 0>; - default-brightness-level = <200>; - enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>; - status = "disabled"; - }; - - pwm_regulator { - compatible = "rockchip_pwm_regulator"; - pwms = <&pwm1 0 2000>; - rockchip,pwm_id= <1>; - rockchip,pwm_voltage_map= <900000 925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000>; - rockchip,pwm_voltage= <1000000>; - rockchip,pwm_min_voltage= <900000>; - rockchip,pwm_max_voltage= <1375000>; - rockchip,pwm_suspend_voltage= <950000>; - rockchip,pwm_coefficient= <555>; - regulators { - #address-cells = <1>; - #size-cells = <0>; - pwm_reg0: regulator@0 { - regulator-compatible = "pwm_dcdc1"; - regulator-name= "vdd_logic"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1375000>; - regulator-always-on; - regulator-boot-on; - }; - }; - test-power{ - status = "okay"; - }; - }; - - codec_hdmi_i2s: codec-hdmi-i2s { - compatible = "hdmi-i2s"; - }; - - codec_hdmi_spdif: codec-hdmi-spdif { - compatible = "hdmi-spdif"; - }; - - rockchip-hdmi-i2s { - status = "disabled"; - compatible = "rockchip-hdmi-i2s"; - dais { - dai0 { - audio-codec = <&codec_hdmi_i2s>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - - - rockchip-spdif-card { - compatible = "rockchip-spdif-card"; - dais { - dai0 { - audio-codec = <&codec_hdmi_spdif>; - audio-controller = <&spdif>; - }; - }; - }; - rockchip-rk1000 { - compatible = "rockchip-rk1000"; - dais { - dai0 { - audio-codec = <&rk1000_codec>; - audio-controller = <&i2s0>; - format = "i2s"; - }; - }; - }; - rockchip-rt5631 { - compatible = "rockchip-rt5631"; - dais { - dai0 { - audio-codec = <&rt5631>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - rockchip-rt3224 { - compatible = "rockchip-rt3261"; - dais { - dai0 { - audio-codec = <&rt3261>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - dai1 { - audio-codec = <&rt3261>; - audio-controller = <&i2s0>; - format = "dsp_a"; - //continuous-clock; - bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - io-domains { - compatible = "rockchip,rk3368-io-voltage-domain"; - rockchip,grf = <&grf>; - rockchip,pmugrf = <&pmugrf>; - - /*GRF_IO_VSEL*/ - dvp-supply = <&ldo7_reg>; /*DVPIO_VDD*/ - flash0-supply = <&dcdc2_reg>; /*FLASH0_VDD*/ - wifi-supply = <&ldo7_reg>; /*APIO2_VDD*/ - audio-supply = <&dcdc2_reg>; /*APIO3_VDD*/ - sdcard-supply = <&ldo1_reg>; /*SDMMC0_VDD*/ - gpio30-supply = <&dcdc2_reg>; /*APIO1_VDD*/ - gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/ - - /*PMU_GRF_IO_VSEL*/ - pmu-supply = <&ldo5_reg>; /*PMUIO_VDD*/ - vop-supply = <&ldo5_reg>; /*LCDC_VDD*/ - }; -}; - -&gmac_clkin { - clock-frequency = <125000000>; -}; - -&gmac { - //power_ctl_by = "gpio"; //"gpio" "pmu" - //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>; - //power-pmu = "act_ldo" - reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - clock_in_out = "input"; - tx_delay = <0x28>; - rx_delay = <0x10>; - status = "okay"; //if want to use gmac, please set "okay" -}; - -&pinctrl { - //used for init some gpio - init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH - &gpio0 GPIO_B1 GPIO_ACTIVE_LOW>; - - gpio0_gpio { - gpio0_c7: gpio0-c7 { - rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>; - }; - gpio0_a3: gpio0-a3 { - rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>; - }; - gpio0_c2: gpio0-c2 { - rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - //to add - }; - -}; - -&nandc0 { - status = "disabled"; // used nand set "disabled" ,used emmc set "okay" -}; - -&nandc0reg { - status = "okay"; // used nand set "disabled" ,used emmc set "okay" -}; - -&emmc { - clock-frequency = <150000000>; - clock-freq-min-max = <400000 150000000>; - - supports-highspeed; - supports-emmc; - bootpart-no-access; - - //supports-sd; - supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board. - caps2-mmc-hs200; - - ignore-pm-notify; - keep-power-in-suspend; - - //poll-hw-reset - status = "okay"; -}; - -&sdmmc { - clock-frequency = <50000000>; - clock-freq-min-max = <400000 50000000>; - supports-highspeed; - supports-sd; - broken-cd; - card-detect-delay = <200>; - - ignore-pm-notify; - keep-power-in-suspend; - - vmmc-supply = <&ldo1_reg>; - status = "okay"; -}; - -&edp{ - status = "disabled"; -}; - -&sdio { - clock-frequency = <50000000>; - clock-freq-min-max = <200000 50000000>; - supports-highspeed; - supports-sdio; - ignore-pm-notify; - keep-power-in-suspend; - //cap-sdio-irq; - status = "okay"; -}; - -&spi0 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@00 { - compatible = "rockchip,spi_test_bus0_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - - }; - - spi_test@01 { - compatible = "rockchip,spi_test_bus0_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - spi-cpha; - spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&spi1 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@10 { - compatible = "rockchip,spi_test_bus1_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&spi2 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@20 { - compatible = "rockchip,spi_test_bus2_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - - spi_test@21 { - compatible = "rockchip,spi_test_bus2_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&uart_dbg { - status = "okay"; -}; - -&uart_bt { - status = "okay"; - dma-names = "!tx", "!rx"; - pinctrl-0 = <&uart0_xfer &uart0_cts>; -}; - -&tsadc { - tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ - //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ - status = "okay"; -}; - -&i2c0 { - status = "okay"; - syr827: syr827@40 { - compatible = "silergy,syr82x"; - reg = <0x40>; - status = "okay"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr827_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x1>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-disabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - syr828: syr828@41 { - compatible = "silergy,syr82x"; - reg = <0x41>; - status = "disabled"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr828_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x1>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - - xz3216: xz3216@60 { - compatible = "xz3216"; - reg = <0x60>; - status = "okay"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - xz3216_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "xz_dcdc1"; - regulator-name = "vdd_arm"; - regulator-min-microvolt = <902500>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x1>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <1000000>; - }; - }; - }; - }; - - act8846: act8846@5a { - reg = <0x5a>; - status = "diasbled"; - }; - - CW2015@62 { - compatible = "cw201x"; - reg = <0x62>; - dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>; - bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>; - chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>; - bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32 - 0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52 - 0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB - 0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>; - is_dc_charge = <1>; - is_usb_charge = <0>; - status = "diasbled"; - }; - rtc@51 { - compatible = "rtc,hym8563"; - reg = <0x51>; - /*box not used rtc irq,and this pin used as rk1000 spk ctrl*/ - #irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>; - }; - -}; - -&i2c1 { - status = "okay"; - rk1000_control@40 { - compatible = "rockchip,rk1000_control"; - reg = <0x40>; - gpio-reset = <&gpio0 GPIO_A1 GPIO_ACTIVE_LOW>; - #clocks = <&clk_i2s>, <&i2s_out>, <&clk_gates12 7>; - #clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk"; - #pinctrl-names = "default"; - #pinctrl-0 = <&i2s_mclk>; - status = "okay"; - }; - rk1000_tve@42 { - compatible = "rockchip,rk1000_tve"; - reg = <0x42>; - rockchip,source = <0>; //0: LCDC0; 1: LCDC1 - rockchip,prop = ;// - status = "okay"; - }; - rk1000_codec: rk1000_codec@60 { - compatible = "rockchip,rk1000_codec"; - reg = <0x60>; - spk_ctl_io = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>; - boot_depop = <1>; - pa_enable_time = <5000>; - status = "okay"; - }; - mpu6050:mpu@68{ - compatible = "mpu6050"; - reg = <0x68>; - mpu-int_config = <0x10>; - mpu-level_shifter = <0>; - mpu-orientation = <0 1 0 1 0 0 0 0 1>; - orientation-x= <0>; - orientation-y= <1>; - orientation-z= <1>; - irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>; - mpu-debug = <0>; - status = "disabled"; - }; - ak8963:compass@0d{ - compatible = "mpu_ak8963"; - reg = <0x0d>; - compass-bus = <0>; - compass-adapt_num = <0>; - compass-orientation = <1 0 0 0 1 0 0 0 1>; - orientation-x= <0>; - orientation-y= <0>; - orientation-z= <1>; - compass-debug = <1>; - status = "disabled"; - }; - rt3261: rt3261@1c { - compatible = "rt3261"; - reg = <0x1c>; - spk-num= <2>; - modem-input-mode = <1>; - lout-to-modem_mode = <1>; - spk-amplify = <2>; - status = "disabled"; - }; -}; - -&i2c2 { - status = "disabled"; - rt5631: rt5631@1a { - compatible = "rt5631"; - reg = <0x1a>; - }; - ts@01 { - compatible = "ct,vtl_ts"; - reg = <0x01>; - screen_max_x = <1536>; - screen_max_y = <2048>; - xy_swap = <1>; - x_reverse = <0>; - y_reverse = <0>; - x_mul = <2>; - y_mul = <2>; - bin_ver = <0>; - irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>; - rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>; - }; -}; - -&i2c3 { - status = "disabled"; -}; - -&i2c4 { - status = "disabled"; -}; - -&i2c5 { - status = "disabled"; -}; - -&CPU_SLEEP_0 { - arm,psci-suspend-param = <0x1010000>; -}; - -&fb { - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <1>; - rockchip,disp-policy = ; -}; - -&disp_timings { - native-mode = <&timing1>; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - - -&lvds { - status = "okay"; - //pinctrl-names = "lcdc", "sleep"; - //pinctrl-0 = <&lcdc_lcdc>; - //pinctrl-1 = <&lcdc_gpio>; -}; - -&lcdc { - status = "okay"; - rockchip,mirror = ; - rockchip,cabc_mode = <0>; - rockchip,fb-win-map = ; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&lcdc_lcdc>; - pinctrl-1 = <&lcdc_gpio>; - power_ctr: power_ctr { - rockchip,debug = <0>; - /*lcd_en:lcd_en { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - - lcd_cs:lcd_cs { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - - lcd_rst:lcd_rst { - rockchip,power_type = ; - gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <5>; - };*/ - }; -}; - -&hdmi { - status = "okay"; -}; - -&adc { - status = "disabled"; - - rockchip_headset { - compatible = "rockchip_headset"; - headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&gpio0_c7>;//gpio0_c7 - io-channels = <&adc 2>; - /* - hook_gpio = ; - hook_down_type = ; //interrupt hook key down status - */ - }; - - key { - compatible = "rockchip,key"; - io-channels = <&adc 1>; - - vol-up-key { - linux,code = <115>; - label = "volume up"; - rockchip,adc_value = <1>; - }; - - vol-down-key { - linux,code = <114>; - label = "volume down"; - rockchip,adc_value = <170>; - }; - - power-key { - gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "power"; - gpio-key,wakeup; - }; - - menu-key { - linux,code = <59>; - label = "menu"; - rockchip,adc_value = <355>; - }; - - home-key { - linux,code = <102>; - label = "home"; - rockchip,adc_value = <746>; - }; - - back-key { - linux,code = <158>; - label = "back"; - rockchip,adc_value = <560>; - }; - - camera-key { - linux,code = <212>; - label = "camera"; - rockchip,adc_value = <450>; - }; - }; -}; - -&pwm0 { - status = "disabled"; -}; - -&pwm1 { - status = "okay"; -}; - -&clk_core_b_dvfs_table { - operating-points = < - /* KHz uV */ - //216000 950000 - 312000 950000 - 408000 950000 - 600000 975000 - 696000 975000 - 816000 1000000 - 1008000 1100000 - 1200000 1175000 - 1296000 1250000 - 1416000 1300000 - //1488000 1325000 - 1512000 1350000 - >; - status = "okay"; -}; - -&clk_core_l_dvfs_table { - operating-points = < - /* KHz uV */ - //216000 950000 - 312000 950000 - 408000 950000 - 600000 950000 - 696000 975000 - 816000 1050000 - 1008000 1125000 - 1200000 1250000 - //1300000 1300000 - >; - status = "okay"; -}; - -&clk_gpu_dvfs_table { - operating-points = < - /* KHz uV */ - //200000 1200000 - 300000 1200000 - 400000 1200000 - 600000 1200000 - >; -}; - -&clk_ddr_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 1050000 - 300000 1050000 - 400000 1100000 - 533000 1150000 - 800000 1200000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 800000 - /*SYS_STATUS_SUSPEND 200000 - SYS_STATUS_VIDEO_1080P 240000 - SYS_STATUS_VIDEO_4K 400000 - SYS_STATUS_PERFORMANCE 528000 - SYS_STATUS_DUALVIEW 400000 - SYS_STATUS_BOOST 324000 - SYS_STATUS_ISP 400000*/ - >; - auto-freq-table = < - 240000 - 324000 - 396000 - 528000 - >; - auto-freq=<0>; - status="okay"; -}; - -&dwc_control_usb { - host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>; - otg_drv_gpio = <&gpio0 GPIO_A5 GPIO_ACTIVE_LOW>; - - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; - }; - -&usb0 { - /*0 - Normal, 1 - Force Host, 2 - Force Device*/ - rockchip,usb-mode = <0>; -}; - -/include/ "../../../arm/boot/dts/act8846.dtsi" -&act8846 { - gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>; - act8846,system-power-controller; - - regulators { - - dcdc1_reg: regulator@0{ - regulator-name= "act_dcdc1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - regulator-boot-on; - }; - - dcdc2_reg: regulator@1 { - regulator-name= "vccio"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - dcdc3_reg: regulator@2 { - regulator-name= "vdd_logic"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1000000>; - }; - - }; - - dcdc4_reg: regulator@3 { - regulator-name= "act_dcdc4"; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <2000000>; - }; - }; - - ldo1_reg: regulator@4 { - regulator-name= "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo2_reg: regulator@5 { - regulator-name= "act_ldo2"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - }; - - ldo3_reg: regulator@6 { - regulator-name= "act_ldo3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo4_reg:regulator@7 { - regulator-name= "act_ldo4"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo5_reg: regulator@8 { - regulator-name= "act_ldo5"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo6_reg: regulator@9 { - regulator-name= "act_ldo6"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - }; - - }; - - ldo7_reg: regulator@10 { - regulator-name= "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - }; - - }; - - ldo8_reg: regulator@11 { - regulator-name= "act_ldo8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - }; - }; -}; - -&ion_cma { - reg = <0x00000000 0x00000000>; /* 0MB */ -}; - -/* -&dwc_control_usb { - usb_uart { - status = "disabled"; - }; -}; - -&rk3288_cif_sensor{ - status = "okay"; -}; -*/ - -&remotectl { - handle_cpu_id = <1>; - status = "okay"; - ir_key1{ - rockchip,usercode = <0x4040>; - rockchip,key_table = - <0xf2 KEY_REPLY>, - <0xba KEY_BACK>, - <0xf4 KEY_UP>, - <0xf1 KEY_DOWN>, - <0xef KEY_LEFT>, - <0xee KEY_RIGHT>, - <0xbd KEY_HOME>, - <0xea KEY_VOLUMEUP>, - <0xe3 KEY_VOLUMEDOWN>, - <0xe2 KEY_SEARCH>, - <0xb2 KEY_POWER>, - <0xbc KEY_MUTE>, - <0xec KEY_MENU>, - <0xbf 0x190>, - <0xe0 0x191>, - <0xe1 0x192>, - <0xe9 183>, - <0xe6 248>, - <0xe8 185>, - <0xe7 186>, - <0xf0 388>, - <0xbe 0x175>; - }; - ir_key2{ - rockchip,usercode = <0xff00>; - rockchip,key_table = - <0xf9 KEY_HOME>, - <0xbf KEY_BACK>, - <0xfb KEY_MENU>, - <0xaa KEY_REPLY>, - <0xb9 KEY_UP>, - <0xe9 KEY_DOWN>, - <0xb8 KEY_LEFT>, - <0xea KEY_RIGHT>, - <0xeb KEY_VOLUMEDOWN>, - <0xef KEY_VOLUMEUP>, - <0xf7 KEY_MUTE>, - <0xe7 KEY_POWER>, - <0xfc KEY_POWER>, - <0xa9 KEY_VOLUMEDOWN>, - <0xa8 KEY_VOLUMEDOWN>, - <0xe0 KEY_VOLUMEDOWN>, - <0xa5 KEY_VOLUMEDOWN>, - <0xab 183>, - <0xb7 388>, - <0xf8 184>, - <0xaf 185>, - <0xed KEY_VOLUMEDOWN>, - <0xee 186>, - <0xb3 KEY_VOLUMEDOWN>, - <0xf1 KEY_VOLUMEDOWN>, - <0xf2 KEY_VOLUMEDOWN>, - <0xf3 KEY_SEARCH>, - <0xb4 KEY_VOLUMEDOWN>, - <0xbe KEY_SEARCH>; - }; - ir_key3{ - rockchip,usercode = <0x1dcc>; - rockchip,key_table = - <0xee KEY_REPLY>, - <0xf0 KEY_BACK>, - <0xf8 KEY_UP>, - <0xbb KEY_DOWN>, - <0xef KEY_LEFT>, - <0xed KEY_RIGHT>, - <0xfc KEY_HOME>, - <0xf1 KEY_VOLUMEUP>, - <0xfd KEY_VOLUMEDOWN>, - <0xb7 KEY_SEARCH>, - <0xff KEY_POWER>, - <0xf3 KEY_MUTE>, - <0xbf KEY_MENU>, - <0xf9 0x191>, - <0xf5 0x192>, - <0xb3 388>, - <0xbe KEY_1>, - <0xba KEY_2>, - <0xb2 KEY_3>, - <0xbd KEY_4>, - <0xf9 KEY_5>, - <0xb1 KEY_6>, - <0xfc KEY_7>, - <0xf8 KEY_8>, - <0xb0 KEY_9>, - <0xb6 KEY_0>, - <0xb5 KEY_BACKSPACE>; - }; -}; diff --git a/arch/arm64/boot/dts/rk3368-cif-sensor.dtsi b/arch/arm64/boot/dts/rk3368-cif-sensor.dtsi deleted file mode 100644 index bede6345cb7d..000000000000 --- a/arch/arm64/boot/dts/rk3368-cif-sensor.dtsi +++ /dev/null @@ -1,30 +0,0 @@ -#include "rk3368.dtsi" -#include "../../../arm/mach-rockchip/rk_camera_sensor_info.h" - -/{ - rk3368_cif_sensor: rk3368_cif_sensor{ - compatible = "rockchip,sensor"; - status = "disabled"; - - ov2659{ - is_front = <0>; - rockchip,power = <&gpio0 GPIO_D0 GPIO_ACTIVE_HIGH>; - rockchip,powerdown = <&gpio1 GPIO_B4 GPIO_ACTIVE_HIGH>; - pwdn_active = ; - pwr_active = ; - mir = <0>; - flash_attach = <1>; - //rockchip,flash = <>; - flash_active = <1>; - resolution = ; - powerup_sequence = ; - orientation = <0>; - i2c_add = ; - i2c_rata = <100000>; - i2c_chl = <3>; - cif_chl = <0>; - mclk_rate = <24>; - }; - }; -}; - diff --git a/arch/arm64/boot/dts/rk3368-clocks.dtsi b/arch/arm64/boot/dts/rk3368-clocks.dtsi deleted file mode 100644 index 1ef9c5c389c2..000000000000 --- a/arch/arm64/boot/dts/rk3368-clocks.dtsi +++ /dev/null @@ -1,2847 +0,0 @@ -/* - * Copyright (C) 2014-2015 ROCKCHIP, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include - -/{ - clocks { - compatible = "rockchip,rk-clocks"; - rockchip,grf = <&grf>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - fixed_rate_cons { - compatible = "rockchip,rk-fixed-rate-cons"; - - xin24m: xin24m { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "xin24m"; - clock-frequency = <24000000>; - #clock-cells = <0>; - }; - - xin12m: xin12m { - compatible = "rockchip,rk-fixed-clock"; - clocks = <&xin24m>; - clock-output-names = "xin12m"; - clock-frequency = <12000000>; - #clock-cells = <0>; - }; - - xin32k: xin32k { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "xin32k"; - clock-frequency = <32000>; - #clock-cells = <0>; - }; - - pvtm_clkout: pvtm_clkout { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "pvtm_clkout"; - clock-frequency = <32000>; - #clock-cells = <0>; - }; - - dummy: dummy { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "dummy"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - jtag_clkin: jtag_clkin { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "jtag_clkin"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - gmac_clkin: gmac_clkin { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "gmac_clkin"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - pclkin_isp: pclkin_isp { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "pclkin_isp"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - pclkin_vip: pclkin_vip { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "pclkin_vip"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - clkin_hsadc_tsp: clkin_hsadc_tsp { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "clkin_hsadc_tsp"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - i2s_clkin: i2s_clkin { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "i2s_clkin"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - }; - - fixed_factor_cons { - compatible = "rockchip,rk-fixed-factor-cons"; - - hclk_vepu: hclk_vepu { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&aclk_vepu>; - clock-output-names = "hclk_vepu"; - clock-div = <4>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - hclk_vdpu: hclk_vdpu { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&aclk_vdpu>; - clock-output-names = "hclk_vdpu"; - clock-div = <4>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - usbotg_480m_out: usbotg_480m_out { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&clk_gates8 1>; - clock-output-names = "usbotg_480m_out"; - clock-div = <1>; - clock-mult = <20>; - #clock-cells = <0>; - }; - - pclkin_isp_inv: pclkin_isp_inv { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&clk_gates17 2>; - clock-output-names = "pclkin_isp_inv"; - clock-div = <1>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - pclkin_vip_inv: pclkin_vip_inv { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&clk_gates16 13>; - clock-output-names = "pclkin_vip_inv"; - clock-div = <1>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - pclk_vio: pclk_vio { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&clk_gates16 8>; - clock-output-names = "pclk_vio"; - clock-div = <1>; - clock-mult = <1>; - #clock-cells = <0>; - }; - }; - - pd_cons { - compatible = "rockchip,rk-pd-cons"; - - pd_gpu_0: pd_gpu_0 { - compatible = "rockchip,rk-pd-clock"; - clock-output-names = "pd_gpu_0"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_gpu_1: pd_gpu_1 { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_gpu_0>; - clock-output-names = "pd_gpu_1"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_video: pd_video { - compatible = "rockchip,rk-pd-clock"; - clock-output-names = "pd_video"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_vio: pd_vio { - compatible = "rockchip,rk-pd-clock"; - clock-output-names = "pd_vio"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_hevc: pd_hevc { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_video>; - clock-output-names = "pd_hevc"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_vop: pd_vop { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_vop"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_isp: pd_isp { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_isp"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_iep: pd_iep { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_iep"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_rga: pd_rga { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_rga"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_mipicsi: pd_mipicsi { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_mipicsi"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_mipidsi: pd_mipidsi { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_mipidsi"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_lvds: pd_lvds { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_lvds"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_hdmi: pd_hdmi { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_hdmi"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_edp: pd_edp { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_edp"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - }; - - clock_regs { - compatible = "rockchip,rk-clock-regs"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0xff760000 0x1000>; - reg = <0x0 0xff760000 0x0 0x1000>; - - /* PLL control regs */ - pll_cons { - compatible = "rockchip,rk-pll-cons"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - clk_apllb: pll-clk@0000 { - compatible = "rockchip,rk3188-pll-clk"; - reg = <0x0000 0x10>; - mode-reg = <0x000c 8>; - status-reg = <0x0480 1>; - clocks = <&xin24m>; - clock-output-names = "clk_apllb"; - rockchip,pll-type = ; - #clock-cells = <0>; - }; - - - clk_aplll: pll-clk@0010 { - compatible = "rockchip,rk3188-pll-clk"; - reg = <0x0010 0x10>; - mode-reg = <0x001c 8>; - status-reg = <0x0480 0>; - clocks = <&xin24m>; - clock-output-names = "clk_aplll"; - rockchip,pll-type = ; - #clock-cells = <0>; - }; - - clk_dpll: pll-clk@0020 { - compatible = "rockchip,rk3188-pll-clk"; - reg = <0x0020 0x10>; - mode-reg = <0x002c 8>; - status-reg = <0x0480 2>; - clocks = <&xin24m>; - clock-output-names = "clk_dpll"; - rockchip,pll-type = ; - #clock-cells = <0>; - }; - - - clk_cpll: pll-clk@0030 { - compatible = "rockchip,rk3188-pll-clk"; - reg = <0x0030 0x10>; - mode-reg = <0x003c 8>; - status-reg = <0x0480 3>; - clocks = <&xin24m>; - clock-output-names = "clk_cpll"; - rockchip,pll-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_gpll: pll-clk@0040 { - compatible = "rockchip,rk3188-pll-clk"; - reg = <0x0040 0x10>; - mode-reg = <0x004c 8>; - status-reg = <0x0480 4>; - clocks = <&xin24m>; - clock-output-names = "clk_gpll"; - rockchip,pll-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_npll: pll-clk@0050 { - compatible = "rockchip,rk3188-pll-clk"; - reg = <0x0050 0x10>; - mode-reg = <0x005c 8>; - status-reg = <0x0480 5>; - clocks = <&xin24m>; - clock-output-names = "clk_npll"; - rockchip,pll-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - /* Select control regs */ - clk_sel_cons { - compatible = "rockchip,rk-sel-cons"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - clk_sel_con0: sel-con@0100 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0100 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_core_b_div: clk_core_b_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_core_b>; - clock-output-names = "clk_core_b"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - rockchip,flags = <(CLK_GET_RATE_NOCACHE | - CLK_SET_RATE_NO_REPARENT)>; - }; - - /* 6:5 reserved */ - - clk_core_b: clk_core_b_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <7 1>; - clocks = <&clk_apllb>, <&clk_gpll>; - clock-output-names = "clk_core_b"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - aclkm_core_b: aclkm_core_b_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_core_b>; - clock-output-names = "aclkm_core_b"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 15:13 reserved */ - }; - - clk_sel_con1: sel-con@0104 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0104 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - atclk_core_b: atclk_core_b_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_core_b>; - clock-output-names = "atclk_core_b"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 7:5 reserved */ - - pclk_dbg_b: pclk_dbg_b_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_core_b>; - clock-output-names = "pclk_dbg_b"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - }; - - clk_sel_con2: sel-con@0108 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0108 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_core_l_div: clk_core_l_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_core_l>; - clock-output-names = "clk_core_l"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - rockchip,flags = <(CLK_GET_RATE_NOCACHE | - CLK_SET_RATE_NO_REPARENT)>; - }; - - /* 6:5 reserved */ - - clk_core_l: clk_core_l_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <7 1>; - clocks = <&clk_aplll>, <&clk_gpll>; - clock-output-names = "clk_core_l"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - aclkm_core_l: aclkm_core_l_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_core_l>; - clock-output-names = "aclkm_core_l"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 15:13 reserved */ - }; - - clk_sel_con3: sel-con@010c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x010c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - atclk_core_l: atclk_core_l_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_core_l>; - clock-output-names = "atclk_core_l"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 7:5 reserved */ - - pclk_dbg_l: pclk_dbg_l_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_core_l>; - clock-output-names = "pclk_dbg_l"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - }; - - clk_sel_con4: sel-con@0110 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0110 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_cs_div: clk_cs_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_cs>; - clock-output-names = "clk_cs"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - rockchip,flags = ; - }; - - /* 5 reserved */ - - clk_cs: clk_cs_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_gates0 9>, <&clk_gates0 10>, <&clk_gates0 8>, <&dummy>; - clock-output-names = "clk_cs"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clkin_trace: clkin_trace_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_cs>; - clock-output-names = "clkin_trace"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con5: sel-con@0114 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0114 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - aclk_cci_div: aclk_cci_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&aclk_cci>; - clock-output-names = "aclk_cci"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 5 reserved */ - - aclk_cci: aclk_cci_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>, <&clk_npll>; - clock-output-names = "aclk_cci"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - /* sel[7:6] reserved */ - - clk_sel_con8: sel-con@0120 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0120 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - aclk_bus_div: aclk_bus_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&aclk_bus>; - clock-output-names = "aclk_bus"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 6:5 reserved */ - - aclk_bus: aclk_bus_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <7 1>; - clocks = <&clk_gates1 11>, <&clk_gates1 10>; - clock-output-names = "aclk_bus"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - hclk_bus: hclk_bus_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 2>; - clocks = <&aclk_bus>; - clock-output-names = "hclk_bus"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* 11:10 reserved */ - - pclk_bus: pclk_bus_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <12 3>; - clocks = <&aclk_bus>; - clock-output-names = "pclk_bus"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con9: sel-con@0124 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0124 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - aclk_peri_div: aclk_peri_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&aclk_peri>; - clock-output-names = "aclk_peri"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 6:5 reserved */ - - aclk_peri: aclk_peri_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <7 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "aclk_peri"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - hclk_peri: hclk_peri_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 2>; - clocks = <&aclk_peri>; - clock-output-names = "hclk_peri"; - rockchip,div-type = ; - rockchip,div-relations = - <0x0 1 - 0x1 2 - 0x2 4>; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* 11:10 reserved */ - - pclk_peri: pclk_peri_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <12 2>; - clocks = <&aclk_peri>; - clock-output-names = "pclk_peri"; - rockchip,div-type = ; - rockchip,div-relations = - <0x0 1 - 0x1 2 - 0x2 4 - 0x3 8>; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con10: sel-con@0128 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0128 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - pclk_pmu_pre: pclk_pmu_pre_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_gpll>; - clock-output-names = "pclk_pmu_pre"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* 7:5 reserved */ - - pclk_alive_pre: pclk_alive_pre_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_gpll>; - clock-output-names = "pclk_alive_pre"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* 13 reserved */ - - clk_crypto: clk_crypto_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <14 2>; - clocks = <&aclk_bus>; - clock-output-names = "clk_crypto"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - /* sel[11]: reserved */ - - clk_sel_con12: sel-con@0130 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0130 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - fclk_mcu_div: fclk_mcu_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&fclk_mcu>; - clock-output-names = "fclk_mcu"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 6:5 reserved */ - - fclk_mcu: fclk_mcu_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <7 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "fclk_mcu"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - stclk_mcu: stclk_mcu_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 3>; - clocks = <&fclk_mcu>; - clock-output-names = "stclk_mcu"; - rockchip,div-type = ; - #clock-cells = <0>; - }; - }; - - clk_sel_con13: sel-con@0134 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0134 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_ddr_div: clk_ddr_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 2>; - clocks = <&clk_ddr>; - clock-output-names = "clk_ddr"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,flags = <(CLK_GET_RATE_NOCACHE | - CLK_SET_RATE_NO_REPARENT)>; - rockchip,clkops-idx = - ; - }; - - /* 3:2 reserved */ - - clk_ddr: clk_ddr_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <4 1>; - clocks = <&clk_dpll>, <&clk_gpll>; - clock-output-names = "clk_ddr"; - #clock-cells = <0>; - }; - - /* 7:5 reserved */ - - usbphy_480m: usbphy_480m_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 1>; - clocks = <&xin24m>, <&usbotg_480m_out>; - clock-output-names = "usbphy_480m"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con14: sel-con@0138 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0138 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_gpu_core_div: clk_gpu_core_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_gpu_core>; - clock-output-names = "clk_gpu"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - rockchip,flags = ; - }; - - /* 5 reserved */ - - clk_gpu_core: clk_gpu_core_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>, <&clk_npll>; - clock-output-names = "clk_gpu"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - aclk_gpu_mem: aclk_gpu_mem_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&aclk_gpu>; - clock-output-names = "aclk_gpu_mem"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* 13 reserved */ - - aclk_gpu: aclk_gpu_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "aclk_gpu"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con15: sel-con@013c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x013c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - aclk_vepu_div: aclk_vepu_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&aclk_vepu>; - clock-output-names = "aclk_vepu"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 5 reserved */ - - aclk_vepu: aclk_vepu_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>, <&usbphy_480m>; - clock-output-names = "aclk_vepu"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - aclk_vdpu_div: aclk_vdpu_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&aclk_vdpu>; - clock-output-names = "aclk_vdpu"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 13 reserved */ - - aclk_vdpu: aclk_vdpu_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>, <&usbphy_480m>; - clock-output-names = "aclk_vdpu"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con16: sel-con@0140 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0140 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - aclk_gpu_cfg: aclk_gpu_cfg_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&aclk_gpu>; - clock-output-names = "aclk_gpu_cfg"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con17: sel-con@0144 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0144 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_hevc_cabac_div: clk_hevc_cabac_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_hevc_cabac>; - clock-output-names = "clk_hevc_cabac"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 5 reserved */ - - clk_hevc_cabac: clk_hevc_cabac_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>, <&usbphy_480m>; - clock-output-names = "clk_hevc_cabac"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_hevc_core_div: clk_hevc_core_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_hevc_core>; - clock-output-names = "clk_hevc_core"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 13 reserved */ - - clk_hevc_core: clk_hevc_core_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>, <&usbphy_480m>; - clock-output-names = "clk_hevc_core"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con18: sel-con@0148 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0148 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_rga_div: clk_rga_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_rga>; - clock-output-names = "clk_rga"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 5 reserved */ - - clk_rga: clk_rga_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>, <&usbphy_480m>; - clock-output-names = "clk_rga"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - aclk_rga_div: aclk_rga_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&aclk_rga_pre>; - clock-output-names = "aclk_rga_pre"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 13 reserved */ - - aclk_rga_pre: aclk_rga_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>, <&usbphy_480m>; - clock-output-names = "aclk_rga_pre"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con19: sel-con@014c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x014c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - aclk_vio0_div: aclk_vio0_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&aclk_vio0>; - clock-output-names = "aclk_vio0"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 5 reserved */ - - aclk_vio0: aclk_vio0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>, <&usbphy_480m>; - clock-output-names = "aclk_vio0"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con20: sel-con@0150 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0150 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - dclk_vop0_div: dclk_vop0_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 8>; - clocks = <&dclk_vop0>; - clock-output-names = "dclk_vop0"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - - }; - - dclk_vop0: dclk_vop0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>, <&dummy>; - clock-output-names = "dclk_vop0"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* 15:10 reserved */ - }; - - clk_sel_con21: sel-con@0154 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0154 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - hclk_vio: hclk_vio_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&aclk_vio0>; - clock-output-names = "hclk_vio"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* 5 reserved */ - - pclk_isp: pclk_isp_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 1>; - clocks = <&clk_gates17 2>, <&pclkin_isp_inv>; - clock-output-names = "pclk_isp"; - #clock-cells = <0>; - }; - - /* 7 reserved */ - - clk_vip_div: clk_vip_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_vip>; - clock-output-names = "clk_vip"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - pclk_vip: pclk_vip_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <13 1>; - clocks = <&clk_gates16 13>, <&pclkin_vip_inv>; - clock-output-names = "pclk_vip"; - #clock-cells = <0>; - }; - - clk_vip: clk_vip_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 1>; - clocks = <&clk_vip_pll>, <&xin24m>; - clock-output-names = "clk_vip"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_vip_pll: clk_vip_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <15 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "clk_vip_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con22: sel-con@0158 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0158 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_isp_div: clk_isp_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 6>; - clocks = <&clk_isp>; - clock-output-names = "clk_isp"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - clk_isp: clk_isp_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>, <&clk_npll>; - clock-output-names = "clk_isp"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con23: sel-con@015c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x015c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_edp_div: clk_edp_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 6>; - clocks = <&clk_edp>; - clock-output-names = "clk_edp"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - clk_edp: clk_edp_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>, <&clk_npll>; - clock-output-names = "clk_edp"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_edp_24m: clk_edp_24m_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 1>; - clocks = <&xin24m>, <&dummy>; - clock-output-names = "clk_edp_24m"; - #clock-cells = <0>; - }; - }; - - /* sel[24]: reserved */ - - clk_sel_con25: sel-con@0164 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0164 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_tsadc: clk_tsadc_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 6>; - clocks = <&clk_32k_mux>; - clock-output-names = "clk_tsadc"; - rockchip,div-type = ; - #clock-cells = <0>; - }; - - /* 7:6 reserved */ - - clk_saradc: clk_saradc_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 8>; - clocks = <&xin24m>; - clock-output-names = "clk_saradc"; - rockchip,div-type = ; - #clock-cells = <0>; - }; - }; - - clk_sel_con26: sel-con@0168 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0168 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - /* 7:0 reserved */ - - ehci1_usb_480m: ehci1_usb_480m_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 1>; - clocks = <&usbotg_480m_out>, <&dummy>; - clock-output-names = "ehci1_usb_480m"; - #clock-cells = <0>; - }; - - /* 11:9 reserved */ - - ehci1phy_480m: ehci1phy_480m_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <12 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&ehci1_usb_480m>, <&ehci1_usb_480m>; - clock-output-names = "ehci1phy_480m"; - #clock-cells = <0>; - }; - }; - - clk_sel_con27: sel-con@016c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x016c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - i2s_pll_div: i2s_pll_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&i2s_pll>; - clock-output-names = "i2s_pll"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* 7 reserved */ - - clk_i2s: clk_i2s_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&i2s_pll>, <&i2s_frac>, <&i2s_clkin>, <&xin12m>; - clock-output-names = "clk_i2s"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* 11:10 reserved */ - - i2s_pll: i2s_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <12 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "i2s_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* 14:13 reserved */ - - i2s_out: i2s_out_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <15 1>; - clocks = <&clk_i2s>, <&xin12m>; - clock-output-names = "i2s_out"; - #clock-cells = <0>; - }; - }; - - clk_sel_con28: sel-con@0170 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0170 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - i2s_frac: i2s_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&i2s_pll>; - clock-output-names = "i2s_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - }; - - /* sel[30:29] reserved */ - - clk_sel_con31: sel-con@017c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x017c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - - spdif_8ch_pll_div: spdif_8ch_pll_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&spdif_8ch_pll>; - clock-output-names = "spdif_8ch_pll"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* 7 reserved */ - - clk_spidf_8ch: clk_spidf_8ch_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&spdif_8ch_pll>, <&spdif_8ch_frac>, <&i2s_clkin>, <&xin12m>; - clock-output-names = "clk_spidf_8ch"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* 11:10 reserved */ - - spdif_8ch_pll: spdif_8ch_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <12 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "spdif_8ch_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* 15:13 reserved */ - }; - - clk_sel_con32: sel-con@0180 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0180 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - spdif_8ch_frac: spdif_8ch_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&spdif_8ch_pll>; - clock-output-names = "spdif_8ch_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - }; - - clk_sel_con33: sel-con@0184 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0184 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_uart0_pll_div: clk_uart0_pll_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_uart0_pll>; - clock-output-names = "clk_uart0_pll"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - }; - - /* 7: reserved */ - - clk_uart0: clk_uart0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&clk_uart0_pll>, <&uart0_frac>, <&xin24m>, <&xin24m>; - clock-output-names = "clk_uart0"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* 11:10 reserved */ - - clk_uart0_pll: clk_uart0_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <12 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>, <&usbphy_480m>; - clock-output-names = "clk_uart0_pll"; - #clock-cells = <0>; - }; - }; - - clk_sel_con34: sel-con@0188 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0188 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - uart0_frac: uart0_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&clk_uart0_pll>; - clock-output-names = "uart0_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - }; - - clk_sel_con35: sel-con@018c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x018c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - uart1_div: uart1_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_uart_pll>; - clock-output-names = "uart1_div"; - rockchip,div-type = ; - #clock-cells = <0>; - }; - - /* 7 reserved */ - - clk_uart1: clk_uart1_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&uart1_div>, <&uart1_frac>, <&xin24m>, <&xin24m>; - clock-output-names = "clk_uart1"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* 11:10 reserved */ - - clk_uart_pll: clk_uart_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <12 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "clk_uart_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con36: sel-con@0190 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0190 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - uart1_frac: uart1_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&uart1_div>; - clock-output-names = "uart1_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - }; - - clk_sel_con37: sel-con@0194 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0194 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - uart2_div: uart2_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_uart_pll>; - clock-output-names = "uart2_div"; - rockchip,div-type = ; - #clock-cells = <0>; - }; - - /* 7 reserved */ - - clk_uart2: clk_uart2_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 1>; - clocks = <&uart2_div>, <&xin24m>; - clock-output-names = "clk_uart2"; - #clock-cells = <0>; - rockchip,flags = ; - }; - }; - - /* sel[38] reserved */ - - clk_sel_con39: sel-con@019c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x019c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - uart3_div: uart3_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_uart_pll>; - clock-output-names = "uart3_div"; - rockchip,div-type = ; - #clock-cells = <0>; - }; - - /* 7 reserved */ - - clk_uart3: clk_uart3_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&uart3_div>, <&uart3_frac>, <&xin24m>, <&xin24m>; - clock-output-names = "clk_uart3"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - }; - - clk_sel_con40: sel-con@01a0 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01a0 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - uart3_frac: uart3_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&uart3_div>; - clock-output-names = "uart3_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - }; - - clk_sel_con41: sel-con@01a4 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01a4 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - uart4_div: uart4_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_uart_pll>; - clock-output-names = "uart4_div"; - rockchip,div-type = ; - #clock-cells = <0>; - }; - - /* 7 reserved */ - - clk_uart4: clk_uart4_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&uart4_div>, <&uart4_frac>, <&xin24m>, <&xin24m>; - clock-output-names = "clk_uart4"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - }; - - clk_sel_con42: sel-con@01a8 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01a8 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - uart4_frac: uart4_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&uart4_div>; - clock-output-names = "uart4_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - }; - - clk_sel_con43: sel-con@01ac { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01ac 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_mac_pll_div: clk_mac_pll_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_mac_pll>; - clock-output-names = "clk_mac_pll"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 5 reserved */ - - clk_mac_pll: clk_mac_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_npll>, <&clk_cpll>, <&clk_gpll>, <&clk_gpll>; - clock-output-names = "clk_mac_pll"; - #clock-cells = <0>; - }; - - clk_mac: clk_mac_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 1>; - clocks = <&clk_mac_pll>, <&gmac_clkin>; - clock-output-names = "clk_mac"; - #clock-cells = <0>; - rockchip,flags = ; - #clock-init-cells = <1>; - }; - - /* 11:9 reserved */ - - /* 12: test_clk: wifi_pll_sel */ - - /* 15:13 reserved */ - }; - - clk_sel_con44: sel-con@01b0 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01b0 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - /* test_clk: wifi_frac */ - }; - - clk_sel_con45: sel-con@01b4 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01b4 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_spi0_div: clk_spi0_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_spi0>; - clock-output-names = "clk_spi0"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - clk_spi0: clk_spi0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <7 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "clk_spi0"; - #clock-cells = <0>; - }; - - clk_spi1_div: clk_spi1_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 7>; - clocks = <&clk_spi1>; - clock-output-names = "clk_spi1"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - clk_spi1: clk_spi1_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <15 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "clk_spi1"; - #clock-cells = <0>; - }; - }; - - clk_sel_con46: sel-con@01b8 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01b8 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_tsp_div: clk_tsp_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_tsp>; - clock-output-names = "clk_tsp"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 5 reserved */ - - clk_tsp: clk_tsp_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>, <&clk_npll>; - clock-output-names = "clk_tsp"; - #clock-cells = <0>; - }; - - clk_spi2_div: clk_spi2_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 7>; - clocks = <&clk_spi2>; - clock-output-names = "clk_spi2"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - clk_spi2: clk_spi2_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <15 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "clk_spi2"; - #clock-cells = <0>; - }; - }; - - clk_sel_con47: sel-con@01bc { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01bc 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_nandc0_div: clk_nandc0_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_nandc0>; - clock-output-names = "clk_nandc0"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 6:5 reserved */ - - clk_nandc0: clk_nandc0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <7 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "clk_nandc0"; - #clock-cells = <0>; - }; - - /* 12:8 test_div */ - - /* 15:13 reserved */ - }; - - clk_sel_con48: sel-con@01c0 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01c0 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_sdio0_div: clk_sdio0_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_sdio0>; - clock-output-names = "clk_sdio0"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 7 reserved */ - - clk_sdio0: clk_sdio0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>, <&xin24m>; - clock-output-names = "clk_sdio0"; - #clock-cells = <0>; - }; - - /* 15:10 reserved */ - }; - - /* sel[49] reserved */ - - clk_sel_con50: sel-con@01c8 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01c8 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_sdmmc0_div: clk_sdmmc0_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_sdmmc0>; - clock-output-names = "clk_sdmmc0"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 7 reserved */ - - clk_sdmmc0: clk_sdmmc0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>, <&xin24m>; - clock-output-names = "clk_sdmmc0"; - #clock-cells = <0>; - }; - - /* 15:10 reserved */ - }; - - clk_sel_con51: sel-con@01cc { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01cc 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_emmc_div: clk_emmc_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_emmc>; - clock-output-names = "clk_emmc"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 7 reserved */ - - clk_emmc: clk_emmc_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&usbphy_480m>, <&xin24m>; - clock-output-names = "clk_emmc"; - #clock-cells = <0>; - }; - - /* 15:10 reserved */ - }; - - clk_sel_con52: sel-con@01d0 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01d0 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_sfc_div: clk_sfc_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_sfc>; - clock-output-names = "clk_sfc"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* 6:5 reserved */ - - clk_sfc: clk_sfc_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <7 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "clk_sfc"; - #clock-cells = <0>; - }; - - /* 15:8 reserved */ - }; - - clk_sel_con53: sel-con@01d4 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01d4 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - i2s_2ch_pll_div: i2s_2ch_pll_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&i2s_2ch_pll>; - clock-output-names = "i2s_2ch_pll"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - rockchip,flags = ; - }; - - /* 7 reserved */ - - clk_i2s_2ch: clk_i2s_2ch_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&i2s_2ch_pll>, <&i2s_2ch_frac>, <&dummy>, <&xin12m>; - clock-output-names = "clk_i2s_2ch"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* 11:10 reserved */ - - i2s_2ch_pll: i2s_2ch_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <12 1>; - clocks = <&clk_cpll>, <&clk_gpll>; - clock-output-names = "i2s_2ch_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con54: sel-con@01d8 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01d8 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - i2s_2ch_frac: i2s_2ch_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&i2s_2ch_pll>; - clock-output-names = "i2s_2ch_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - }; - - clk_sel_con55: sel-con@01dc { - compatible = "rockchip,rk3188-selcon"; - reg = <0x01dc 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_hdcp_div: clk_hdcp_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 6>; - clocks = <&clk_hdcp>; - clock-output-names = "clk_hdcp"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - clk_hdcp: clk_hdcp_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_npll>, <&clk_npll>; - clock-output-names = "clk_hdcp"; - #clock-cells = <0>; - }; - }; - }; - - /* Gate control regs */ - clk_gate_cons { - compatible = "rockchip,rk-gate-cons"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - clk_gates0: gate-clk@0200 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0200 0x4>; - clocks = - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&clk_gpll>, <&clk_apllb>, - <&clk_aplll>, <&dummy>, - - <&aclk_cci>, <&clkin_trace>, - <&dummy>, <&dummy>; - - clock-output-names = - "reserved", "reserved",/* core_b_apll core_b_gpll */ - "reserved", "reserved", - - "reserved", "reserved",/* core_l_apll core_l_gpll */ - "reserved", "reserved", - - "g_clk_cs_gpll", "g_clk_cs_apllb", - "g_clk_cs_aplll", "reserved", - - "aclk_cci", "clkin_trace", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates1: gate-clk@0204 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0204 0x4>; - clocks = - <&aclk_bus>, <&hclk_bus>, - <&pclk_bus>, <&fclk_mcu>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&clk_gpll>, <&clk_cpll>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "aclk_bus", "hclk_bus", - "pclk_bus", "fclk_mcu", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved",/* ddr_dpll ddr_gpll */ - "aclk_bus_gpll", "aclk_bus_cpll", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates2: gate-clk@0208 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0208 0x4>; - clocks = - <&clk_uart0_pll>, <&uart0_frac>, - <&uart1_div>, <&uart1_frac>, - - <&uart2_div>, <&dummy>, - <&uart3_div>, <&uart3_frac>, - - <&uart4_div>, <&uart4_frac>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "clk_uart0_pll", "uart0_frac", - "uart1_div", "uart1_frac", - - "uart2_div", "reserved", - "uart3_div", "uart3_frac", - - "uart4_div", "uart4_frac", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates3: gate-clk@020c { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x020c 0x4>; - clocks = - <&aclk_peri>, <&dummy>, - <&hclk_peri>, <&pclk_peri>, - - <&clk_mac_pll>, <&clk_tsadc>, - <&clk_saradc>, <&clk_spi0>, - - <&clk_spi1>, <&clk_spi2>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "aclk_peri", "reserved", /* bit1: aclk_peri */ - "hclk_peri", "pclk_peri", - - "clk_mac_pll", "clk_tsadc", - "clk_saradc", "clk_spi0", - - "clk_spi1", "clk_spi2", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates4: gate-clk@0210 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0210 0x4>; - clocks = - <&aclk_vio0>, <&dclk_vop0>, - <&xin24m>, <&aclk_rga_pre>, - - <&clk_rga>, <&clk_vip_pll>, - <&aclk_vepu>, <&aclk_vdpu>, - - <&dummy>, <&clk_isp>, - <&dummy>, <&clk_gpu_core>, - - <&xin32k>, <&xin24m>, - <&xin24m>, <&dummy>; - - clock-output-names = - "aclk_vio0", "dclk_vop0", - "clk_vop0_pwm", "aclk_rga_pre", - - "clk_rga", "clk_vip_pll", - "aclk_vepu", "aclk_vdpu", - - "reserved", "clk_isp", /* bit8: hclk_vpu */ - "reserved", "clk_gpu", - - "clk_hdmi_cec", "clk_hdmi_hdcp", - "clk_dsiphy_24m", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates5: gate-clk@0214 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0214 0x4>; - clocks = - <&dummy>, <&clk_hevc_cabac>, - <&clk_hevc_core>, <&clk_edp>, - - <&clk_edp_24m>, <&clk_hdcp>, - <&dummy>, <&dummy>, - - <&aclk_gpu_mem>, <&aclk_gpu_cfg>, - <&dummy>, <&dummy>, - - <&dummy>, <&i2s_2ch_pll>, - <&i2s_2ch_frac>, <&clk_i2s_2ch>; - - clock-output-names = - "reserved", "clk_hevc_cabac", - "clk_hevc_core", "clk_edp", - - "clk_edp_24m", "clk_hdcp", - "reserved", "reserved", - - "aclk_gpu_mem", "aclk_gpu_cfg", - "reserved", "reserved", - - "reserved", "i2s_2ch_pll", - "i2s_2ch_frac", "clk_i2s_2ch"; - - #clock-cells = <1>; - }; - - clk_gates6: gate-clk@0218 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0218 0x4>; - clocks = - <&i2s_out>, <&i2s_pll>, - <&i2s_frac>, <&clk_i2s>, - - <&spdif_8ch_pll>, <&spdif_8ch_frac>, - <&clk_spidf_8ch>, <&clk_sfc>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&clk_tsp>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "i2s_out", "i2s_pll", - "i2s_frac", "clk_i2s", - - "spdif_8ch_pll", "spdif_8ch_frac", - "clk_spidf_8ch", "clk_sfc", - - "reserved", "reserved", - "reserved", "reserved", - - "clk_tsp", "reserved", - "reserved", "reserved";/* clk_ddrphy_gate clk4x_ddrphy_gate */ - - #clock-cells = <1>; - }; - - clk_gates7: gate-clk@021c { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x021c 0x4>; - clocks = - <&jtag_clkin>, <&dummy>, - <&clk_crypto>, <&xin24m>, - - <&dummy>, <&dummy>, - <&clk_mac>, <&clk_mac>, - - <&clk_nandc0>, <&pclk_pmu_pre>, - <&xin24m>, <&xin24m>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "clk_jtag", "reserved",/* bit1: test_clk */ - "clk_crypto", "clk_pvtm_pmu", - - "clk_mac_rx", "clk_mac_tx", - "clk_mac_ref", "clk_mac_refout", - - "clk_nandc0", "pclk_pmu_pre", - "clk_pvtm_core", "clk_pvtm_gpu", - - "clk_sdmmc0", "clk_sdio0", - "reserved", "clk_emmc"; - - #clock-cells = <1>; - }; - - clk_gates8: gate-clk@0220 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0220 0x4>; - clocks = - <&ehci1_usb_480m>, <&xin24m>, - <&dummy>, <&dummy>, - - <&clk_32k_mux>, <&dummy>, - <&xin12m>, <&ehci1phy_480m>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "ehci1_usb_480m", "clk_otgphy0", - "reserved", "reserved", - - "g_clk_otg_adp", "reserved",/* bit4: clk_otg_adp */ - "ehci1phy_12m", "ehci1phy_480m", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates9: gate-clk@0224 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0224 0x4>; - clocks = - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates10: gate-clk@0228 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0228 0x4>; - clocks = - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates11: gate-clk@022c { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x022c 0x4>; - clocks = - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates12: gate-clk@0230 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0230 0x4>; - clocks = - <&pclk_bus>, <&pclk_bus>, - <&pclk_bus>, <&pclk_bus>, - - <&aclk_bus>, <&aclk_bus>, - <&aclk_bus>, <&hclk_bus>, - - <&hclk_bus>, <&hclk_bus>, - <&hclk_bus>, <&aclk_bus>, - - <&aclk_bus>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "g_pclk_pwm0", "g_p_mailbox", - "g_p_i2cpmu", "g_p_i2caudio", - - "g_aclk_intmem", "g_clk_intmem0", - "g_clk_intmem1", "g_h_i2s_8ch", - - "g_h_i2s_2ch", "g_hclk_rom", - "g_hclk_spdif", "g_aclk_dmac", - - "g_a_strc_sys", "reserved",/* bit13: pclk_ddrupctl */ - "reserved", "reserved";/* bit14: pclk_ddrphy */ - - #clock-cells = <1>; - }; - - clk_gates13: gate-clk@0234 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0234 0x4>; - clocks = - <&pclk_bus>, <&pclk_bus>, - <&dummy>, <&hclk_bus>, - - <&hclk_bus>, <&pclk_bus>, - <&pclk_bus>, <&clkin_hsadc_tsp>, - - <&pclk_bus>, <&aclk_bus>, - <&hclk_bus>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "g_p_efuse_1024", "g_p_efuse_256", - "reserved", "g_mclk_crypto",/* bit2: nclk_ddrupctl */ - - "g_sclk_crypto", "g_p_uartdbg", - "g_pclk_pwm1", "clk_hsadc_tsp", - - "g_pclk_sim", "g_aclk_gic400", - "g_hclk_tsp", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates14: gate-clk@0238 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0238 0x4>; - clocks = - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates15: gate-clk@023c { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x023c 0x4>; - clocks = - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "reserved", "reserved",/* aclk_video hclk_video */ - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates16: gate-clk@0240 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0240 0x4>; - clocks = - <&clk_gates16 10>, <&clk_gates16 8>, - <&clk_gates16 9>, <&clk_gates16 8>, - - <&clk_gates16 9>, <&clk_gates16 9>, - <&clk_gates16 8>, <&clk_gates17 8>, - - <&clk_gates16 7>, <&aclk_vio0>, - <&aclk_rga_pre>, <&clk_gates16 9>, - - <&clk_gates16 8>, <&pclkin_vip>, - <&clk_isp>, <&dummy>; - - clock-output-names = - "g_aclk_rga", "g_hclk_rga", - "g_aclk_iep", "g_hclk_iep", - - "g_aclk_vop_iep", "g_aclk_vop", - "g_hclk_vop", "h_vio_ahb_arbi", - - "g_hclk_vio_noc", "g_aclk_vio0_noc", - "g_aclk_vio1_noc", "g_aclk_vip", - - "g_hclk_vip", "g_pclkin_vip", - "g_hclk_isp", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates17: gate-clk@0244 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0244 0x4>; - clocks = - <&clk_isp>, <&dummy>, - <&pclkin_isp>, <&pclk_vio>, - - <&pclk_vio>, <&dummy>, - <&pclk_vio>, <&hclk_vio>, - - <&clk_gates17 7>, <&pclk_vio>, - <&clk_gates16 10>, <&pclk_vio>, - - <&clk_gates16 8>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "g_aclk_isp", "reserved", - "g_pclkin_isp", "g_p_mipi_dsi0", - - "g_p_mipi_csi", "reserved", - "g_p_hdmi_ctrl", "g_hclk_vio_h2p", - - "g_pclk_vio_h2p", "g_p_edp_ctrl", - "g_aclk_hdcp", "g_pclk_hdcp", - - "g_h_hdcpmmu", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates18: gate-clk@0248 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0248 0x4>; - clocks = - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "reserved", "reserved",/* bit0-1: aclk_gpu_cfg aclk_gpu_mem */ - "reserved", "reserved",/* bit2: clk_gpu_core */ - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates19: gate-clk@024c { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x024c 0x4>; - clocks = - <&hclk_peri>, <&pclk_peri>, - <&aclk_peri>, <&aclk_peri>, - - <&pclk_peri>, <&pclk_peri>, - <&pclk_peri>, <&pclk_peri>, - - <&pclk_peri>, <&pclk_peri>, - <&pclk_peri>, <&pclk_peri>, - - <&pclk_peri>, <&pclk_peri>, - <&pclk_peri>, <&pclk_peri>; - - clock-output-names = - "g_hp_axi_matrix", "g_pp_axi_matrix", - "g_ap_axi_matrix", "g_a_dmac_peri", - - "g_pclk_spi0", "g_pclk_spi1", - "g_pclk_spi2", "g_pclk_uart0", - - "g_pclk_uart1", "g_pclk_uart3", - "g_pclk_uart4", "g_pclk_i2c2", - - "g_pclk_i2c3", "g_pclk_i2c4", - "g_pclk_i2c5", "g_pclk_saradc"; - - #clock-cells = <1>; - }; - - clk_gates20: gate-clk@0250 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0250 0x4>; - clocks = - <&pclk_peri>, <&hclk_peri>, - <&hclk_peri>, <&hclk_peri>, - - <&dummy>, <&hclk_peri>, - <&hclk_peri>, <&hclk_peri>, - - <&aclk_peri>, <&hclk_peri>, - <&hclk_peri>, <&hclk_peri>, - - <&dummy>, <&aclk_peri>, - <&pclk_peri>, <&aclk_peri>; - - clock-output-names = - "g_pclk_tsadc", "g_hclk_otg0", - "g_h_pmu_otg0", "g_hclk_host0", - - "reserved", "g_hclk_ehci1", - "g_h_usb_peri", "g_h_p_ahb_arbi", - - "g_a_peri_niu", "g_h_emem_peri", - "g_h_mmc_peri", "g_hclk_nand0", - - "reserved", "g_aclk_gmac", - "g_pclk_gmac", "g_hclk_sfc"; - - #clock-cells = <1>; - }; - - clk_gates21: gate-clk@0254 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0254 0x4>; - clocks = - <&hclk_peri>, <&hclk_peri>, - <&hclk_peri>, <&hclk_peri>, - - <&aclk_peri>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "g_hclk_sdmmc", "g_hclk_sdio0", - "g_hclk_emmc", "g_hclk_hsadc", - - "g_aclk_peri_mmu", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates22: gate-clk@0258 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0258 0x4>; - clocks = - <&dummy>, <&pclk_alive_pre>, - <&pclk_alive_pre>, <&pclk_alive_pre>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&pclk_alive_pre>, <&pclk_alive_pre>, - <&pclk_vio>, <&pclk_vio>, - - <&pclk_alive_pre>, <&pclk_alive_pre>, - <&dummy>, <&dummy>; - - clock-output-names = - "reserved", "g_pclk_gpio1", - "g_pclk_gpio2", "g_pclk_gpio3", - - "reserved", "reserved", - "reserved", "reserved", - - "g_pclk_grf", "g_p_alive_niu", - "g_pclk_dphytx0", "g_pclk_dphyrx", - - "g_pclk_timer0", "g_pclk_timer1", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates23: gate-clk@025c { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x025c 0x4>; - clocks = - <&pclk_pmu_pre>, <&pclk_pmu_pre>, - <&pclk_pmu_pre>, <&pclk_pmu_pre>, - - <&pclk_pmu_pre>, <&pclk_pmu_pre>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "g_pclk_pmu", "g_pclk_intmem1", - "g_pclk_pmu_noc", "g_pclk_sgrf", - - "g_pclk_gpio0", "g_pclk_pmugrf", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - - clk_gates24: gate-clk@0260 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x0260 0x4>; - clocks = - <&xin24m>, <&xin24m>, - <&xin24m>, <&xin24m>, - - <&xin24m>, <&xin24m>, - <&xin24m>, <&xin24m>, - - <&xin24m>, <&xin24m>, - <&xin24m>, <&xin24m>, - - <&dummy>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "g_clk_timer0", "g_clk_timer1", - "g_clk_timer2", "g_clk_timer3", - - "g_clk_timer4", "g_clk_timer5", - "g_clk_timer10", "g_clk_timer11", - - "g_clk_timer12", "g_clk_timer13", - "g_clk_timer14", "g_clk_timer15", - - "reserved", "reserved", - "reserved", "reserved"; - - #clock-cells = <1>; - }; - }; - }; - - special_regs { - compatible = "rockchip,rk-clock-special-regs"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - clk_32k_mux: clk_32k_mux { - compatible = "rockchip,rk3188-mux-con"; - reg = <0x0 0xff738100 0x0 0x4>; - rockchip,bits = <6 1>; - clocks = <&xin32k>, <&pvtm_clkout>; - clock-output-names = "clk_32k_mux"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - }; -}; diff --git a/arch/arm64/boot/dts/rk3368-fpga.dts b/arch/arm64/boot/dts/rk3368-fpga.dts deleted file mode 100644 index 0c336cd61d13..000000000000 --- a/arch/arm64/boot/dts/rk3368-fpga.dts +++ /dev/null @@ -1,168 +0,0 @@ -/dts-v1/; - -#include -#include - -/ { - compatible = "rockchip,rk3368"; - - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - xin24m: xin24m { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "xin24m"; - }; - - aliases { - serial2 = &uart_dbg; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53","arm,armv8"; - reg = <0x0 0x0>; - }; - }; - - chosen { - bootargs = "console=ttyS2 earlyprintk=uart8250-32bit,0xff690000"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - clock-frequency = <24000000>; - }; - - memory@00000000 { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x0 0x20000000>; - }; - - uart_dbg: serial@ff690000 { - compatible = "rockchip,serial"; - reg = <0x0 0xff690000 0x0 0x100>; - interrupts = ; - clock-frequency = <24000000>; - clocks = <&xin24m>, <&xin24m>; - clock-names = "sclk_uart", "pclk_uart"; - reg-shift = <2>; - reg-io-width = <4>; - }; - - gic: interrupt-controller@ffb70000 { - compatible = "arm,cortex-a15-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xffb71000 0 0x1000>, - <0x0 0xffb72000 0 0x1000>; - }; - - ion { - compatible = "rockchip,ion"; - #address-cells = <1>; - #size-cells = <0>; - - ion_cma: rockchip,ion-heap@1 { /* CMA HEAP */ - compatible = "rockchip,ion-heap"; - rockchip,ion_heap = <1>; - reg = <0x00000000 0x08000000>; /* 512MB */ - }; - rockchip,ion-heap@3 { /* VMALLOC HEAP */ - compatible = "rockchip,ion-heap"; - rockchip,ion_heap = <3>; - }; - }; - - fb: fb { - compatible = "rockchip,rk-fb"; - rockchip,disp-mode = ; - }; - - - rk_screen: rk_screen { - compatible = "rockchip,screen"; - disp_timings: display-timings { - native-mode = <&timing0>; - timing0: timing0 { - screen-type = ; - out-face = ; - color-mode = ; - clock-frequency = <27000000>; - hactive = <800>; - vactive = <480>; - hback-porch = <206>; - hfront-porch = <1>; - vback-porch = <25>; - vfront-porch = <10>; - hsync-len = <10>; - vsync-len = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <0>; - pixelclk-active = <0>; - swap-rb = <0>; - swap-rg = <0>; - swap-gb = <0>; - }; - }; - }; - - lvds: lvds@ff968000 { - compatible = "rockchip,rk3368-lvds"; - reg = <0x0 0xff968000 0x0 0x4000>, <0x0 0xff9600b0 0x0 0x01>; - //reg = <0xff968000 0x4000>, <0xff9600b0 0x01>; - reg-names = "mipi_lvds_phy", "mipi_lvds_ctl"; - //clocks = <&dummy>, <&dummy>; - //clock-names = "pclk_lvds", "pclk_lvds_ctl"; - status = "okay"; - }; - - lcdc: lcdc@ff930000 { - compatible = "rockchip,rk3368-lcdc"; - rockchip,prop = ; - rockchip,pwr18 = <0>; - rockchip,iommu-enabled = <0>; - //reg = <0xff930000 0x10000>; - reg = <0x0 0xff930000 0x0 0x10000>; - interrupts = ; - //pinctrl-names = "default", "gpio"; - //pinctrl-0 = <&lcdc_lcdc>; - //pinctrl-1 = <&lcdc_gpio>; - status = "okay"; - //clocks = <&dummy>, <&dummy>, <&dummy>, <&dummy>, <&dummy>; - //clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "pd_lcdc", "sclk_lcdc"; - power_ctr: power_ctr { - rockchip,debug = <0>; - /* - lcd_en:lcd_en { - rockchip,power_type = ; - gpios = <&gpio7 GPIO_A3 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - */ - /*lcd_cs:lcd_cs { - rockchip,power_type = ; - rockchip,delay = <10>; - }; - - lcd_rst:lcd_rst { - rockchip,power_type = ; - gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <5>; - };*/ - }; - }; -}; diff --git a/arch/arm64/boot/dts/rk3368-p9_818.dts b/arch/arm64/boot/dts/rk3368-p9_818.dts deleted file mode 100644 index bfb4fd0bb58f..000000000000 --- a/arch/arm64/boot/dts/rk3368-p9_818.dts +++ /dev/null @@ -1,779 +0,0 @@ -/dts-v1/; - -#include -#include -#include "rk3368.dtsi" -#include "../../../arm/boot/dts/lcd-ld089wu1-mipi.dtsi" -/ { - chosen { - bootargs = "earlyprintk=uart8250-32bit,0xff690000"; - }; - - wireless-wlan { - compatible = "wlan-platdata"; - - rockchip,grf = <&grf>; - - /* wifi_chip_type - wifi chip define - * ap6210, ap6330, ap6335 - * rtl8188eu, rtl8723bs, rtl8723bu - * esp8089 - */ - wifi_chip_type = "ap6210"; - - sdio_vref = <1800>; //1800mv or 3300mv - power_pmu_regulator = "vccio_wl"; - power_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - //vref_ctrl_enable; - vref_pmu_regulator = "vccio_wl"; - vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>; - WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>; - - status = "okay"; - }; - - wireless-bluetooth { - compatible = "bluetooth-platdata"; - uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default","rts_gpio"; - pinctrl-0 = <&uart0_rts>; - pinctrl-1 = <&uart0_rts_gpio>; - - BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>; - BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>; - BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>; - BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>; - - status = "okay"; - }; - - hallsensor { - compatible = "hall_och165t"; - type = ; - irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000>; - brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 - 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 - 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 - 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 - 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 - 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 - 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 - 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 - 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 - 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 - 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 - 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 - 243 244 245 246 247 248 249 250 251 252 253 254 255>; - default-brightness-level = <128>; - enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>; - }; - - pwm_regulator { - compatible = "rockchip_pwm_regulator"; - pwms = <&pwm1 0 2000>; - rockchip,pwm_id= <1>; - rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>; - rockchip,pwm_voltage= <1000000>; - rockchip,pwm_min_voltage= <925000>; - rockchip,pwm_max_voltage= <1400000>; - rockchip,pwm_suspend_voltage= <950000>; - rockchip,pwm_coefficient= <475>; - regulators { - #address-cells = <1>; - #size-cells = <0>; - pwm_reg0: regulator@0 { - regulator-compatible = "pwm_dcdc1"; - regulator-name= "vdd_logic"; - regulator-min-microvolt = <925000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; - }; - }; - - codec_hdmi_i2s: codec-hdmi-i2s { - compatible = "hdmi-i2s"; - }; - - codec_hdmi_spdif: codec-hdmi-spdif { - compatible = "hdmi-spdif"; - }; - - rockchip-hdmi-i2s { - compatible = "rockchip-hdmi-i2s"; - dais { - dai0 { - audio-codec = <&codec_hdmi_i2s>; - audio-controller = <&i2s0>; - format = "i2s"; - }; - }; - }; - - rockchip-hdmi-spdif { - compatible = "rockchip-hdmi-spdif"; - dais { - dai0 { - audio-codec = <&codec_hdmi_spdif>; - audio-controller = <&spdif>; - }; - }; - }; - - rockchip-es8316 { - compatible = "rockchip-es8316"; - dais { - dai0 { - audio-codec = <&es8316>; - audio-controller = <&i2s0>; - format = "i2s"; - }; - }; - }; - - io-domains { - compatible = "rockchip,rk3368-io-voltage-domain"; - rockchip,grf = <&grf>; - rockchip,pmugrf = <&pmugrf>; - - /*GRF_IO_VSEL*/ - gpio30-supply = <&rk818_dcdc4_reg>; /*APIO1_VDD*/ - wifi-supply = <&rk818_ldo8_reg>; /*APIO2_VDD*/ - audio-supply = <&rk818_dcdc4_reg>; /*APIO3_VDD*/ - gpio1830-supply = <&rk818_dcdc4_reg>; /*ADIO4_VDD*/ - sdcard-supply = <&rk818_ldo9_reg>; /*SDMMC_VDD*/ - - /*PMU_GRF_IO_VSEL*/ - pmu-supply = <&rk818_ldo5_reg>; /*PMUIO_VDD*/ - vop-supply = <&rk818_ldo5_reg>; /*LCDC_VDD*/ - }; -}; - -&tsadc { - tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ - //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ - status = "okay"; -}; - -&pinctrl { - //used for init some gpio - init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>; - - gpio0_gpio { - gpio0_c7: gpio0-c7 { - rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>; - }; - gpio0_a3: gpio0-a3 { - rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>; - }; - gpio0_c2: gpio0-c2 { - rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - gpio0_c3: gpio0-c3{ - rockchip,pins = <0 GPIO_C3 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - gpio0_c1: gpio0-c1 { - rockchip,pins = <0 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - //to add - }; - -}; - -&nandc0 { - status = "disabled"; // used nand set "disabled" ,used emmc set "okay" -}; - -&nandc0reg { - status = "okay"; // used nand set "disabled" ,used emmc set "okay" -}; - -&emmc { - clock-frequency = <150000000>; - clock-freq-min-max = <400000 150000000>; - - supports-highspeed; - supports-emmc; - bootpart-no-access; - - //supports-sd; - supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board. - caps2-mmc-hs200; - - ignore-pm-notify; - keep-power-in-suspend; - - //poll-hw-reset - status = "okay"; -}; - -&sdmmc { - clock-frequency = <50000000>; - clock-freq-min-max = <400000 50000000>; - supports-highspeed; - supports-sd; - broken-cd; - card-detect-delay = <200>; - - ignore-pm-notify; - keep-power-in-suspend; - - vmmc-supply = <&rk818_ldo1_reg>; - status = "okay"; -}; - -&sdio { - clock-frequency = <50000000>; - clock-freq-min-max = <200000 50000000>; - supports-highspeed; - supports-sdio; - ignore-pm-notify; - keep-power-in-suspend; - //cap-sdio-irq; - status = "okay"; -}; - -&dsihost0{ - status = "okay"; -}; - -&spi0 { - status = "disabled"; -}; - -&spi1 { - status = "disabled"; -}; - -&spi2 { - status = "disabled"; -}; - -&gmac { - status = "disabled"; -}; - -&uart_dbg { - status = "okay"; -}; - -&uart_bt { - status = "okay"; - dma-names = "!tx", "!rx"; - pinctrl-0 = <&uart0_xfer &uart0_cts>; -}; - -&i2c0 { - status = "okay"; - syr827: syr827@40 { - compatible = "silergy,syr82x"; - reg = <0x40>; - status = "okay"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr827_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-disabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - syr828: syr828@41 { - compatible = "silergy,syr82x"; - reg = <0x41>; - status = "okay"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr828_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - - rk818: rk818@1c { - reg = <0x1c>; - status = "okay"; - compatible = "rockchip,rk818"; - battery { - ocv_table = <3400 3650 3693 3707 3731 3749 3760 - 3770 3782 3796 3812 3829 3852 3882 - 3915 3951 3981 4047 4086 4132 4182>; - design_capacity = <8650>; - design_qmax = <8800>; - max_overcharge = <100>; - bat_res = <85>; - max_input_currentmA = <2000>; - max_chrg_currentmA = <1800>; - max_charge_voltagemV = <4200>; - max_bat_voltagemV = <4200>; - sleep_enter_current = <600>; - sleep_exit_current = <600>; - power_off_thresd = <3400>; - chrg_diff_voltagemV = <0>; - virtual_power = <0>; - power_dc2otg = <1>; - support_usb_adp = <1>; - support_dc_adp = <1>; - dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&i2c1 { - status = "okay"; - es8316: es8316@10 { - compatible = "es8316"; - reg = <0x10>; - spk-con-gpio = <&gpio0 GPIO_C3 GPIO_ACTIVE_HIGH>; - hp-det-gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; -}; - -&i2c2 { - status = "okay"; - touchscreen@14 { - compatible = "goodix,gt9xx"; - reg = <0x14>; - touch-gpio = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>; - reset-gpio = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>; - max-x = <1920>; - max-y = <1200>; - tp-size = <89>; - }; -}; - -&i2c3 { - status = "okay"; -}; - -&i2c4 { - status = "okay"; - mpu6500_acc:mpu_acc@68{ - compatible = "mpu6500_acc"; - reg = <0x68>; - irq_enable = <0>; - poll_delay_ms = <30>; - type = ; - layout = <7>; - }; -}; - -&i2c5 { - status = "disabled"; -}; - -&fb { - status = "okay"; - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <0>; -}; - -&rk_screen { - status = "okay"; - display-timings = <&disp_timings>; -}; - -&lcdc { - status = "okay"; - backlight = <&backlight>; - rockchip,mirror = ; - rockchip,cabc_mode = <0>; - rockchip,fb-win-map = ; - power_ctr: power_ctr { - rockchip,debug = <0>; - lcd_en:lcd_en { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <120>; - }; - - lcd_cs:lcd_cs { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - - /*lcd_rst:lcd_rst { - rockchip,power_type = ; - gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <5>; - };*/ - }; -}; - - -&hdmi { - status = "okay"; -}; - -&adc { - status = "okay"; - - rockchip_headset { - compatible = "rockchip_headset"; - headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&gpio0_c7>;//gpio0_c7 - io-channels = <&adc 2>; - /* - hook_gpio = ; - hook_down_type = ; //interrupt hook key down status - */ - }; - - key { - compatible = "rockchip,key"; - io-channels = <&adc 1>; - - vol-up-key { - linux,code = <115>; - label = "volume up"; - rockchip,adc_value = <1>; - }; - - vol-down-key { - linux,code = <114>; - label = "volume down"; - rockchip,adc_value = <170>; - }; - - power-key { - gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "power"; - gpio-key,wakeup; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&pwm1 { - status = "disabled"; -}; - -&clk_core_b_dvfs_table { - operating-points = < - /* KHz uV */ - 216000 950000 - 312000 950000 - 408000 950000 - 600000 950000 - 696000 950000 - 816000 975000 - 1008000 1050000 - 1200000 1150000 - 1296000 1225000 - >; - status = "okay"; -}; - -&clk_core_l_dvfs_table { - operating-points = < - /* KHz uV */ - 216000 950000 - 312000 950000 - 408000 950000 - 600000 950000 - 696000 975000 - 816000 1025000 - 1008000 1125000 - >; - status = "okay"; -}; - -&clk_gpu_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 950000 - 288000 1075000 - 400000 1100000 - 576000 1200000 - >; -}; - -&clk_ddr_dvfs_table { - operating-points = < - /* KHz uV */ - 96000 950000 - 192000 950000 - 300000 1025000 - 324000 1025000 - 396000 1050000 - 528000 1100000 - 600000 1125000 - 696000 1150000 - 792000 1175000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 528000 - SYS_STATUS_SUSPEND 192000 - SYS_STATUS_VIDEO_1080P 300000 - SYS_STATUS_VIDEO_4K 600000 - SYS_STATUS_PERFORMANCE 792000 - SYS_STATUS_DUALVIEW 600000 - SYS_STATUS_BOOST 400000 - SYS_STATUS_ISP 533000 - >; - auto-freq-table = < - 240000 - 324000 - 396000 - 528000 - >; - auto-freq=<0>; - status="okay"; -}; - -&dwc_control_usb { - host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>; - otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>; - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; -}; - -/include/ "../../../arm/boot/dts/rk818.dtsi" -&rk818 { - gpios =<&gpio0 GPIO_A1 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>; - rk818,system-power-controller; - pinctrl-names = "default"; - pinctrl-0 = <&gpio0_c1>; - regulators { - - rk818_dcdc1_reg: regulator@0{ - regulator-name= "vdd_arm";/*vcc arm*/ - regulator-min-microvolt = <700000>;/*<725000>;*/ - regulator-max-microvolt = <1500000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-disabled; - regulator-state-uv =<900000>; - }; - }; - - rk818_dcdc2_reg: regulator@1 { - regulator-name= "vdd_logic";/*vcc gpu*/ - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <1200000>; - }; - }; - - rk818_dcdc3_reg: regulator@2 { - regulator-name= "vcc_ddr"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <1200000>; - }; - }; - - rk818_dcdc4_reg: regulator@3 { - regulator-name= "vccio"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <3000000>; - }; - }; - - rk818_ldo1_reg: regulator@4 { - regulator-name= "vcc_codec"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <3300000>; - }; - }; - - rk818_ldo2_reg: regulator@5 { - regulator-name= "vcc_tp"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <3300000>; - }; - }; - - rk818_ldo3_reg: regulator@6 { - regulator-name= "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1000000>; - }; - }; - - rk818_ldo4_reg:regulator@7 { - regulator-name= "vcc18_lcd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo5_reg: regulator@8 { - regulator-name= "vccio_pmu"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo6_reg: regulator@9 { - regulator-name= "vdd10_lcd"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <1000000>; - }; - }; - - rk818_ldo7_reg: regulator@10 { - regulator-name= "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo8_reg: regulator@11 { - regulator-name= "vccio_wl"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo9_reg: regulator@12 { - regulator-name= "vcc_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - rk818_ldo10_reg: regulator@13 { - regulator-name= "rk818_ldo10"; - regulator-state-mem { - regulator-state-disabled; - }; - }; - }; -}; - -&ion_cma { - reg = <0x00000000 0x00000000>; /* 0MB */ -}; - -&rockchip_clocks_init { - rockchip,clocks-init-rate = - <&clk_gpll 576000000>, <&clk_core_b 792000000>, - <&clk_core_l 600000000>, <&clk_cpll 400000000>, - /*<&clk_npll 500000000>,*/ <&aclk_bus 150000000>, - <&hclk_bus 75000000>, <&pclk_bus 75000000>, - <&clk_crypto 150000000>, <&aclk_peri 150000000>, - <&hclk_peri 75000000>, <&pclk_peri 75000000>, - <&pclk_alive_pre 100000000>, <&pclk_pmu_pre 100000000>, - <&clk_cs 300000000>, <&clkin_trace 300000000>, - <&aclk_cci 600000000>, <&clk_mac 125000000>, - <&aclk_vio0 400000000>, <&hclk_vio 100000000>, - <&aclk_rga_pre 400000000>, <&clk_rga 400000000>, - <&clk_isp 400000000>, <&clk_edp 200000000>, - <&clk_gpu_core 400000000>, <&aclk_gpu_mem 400000000>, - <&aclk_gpu_cfg 400000000>, <&aclk_vepu 400000000>, - <&aclk_vdpu 400000000>, <&clk_hevc_core 300000000>, - <&clk_hevc_cabac 300000000>; -}; - -&rockchip_suspend { - rockchip,ctrbits = < - (0 - | RKPM_SLP_ARMOFF - | RKPM_SLP_PMU_PLLS_PWRDN - | RKPM_SLP_PMU_PMUALIVE_32K - | RKPM_SLP_SFT_PLLS_DEEP - | RKPM_SLP_PMU_DIS_OSC - | RKPM_SLP_SFT_PD_NBSCUS - ) - >; -}; diff --git a/arch/arm64/boot/dts/rk3368-tb_8846.dts b/arch/arm64/boot/dts/rk3368-tb_8846.dts deleted file mode 100644 index 3aeb6c66f5be..000000000000 --- a/arch/arm64/boot/dts/rk3368-tb_8846.dts +++ /dev/null @@ -1,1098 +0,0 @@ -/dts-v1/; - -#include -#include -#include "rk3368.dtsi" -#include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi" -//#include "../../../arm/boot/dts/lcd-b101ew05.dtsi" -#include "../../../arm/boot/dts/lcd-F402.dtsi" -#include "rk3368-cif-sensor.dtsi" -#include - -/ { - chosen { - bootargs = "earlyprintk=uart8250-32bit,0xff690000"; - }; - - fiq-debugger { - status = "okay"; - }; - - wireless-wlan { - compatible = "wlan-platdata"; - rockchip,grf = <&grf>; - - /* wifi_chip_type - wifi chip define - * ap6210, ap6330, ap6335 - * rtl8188eu, rtl8723bs, rtl8723bu - * esp8089 - */ - wifi_chip_type = "ap6335"; - - sdio_vref = <1800>; //1800mv or 3300mv - - //keep_wifi_power_on; - - //power_ctrl_by_pmu; - power_pmu_regulator = "act_ldo3"; - power_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - //vref_ctrl_enable; - //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>; - vref_pmu_regulator = "act_ldo3"; - vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>; - WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>; - //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - - status = "okay"; - }; - - wireless-bluetooth { - compatible = "bluetooth-platdata"; - - //wifi-bt-power-toggle; - - uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default","rts_gpio"; - pinctrl-0 = <&uart0_rts>; - pinctrl-1 = <&uart0_rts_gpio>; - - BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>; - BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>; - BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>; - BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>; - - status = "okay"; - }; - - hallsensor { - compatible = "hall_och165t"; - type = ; - irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000>; - brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240 - 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220 - 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 - 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 - 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 - 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 - 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 - 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 - 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 - 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 - 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 - 9 8 7 6 5 4 3 2 1 0>; - default-brightness-level = <200>; - enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>; - }; - - pwm_regulator { - compatible = "rockchip_pwm_regulator"; - pwms = <&pwm1 0 2000>; - rockchip,pwm_id= <1>; - rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>; - rockchip,pwm_voltage= <1000000>; - rockchip,pwm_min_voltage= <925000>; - rockchip,pwm_max_voltage= <1400000>; - rockchip,pwm_suspend_voltage= <950000>; - rockchip,pwm_coefficient= <475>; - regulators { - #address-cells = <1>; - #size-cells = <0>; - pwm_reg0: regulator@0 { - regulator-compatible = "pwm_dcdc1"; - regulator-name= "vdd_logic"; - regulator-min-microvolt = <925000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; - }; - }; - - codec_hdmi_i2s: codec-hdmi-i2s { - compatible = "hdmi-i2s"; - }; - - codec_hdmi_spdif: codec-hdmi-spdif { - compatible = "hdmi-spdif"; - }; - - rockchip-hdmi-i2s { - compatible = "rockchip-hdmi-i2s"; - dais { - dai0 { - audio-codec = <&codec_hdmi_i2s>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - rockchip-hdmi-spdif { - compatible = "rockchip-hdmi-spdif"; - dais { - dai0 { - audio-codec = <&codec_hdmi_spdif>; - audio-controller = <&spdif>; - }; - }; - }; - - rockchip-rt5631 { - compatible = "rockchip-rt5631"; - dais { - dai0 { - audio-codec = <&rt5631>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - rockchip-rt3224 { - compatible = "rockchip-rt3261"; - dais { - dai0 { - audio-codec = <&rt3261>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - dai1 { - audio-codec = <&rt3261>; - audio-controller = <&i2s0>; - format = "dsp_a"; - //continuous-clock; - bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - io-domains { - compatible = "rockchip,rk3368-io-voltage-domain"; - rockchip,grf = <&grf>; - rockchip,pmugrf = <&pmugrf>; - - /*GRF_IO_VSEL*/ - dvp-supply = <&ldo7_reg>; /*DVPIO_VDD*/ - flash0-supply = <&dcdc2_reg>; /*FLASH0_VDD*/ - wifi-supply = <&ldo7_reg>; /*APIO2_VDD*/ - audio-supply = <&dcdc2_reg>; /*APIO3_VDD*/ - sdcard-supply = <&ldo1_reg>; /*SDMMC0_VDD*/ - gpio30-supply = <&dcdc2_reg>; /*APIO1_VDD*/ - gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/ - - /*PMU_GRF_IO_VSEL*/ - pmu-supply = <&ldo5_reg>; /*PMUIO_VDD*/ - vop-supply = <&ldo5_reg>; /*LCDC_VDD*/ - }; - test-power{ - status = "okay"; - }; -}; - - -&gmac_clkin { - clock-frequency = <125000000>; -}; - -&gmac { -// pmu_regulator = "act_ldo5"; -// power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>; - reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>; -// phyirq-gpio = <&gpio0 GPIO_B1 GPIO_ACTIVE_LOW>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - clock_in_out = "input"; - tx_delay = <0x30>; - rx_delay = <0x10>; - status = "disabled"; //if want to use gmac, please set "okay" -}; - -&pinctrl { - //used for init some gpio - init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>; - - gpio0_gpio { - gpio0_c7: gpio0-c7 { - rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>; - }; - gpio0_a3: gpio0-a3 { - rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>; - }; - gpio0_c2: gpio0-c2 { - rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - gpio0_c1: gpio0-c1 { - rockchip,pins = <0 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - //to add - }; - -}; - -&nandc0 { -/*set "okay" both nand and emmc*/ -/*if using nand,emmc need disabled*/ - status = "okay"; -}; - -&nandc0reg { - status = "disabled"; /* unused now,set "disabled"*/ -}; - -&emmc { - clock-frequency = <100000000>; - clock-freq-min-max = <400000 100000000>; - - supports-highspeed; - supports-emmc; - bootpart-no-access; - - //supports-sd; - //supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board. - //caps2-mmc-hs200; - - ignore-pm-notify; - keep-power-in-suspend; - - //poll-hw-reset - status = "okay"; -}; - -&sdmmc { - clock-frequency = <37500000>; - clock-freq-min-max = <400000 37500000>; - supports-highspeed; - supports-sd; - broken-cd; - card-detect-delay = <200>; - - ignore-pm-notify; - keep-power-in-suspend; - - vmmc-supply = <&ldo1_reg>; - status = "okay"; -}; - -&sdio { - clock-frequency = <50000000>; - clock-freq-min-max = <200000 50000000>; - supports-highspeed; - supports-sdio; - ignore-pm-notify; - keep-power-in-suspend; - //cap-sdio-irq; - status = "okay"; -}; - -&spi0 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@00 { - compatible = "rockchip,spi_test_bus0_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - - }; - - spi_test@01 { - compatible = "rockchip,spi_test_bus0_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - spi-cpha; - spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&spi1 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@10 { - compatible = "rockchip,spi_test_bus1_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - spi_test@11 { - compatible = "rockchip,spi_test_bus1_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <1>; - }; - */ -}; - -&spi2 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@20 { - compatible = "rockchip,spi_test_bus2_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&uart_bt { - status = "okay"; - dma-names = "!tx", "!rx"; - pinctrl-0 = <&uart0_xfer &uart0_cts>; -}; - -&tsadc { - tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ - //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ - status = "okay"; -}; - -&i2c0 { - status = "okay"; - syr827: syr827@40 { - compatible = "silergy,syr82x"; - reg = <0x40>; - status = "okay"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr827_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-disabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - syr828: syr828@41 { - compatible = "silergy,syr82x"; - reg = <0x41>; - status = "disabled"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr828_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - act8846: act8846@5a { - reg = <0x5a>; - status = "okay"; - }; - - rk818: rk818@1c { - reg = <0x1c>; - status = "okay"; - }; - - CW2015@62 { - compatible = "cw201x"; - reg = <0x62>; - dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>; - bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>; - chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>; - bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32 - 0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52 - 0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB - 0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>; - is_dc_charge = <1>; - is_usb_charge = <0>; - }; - - rtc@51 { - compatible = "rtc,hym8563"; - reg = <0x51>; - irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>; - }; - -}; - -&i2c1 { - status = "okay"; - - mpu6050:mpu@68{ - compatible = "mpu6050"; - reg = <0x68>; - mpu-int_config = <0x10>; - mpu-level_shifter = <0>; - mpu-orientation = <0 1 0 1 0 0 0 0 1>; - orientation-x= <0>; - orientation-y= <1>; - orientation-z= <1>; - irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>; - mpu-debug = <0>; - }; - - - ak8963:compass@0d{ - compatible = "mpu_ak8963"; - reg = <0x0d>; - compass-bus = <0>; - compass-adapt_num = <0>; - compass-orientation = <1 0 0 0 1 0 0 0 1>; - orientation-x= <0>; - orientation-y= <0>; - orientation-z= <1>; - compass-debug = <1>; - status = "okay"; - }; - - rt3261: rt3261@1c { - compatible = "rt3261"; - reg = <0x1c>; - spk-num= <2>; - modem-input-mode = <1>; - lout-to-modem_mode = <1>; - spk-amplify = <2>; - }; -}; - -&i2c2 { - status = "okay"; - - rt5631: rt5631@1a { - compatible = "rt5631"; - reg = <0x1a>; - }; - - ts@01 { - compatible = "ct,vtl_ts"; - reg = <0x01>; - screen_max_x = <1536>; - screen_max_y = <2048>; - xy_swap = <1>; - x_reverse = <0>; - y_reverse = <0>; - x_mul = <2>; - y_mul = <2>; - bin_ver = <0>; - irq_gpio_number = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>; - rst_gpio_number = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>; - }; -}; - -&i2c3 { - status = "okay"; -}; - -&i2c4 { - status = "okay"; - - -}; - -&i2c5 { - status = "disable"; -}; - -&fb { - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <0>; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - -/*&lvds { - status = "okay"; - pinctrl-names = "lcdc", "sleep"; - pinctrl-0 = <&lcdc_lcdc>; - pinctrl-1 = <&lcdc_gpio>; -};*/ - -&lcdc { - status = "okay"; - backlight = <&backlight>; - rockchip,mirror = ; - rockchip,cabc_mode = <0>; - rockchip,fb-win-map = ; - power_ctr: power_ctr { - rockchip,debug = <0>; - lcd_en:lcd_en { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - - lcd_cs:lcd_cs { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - - /*lcd_rst:lcd_rst { - rockchip,power_type = ; - gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <5>; - };*/ - }; -}; - - -&hdmi { - status = "okay"; -}; - -&adc { - status = "okay"; - - rockchip_headset { - compatible = "rockchip_headset"; - headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&gpio0_c7>;//gpio0_c7 - io-channels = <&adc 2>; - /* - hook_gpio = ; - hook_down_type = ; //interrupt hook key down status - */ - }; - - key { - compatible = "rockchip,key"; - io-channels = <&adc 1>; - - vol-up-key { - linux,code = <115>; - label = "volume up"; - rockchip,adc_value = <1>; - }; - - vol-down-key { - linux,code = <114>; - label = "volume down"; - rockchip,adc_value = <170>; - }; - - power-key { - gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "power"; - gpio-key,wakeup; - }; - - menu-key { - linux,code = <59>; - label = "menu"; - rockchip,adc_value = <355>; - }; - - home-key { - linux,code = <102>; - label = "home"; - rockchip,adc_value = <746>; - }; - - back-key { - linux,code = <158>; - label = "back"; - rockchip,adc_value = <560>; - }; - - camera-key { - linux,code = <212>; - label = "camera"; - rockchip,adc_value = <450>; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&clk_core_b_dvfs_table { - operating-points = < - /* KHz uV */ - 216000 950000 - 312000 950000 - 408000 950000 - 600000 950000 - 696000 950000 - 816000 975000 - 1008000 1050000 - 1200000 1150000 - 1296000 1225000 - 1416000 1300000 - 1512000 1350000 - >; - status = "okay"; -}; - -&clk_core_l_dvfs_table { - operating-points = < - /* KHz uV */ - 216000 950000 - 312000 950000 - 408000 950000 - 600000 950000 - 696000 975000 - 816000 1025000 - 1008000 1125000 - 1200000 1225000 - >; - status = "okay"; -}; - -&clk_gpu_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 950000 - 288000 1025000 - 400000 1050000 - 576000 1200000 - >; -}; - -&clk_ddr_dvfs_table { - operating-points = < - /* KHz uV */ - 96000 950000 - 192000 950000 - 300000 950000 - 324000 975000 - 396000 1000000 - 528000 1050000 - 600000 1075000 - 696000 1100000 - 792000 1125000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 600000 - SYS_STATUS_SUSPEND 192000 - SYS_STATUS_VIDEO_1080P 324000 - SYS_STATUS_VIDEO_4K 600000 - SYS_STATUS_PERFORMANCE 600000 - SYS_STATUS_DUALVIEW 600000 - SYS_STATUS_BOOST 396000 - SYS_STATUS_ISP 528000 - >; - auto-freq-table = < - 240000 - 324000 - 396000 - 528000 - >; - auto-freq=<0>; - status="okay"; -}; - -&dwc_control_usb { - host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>; - otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>; - - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; - }; - -/include/ "../../../arm/boot/dts/act8846.dtsi" -&act8846 { - gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>; - act8846,system-power-controller; - - regulators { - - dcdc1_reg: regulator@0{ - regulator-name= "act_dcdc1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - regulator-boot-on; - }; - - dcdc2_reg: regulator@1 { - regulator-name= "vccio"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - dcdc3_reg: regulator@2 { - regulator-name= "vdd_logic"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1000000>; - }; - - }; - - dcdc4_reg: regulator@3 { - regulator-name= "act_dcdc4"; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <2000000>; - }; - }; - - ldo1_reg: regulator@4 { - regulator-name= "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo2_reg: regulator@5 { - regulator-name= "act_ldo2"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - }; - - ldo3_reg: regulator@6 { - regulator-name= "act_ldo3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo4_reg:regulator@7 { - regulator-name= "act_ldo4"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo5_reg: regulator@8 { - regulator-name= "act_ldo5"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo6_reg: regulator@9 { - regulator-name= "act_ldo6"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - }; - - }; - - ldo7_reg: regulator@10 { - regulator-name= "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - }; - - }; - - ldo8_reg: regulator@11 { - regulator-name= "act_ldo8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - }; - }; -}; - -/include/ "../../../arm/boot/dts/rk818.dtsi" -&rk818 { - gpios =<&gpio0 GPIO_A1 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>; - rk818,system-power-controller; - pinctrl-names = "default"; - pinctrl-0 = <&gpio0_c1>; -rk818,support_dc_chg = <1>;/*1:dc chg; 0:usb chg*/ - regulators { - - rk818_dcdc1_reg: regulator@0{ - regulator-name= "vdd_logic";/*vcc arm*/ - regulator-min-microvolt = <700000>;/*<725000>;*/ - regulator-max-microvolt = <1500000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv =<1100000>; - }; - }; - - rk818_dcdc2_reg: regulator@1 { - regulator-name= "rk818_dcdc2";/*vcc gpu*/ - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <1200000>; - }; - }; - - rk818_dcdc3_reg: regulator@2 { - regulator-name= "rk818_dcdc3"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <1200000>; - }; - }; - - rk818_dcdc4_reg: regulator@3 { - regulator-name= "vccio"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <3000000>; - }; - }; - - rk818_ldo1_reg: regulator@4 { - regulator-name= "rk818_ldo1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - rk818_ldo2_reg: regulator@5 { - regulator-name= "rk818_ldo2"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3000000>; - }; - }; - - rk818_ldo3_reg: regulator@6 { - regulator-name= "rk818_ldo3"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1000000>; - }; - }; - - rk818_ldo4_reg:regulator@7 { - regulator-name= "rk818_ldo4"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo5_reg: regulator@8 { - regulator-name= "rk818_ldo5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo6_reg: regulator@9 { - regulator-name= "rk818_ldo6"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <1000000>; - }; - }; - - rk818_ldo7_reg: regulator@10 { - regulator-name= "rk818_ldo7"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo8_reg: regulator@11 { - regulator-name= "rk818_ldo8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo9_reg: regulator@12 { - regulator-name= "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - rk818_ldo10_reg: regulator@13 { - regulator-name= "rk818_ldo10"; - regulator-state-mem { - regulator-state-disabled; - }; - }; - }; - - battery { - ocv_table = <3350 3677 3693 3719 3752 - 3770 3775 3778 3785 3796 - 3812 3839 3881 3907 3933 - 3958 3978 4033 4087 4123 - 4174 >; - design_capacity = <8650>; - design_qmax = <8800>; - max_overcharge = <100>; - max_input_currentmA = <3000>; - max_chrg_currentmA = <1800>; - max_charge_voltagemV = <4200>; - sleep_enter_current = <600>; - sleep_exit_current = <600>; - power_off_thresd = <3400>; - chrg_diff_voltagemV = <0>; - virtual_power = <1>; - support_usb_adp = <0>; - support_dc_adp = <1>; - dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>; - }; -}; - - -&ion_cma { - reg = <0x00000000 0x00000000>; /* 0MB */ -}; - -&rk3368_cif_sensor{ - status = "okay"; -}; - -&rockchip_suspend { - rockchip,ctrbits = < - (0 - | RKPM_SLP_ARMOFF - | RKPM_SLP_PMU_PLLS_PWRDN - | RKPM_SLP_PMU_PMUALIVE_32K - | RKPM_SLP_SFT_PLLS_DEEP - | RKPM_SLP_PMU_DIS_OSC - | RKPM_SLP_SFT_PD_NBSCUS - ) - >; - }; - -/* -&dwc_control_usb { - usb_uart { - status = "disabled"; - }; -}; -*/ diff --git a/arch/arm64/boot/dts/rk3368-tb_mipi.dts b/arch/arm64/boot/dts/rk3368-tb_mipi.dts deleted file mode 100644 index 832cbfb2fb89..000000000000 --- a/arch/arm64/boot/dts/rk3368-tb_mipi.dts +++ /dev/null @@ -1,1123 +0,0 @@ -/dts-v1/; - -#include -#include -#include "rk3368.dtsi" -#include "../../../arm/boot/dts/vtl_ts_sdk8846.dtsi" -//#include "../../../arm/boot/dts/lcd-b101ew05.dtsi" -#include "../../../arm/boot/dts/lcd-tv080wum-mipi.dtsi" -#include "rk3368-cif-sensor.dtsi" -#include - -/ { - chosen { - bootargs = "earlyprintk=uart8250-32bit,0xff690000"; - }; - - wireless-wlan { - compatible = "wlan-platdata"; - rockchip,grf = <&grf>; - - /* wifi_chip_type - wifi chip define - * ap6210, ap6330, ap6335 - * rtl8188eu, rtl8723bs, rtl8723bu - * esp8089 - */ - wifi_chip_type = "ap6335"; - - sdio_vref = <1800>; //1800mv or 3300mv - - //keep_wifi_power_on; - - //power_ctrl_by_pmu; - power_pmu_regulator = "act_ldo3"; - power_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - //vref_ctrl_enable; - //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>; - vref_pmu_regulator = "act_ldo3"; - vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - WIFI,poweren_gpio = <&gpio3 GPIO_A4 GPIO_ACTIVE_HIGH>; - WIFI,host_wake_irq = <&gpio3 GPIO_A6 GPIO_ACTIVE_HIGH>; - //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - - status = "okay"; - }; - - wireless-bluetooth { - compatible = "bluetooth-platdata"; - - //wifi-bt-power-toggle; - - uart_rts_gpios = <&gpio2 GPIO_D3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default","rts_gpio"; - pinctrl-0 = <&uart0_rts>; - pinctrl-1 = <&uart0_rts_gpio>; - - BT,power_gpio = <&gpio3 GPIO_A3 GPIO_ACTIVE_HIGH>; - BT,reset_gpio = <&gpio3 GPIO_A5 GPIO_ACTIVE_HIGH>; - BT,wake_gpio = <&gpio3 GPIO_A2 GPIO_ACTIVE_HIGH>; - BT,wake_host_irq = <&gpio3 GPIO_A7 GPIO_ACTIVE_HIGH>; - - status = "okay"; - }; - - hallsensor { - compatible = "hall_och165t"; - type = ; - irq-gpio = <&gpio0 GPIO_C0 IRQ_TYPE_EDGE_BOTH>; - }; - - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000>; - brightness-levels = <255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240 - 239 238 237 236 235 234 233 232 231 230 229 228 227 226 225 224 223 222 221 220 - 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 - 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 - 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 - 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 - 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 - 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 - 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 - 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 - 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 - 9 8 7 6 5 4 3 2 1 0>; - default-brightness-level = <200>; - enable-gpios = <&gpio0 GPIO_C4 GPIO_ACTIVE_HIGH>; - }; - - pwm_regulator { - compatible = "rockchip_pwm_regulator"; - pwms = <&pwm1 0 2000>; - rockchip,pwm_id= <1>; - rockchip,pwm_voltage_map= <925000 950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000>; - rockchip,pwm_voltage= <1000000>; - rockchip,pwm_min_voltage= <925000>; - rockchip,pwm_max_voltage= <1400000>; - rockchip,pwm_suspend_voltage= <950000>; - rockchip,pwm_coefficient= <475>; - regulators { - #address-cells = <1>; - #size-cells = <0>; - pwm_reg0: regulator@0 { - regulator-compatible = "pwm_dcdc1"; - regulator-name= "vdd_logic"; - regulator-min-microvolt = <925000>; - regulator-max-microvolt = <1400000>; - regulator-always-on; - regulator-boot-on; - }; - }; - }; - - codec_hdmi_i2s: codec-hdmi-i2s { - compatible = "hdmi-i2s"; - }; - - codec_hdmi_spdif: codec-hdmi-spdif { - compatible = "hdmi-spdif"; - }; - - rockchip-hdmi-i2s { - compatible = "rockchip-hdmi-i2s"; - dais { - dai0 { - audio-codec = <&codec_hdmi_i2s>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - rockchip-hdmi-spdif { - compatible = "rockchip-hdmi-spdif"; - dais { - dai0 { - audio-codec = <&codec_hdmi_spdif>; - audio-controller = <&spdif>; - }; - }; - }; - - rockchip-rt5631 { - compatible = "rockchip-rt5631"; - dais { - dai0 { - audio-codec = <&rt5631>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - rockchip-rt3224 { - compatible = "rockchip-rt3261"; - dais { - dai0 { - audio-codec = <&rt3261>; - audio-controller = <&i2s0>; - format = "i2s"; - //continuous-clock; - //bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - dai1 { - audio-codec = <&rt3261>; - audio-controller = <&i2s0>; - format = "dsp_a"; - //continuous-clock; - bitclock-inversion; - //frame-inversion; - //bitclock-master; - //frame-master; - }; - }; - }; - - io-domains { - compatible = "rockchip,rk3368-io-voltage-domain"; - rockchip,grf = <&grf>; - rockchip,pmugrf = <&pmugrf>; - - /*GRF_IO_VSEL*/ - dvp-supply = <&ldo7_reg>; /*DVPIO_VDD*/ - flash0-supply = <&dcdc2_reg>; /*FLASH0_VDD*/ - wifi-supply = <&ldo7_reg>; /*APIO2_VDD*/ - audio-supply = <&dcdc2_reg>; /*APIO3_VDD*/ - sdcard-supply = <&ldo1_reg>; /*SDMMC0_VDD*/ - gpio30-supply = <&dcdc2_reg>; /*APIO1_VDD*/ - gpio1830-supply = <&dcdc2_reg>;/*ADIO4_VDD*/ - - /*PMU_GRF_IO_VSEL*/ - pmu-supply = <&ldo5_reg>; /*PMUIO_VDD*/ - vop-supply = <&ldo5_reg>; /*LCDC_VDD*/ - }; - test-power{ - status = "okay"; - }; -}; - - -&gmac_clkin { - clock-frequency = <125000000>; -}; - -&gmac { -// pmu_regulator = "act_ldo5"; -// power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>; - reset-gpio = <&gpio3 GPIO_B4 GPIO_ACTIVE_LOW>; -// phyirq-gpio = <&gpio0 GPIO_B1 GPIO_ACTIVE_LOW>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - clock_in_out = "input"; - tx_delay = <0x30>; - rx_delay = <0x10>; - status = "disabled"; //if want to use gmac, please set "okay" -}; - -&pinctrl { - //used for init some gpio - init-gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>; - - gpio0_gpio { - gpio0_c7: gpio0-c7 { - rockchip,pins = <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_down>; - }; - gpio0_a3: gpio0-a3 { - rockchip,pins = <0 GPIO_A3 RK_FUNC_3 &pcfg_pull_none>; - }; - gpio0_c2: gpio0-c2 { - rockchip,pins = <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - gpio0_c1: gpio0-c1 { - rockchip,pins = <0 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - //to add - }; - -}; - -&nandc0 { -/*set "okay" both nand and emmc*/ -/*if using nand,emmc need disabled*/ - status = "okay"; -}; - -&nandc0reg { - status = "disabled"; /* unused now,set "disabled"*/ -}; - -&emmc { - clock-frequency = <100000000>; - clock-freq-min-max = <400000 100000000>; - - supports-highspeed; - supports-emmc; - bootpart-no-access; - - //supports-sd; - //supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board. - //caps2-mmc-hs200; - - ignore-pm-notify; - keep-power-in-suspend; - - //poll-hw-reset - status = "okay"; -}; - -&sdmmc { - clock-frequency = <37500000>; - clock-freq-min-max = <400000 37500000>; - supports-highspeed; - supports-sd; - broken-cd; - card-detect-delay = <200>; - - ignore-pm-notify; - keep-power-in-suspend; - - vmmc-supply = <&ldo1_reg>; - status = "okay"; -}; - -&sdio { - clock-frequency = <50000000>; - clock-freq-min-max = <200000 50000000>; - supports-highspeed; - supports-sdio; - ignore-pm-notify; - keep-power-in-suspend; - //cap-sdio-irq; - status = "okay"; -}; - -&spi0 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@00 { - compatible = "rockchip,spi_test_bus0_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - - }; - - spi_test@01 { - compatible = "rockchip,spi_test_bus0_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - spi-cpha; - spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&spi1 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@10 { - compatible = "rockchip,spi_test_bus1_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - spi_test@11 { - compatible = "rockchip,spi_test_bus1_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <1>; - }; - */ -}; - -&spi2 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@20 { - compatible = "rockchip,spi_test_bus2_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&uart_dbg { - status = "okay"; -}; - -&uart_bt { - status = "okay"; - dma-names = "!tx", "!rx"; - pinctrl-0 = <&uart0_xfer &uart0_cts>; -}; - -&tsadc { - tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ - //tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ - status = "okay"; -}; - -&i2c0 { - status = "okay"; - syr827: syr827@40 { - compatible = "silergy,syr82x"; - reg = <0x40>; - status = "okay"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr827_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-disabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - syr828: syr828@41 { - compatible = "silergy,syr82x"; - reg = <0x41>; - status = "disabled"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - syr828_dc1: regulator@0 { - reg = <0>; - regulator-compatible = "syr82x_dcdc1"; - regulator-name = "vdd_gpu"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1500000>; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <900000>; - }; - }; - }; - }; - act8846: act8846@5a { - reg = <0x5a>; - status = "okay"; - }; - - rk818: rk818@1c { - reg = <0x1c>; - status = "okay"; - }; - - CW2015@62 { - compatible = "cw201x"; - reg = <0x62>; - dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>; - bat_low_gpio = <&gpio0 GPIO_C2 GPIO_ACTIVE_LOW>; - chg_ok_gpio = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>; - bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 0x48 0x44 0x44 0x46 0x49 0x48 0x32 - 0x24 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 0x4D 0x52 0x52 - 0x57 0x3D 0x1B 0x6A 0x2D 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB - 0xCB 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>; - is_dc_charge = <1>; - is_usb_charge = <0>; - }; - - rtc@51 { - compatible = "rtc,hym8563"; - reg = <0x51>; - irq_gpio = <&gpio0 GPIO_A1 IRQ_TYPE_EDGE_FALLING>; - }; - -}; - -&i2c1 { - status = "okay"; - - mpu6050:mpu@68{ - compatible = "mpu6050"; - reg = <0x68>; - mpu-int_config = <0x10>; - mpu-level_shifter = <0>; - mpu-orientation = <0 1 0 1 0 0 0 0 1>; - orientation-x= <0>; - orientation-y= <1>; - orientation-z= <1>; - irq-gpio = <&gpio3 GPIO_B6 IRQ_TYPE_LEVEL_LOW>; - mpu-debug = <0>; - }; - - - ak8963:compass@0d{ - compatible = "mpu_ak8963"; - reg = <0x0d>; - compass-bus = <0>; - compass-adapt_num = <0>; - compass-orientation = <1 0 0 0 1 0 0 0 1>; - orientation-x= <0>; - orientation-y= <0>; - orientation-z= <1>; - compass-debug = <1>; - status = "okay"; - }; - - rt3261: rt3261@1c { - compatible = "rt3261"; - reg = <0x1c>; - spk-num= <2>; - modem-input-mode = <1>; - lout-to-modem_mode = <1>; - spk-amplify = <2>; - }; -}; - -&i2c2 { - status = "okay"; - - rt5631: rt5631@1a { - compatible = "rt5631"; - reg = <0x1a>; - }; - - touchscreen@14 { - compatible = "goodix,gt9xx"; - reg = <0x14>; - touch-gpio = <&gpio0 GPIO_B4 IRQ_TYPE_LEVEL_LOW>; - reset-gpio = <&gpio0 GPIO_B3 GPIO_ACTIVE_HIGH>; - max-x = <1200>; - max-y = <1900>; - tp-size = <911>; - }; -}; - -&i2c3 { - status = "okay"; -}; - -&i2c4 { - status = "okay"; - - -}; - -&i2c5 { - status = "disable"; -}; - -&fb { - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <0>; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - -/*&lvds { - status = "okay"; - pinctrl-names = "lcdc", "sleep"; - pinctrl-0 = <&lcdc_lcdc>; - pinctrl-1 = <&lcdc_gpio>; -};*/ - -&lcdc { - status = "okay"; - backlight = <&backlight>; - rockchip,mirror = ; - rockchip,cabc_mode = <0>; - rockchip,fb-win-map = ; - power_ctr: power_ctr { - rockchip,debug = <0>; - lcd_en:lcd_en { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - - lcd_cs:lcd_cs { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_C5 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - - /*lcd_rst:lcd_rst { - rockchip,power_type = ; - gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>; - rockchip,delay = <5>; - };*/ - }; -}; - - -&hdmi { - status = "okay"; -}; - -&adc { - status = "okay"; - - rockchip_headset { - compatible = "rockchip_headset"; - headset_gpio = <&gpio0 GPIO_C7 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&gpio0_c7>;//gpio0_c7 - rockchip,headset_wakeup = <0>; - /* - hook_gpio = ; - hook_down_type = ; //interrupt hook key down status - */ - }; - - key { - compatible = "rockchip,key"; - io-channels = <&adc 1>; - - vol-up-key { - linux,code = <115>; - label = "volume up"; - rockchip,adc_value = <1>; - }; - - vol-down-key { - linux,code = <114>; - label = "volume down"; - rockchip,adc_value = <170>; - }; - - power-key { - gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "power"; - gpio-key,wakeup; - }; - - menu-key { - linux,code = <59>; - label = "menu"; - rockchip,adc_value = <355>; - }; - - home-key { - linux,code = <102>; - label = "home"; - rockchip,adc_value = <746>; - }; - - back-key { - linux,code = <158>; - label = "back"; - rockchip,adc_value = <560>; - }; - - camera-key { - linux,code = <212>; - label = "camera"; - rockchip,adc_value = <450>; - }; - }; -}; - -&pwm0 { - status = "okay"; -}; - -&clk_core_b_dvfs_table { - operating-points = < - /* KHz uV */ - 216000 950000 - 312000 950000 - 408000 950000 - 600000 950000 - 696000 950000 - 816000 975000 - 1008000 1050000 - 1200000 1150000 - 1296000 1225000 - 1416000 1300000 - 1512000 1350000 - >; - support-pvtm = <1>; - pvtm-operating-points = < - /* KHz uV margin(uV)*/ - 216000 950000 25000 - 312000 950000 25000 - 408000 950000 25000 - 600000 950000 25000 - 696000 950000 25000 - 816000 975000 25000 - 1008000 1050000 25000 - 1200000 1150000 25000 - 1296000 1225000 25000 - 1416000 1300000 25000 - 1512000 1350000 25000 - >; - status = "okay"; -}; - -&clk_core_l_dvfs_table { - operating-points = < - /* KHz uV */ - 216000 950000 - 312000 950000 - 408000 950000 - 600000 950000 - 696000 975000 - 816000 1025000 - 1008000 1125000 - 1200000 1225000 - >; - support-pvtm = <1>; - pvtm-operating-points = < - /* KHz uV margin(uV)*/ - 216000 950000 25000 - 312000 950000 25000 - 408000 950000 25000 - 600000 950000 25000 - 696000 975000 25000 - 816000 1025000 25000 - 1008000 1125000 25000 - 1200000 1225000 25000 - >; - status = "okay"; -}; - -&clk_gpu_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 950000 - 288000 1025000 - 400000 1050000 - 576000 1200000 - >; -}; - -&clk_ddr_dvfs_table { - operating-points = < - /* KHz uV */ - 96000 950000 - 192000 950000 - 300000 950000 - 324000 975000 - 396000 1000000 - 528000 1050000 - 600000 1075000 - 696000 1100000 - 792000 1125000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 600000 - SYS_STATUS_SUSPEND 192000 - SYS_STATUS_VIDEO_1080P 324000 - SYS_STATUS_VIDEO_4K 600000 - SYS_STATUS_PERFORMANCE 600000 - SYS_STATUS_DUALVIEW 600000 - SYS_STATUS_BOOST 396000 - SYS_STATUS_ISP 528000 - >; - auto-freq-table = < - 240000 - 324000 - 396000 - 528000 - >; - auto-freq=<0>; - status="okay"; -}; - -&dwc_control_usb { - host_drv_gpio = <&gpio0 GPIO_A4 GPIO_ACTIVE_LOW>; - otg_drv_gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>; - - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; - }; - -/include/ "../../../arm/boot/dts/act8846.dtsi" -&act8846 { - gpios =<&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>,<&gpio0 GPIO_A3 GPIO_ACTIVE_HIGH>; - act8846,system-power-controller; - - regulators { - - dcdc1_reg: regulator@0{ - regulator-name= "act_dcdc1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-always-on; - regulator-boot-on; - }; - - dcdc2_reg: regulator@1 { - regulator-name= "vccio"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - dcdc3_reg: regulator@2 { - regulator-name= "vdd_logic"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1000000>; - }; - - }; - - dcdc4_reg: regulator@3 { - regulator-name= "act_dcdc4"; - regulator-min-microvolt = <2000000>; - regulator-max-microvolt = <2000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <2000000>; - }; - }; - - ldo1_reg: regulator@4 { - regulator-name= "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo2_reg: regulator@5 { - regulator-name= "act_ldo2"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - }; - - ldo3_reg: regulator@6 { - regulator-name= "act_ldo3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo4_reg:regulator@7 { - regulator-name= "act_ldo4"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo5_reg: regulator@8 { - regulator-name= "act_ldo5"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - }; - - ldo6_reg: regulator@9 { - regulator-name= "act_ldo6"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - }; - - }; - - ldo7_reg: regulator@10 { - regulator-name= "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - }; - - }; - - ldo8_reg: regulator@11 { - regulator-name= "act_ldo8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - }; - }; -}; - -/include/ "../../../arm/boot/dts/rk818.dtsi" -&rk818 { - gpios =<&gpio0 GPIO_A1 GPIO_ACTIVE_HIGH>,<&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>; - rk818,system-power-controller; - pinctrl-names = "default"; - pinctrl-0 = <&gpio0_c1>; -rk818,support_dc_chg = <1>;/*1:dc chg; 0:usb chg*/ - regulators { - - rk818_dcdc1_reg: regulator@0{ - regulator-name= "vdd_logic";/*vcc arm*/ - regulator-min-microvolt = <700000>;/*<725000>;*/ - regulator-max-microvolt = <1500000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv =<1100000>; - }; - }; - - rk818_dcdc2_reg: regulator@1 { - regulator-name= "rk818_dcdc2";/*vcc gpu*/ - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <1200000>; - }; - }; - - rk818_dcdc3_reg: regulator@2 { - regulator-name= "rk818_dcdc3"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <1200000>; - }; - }; - - rk818_dcdc4_reg: regulator@3 { - regulator-name= "vccio"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <3000000>; - }; - }; - - rk818_ldo1_reg: regulator@4 { - regulator-name= "rk818_ldo1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - rk818_ldo2_reg: regulator@5 { - regulator-name= "vcc_tp"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3000000>; - }; - }; - - rk818_ldo3_reg: regulator@6 { - regulator-name= "rk818_ldo3"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1000000>; - }; - }; - - rk818_ldo4_reg:regulator@7 { - regulator-name= "rk818_ldo4"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo5_reg: regulator@8 { - regulator-name= "rk818_ldo5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo6_reg: regulator@9 { - regulator-name= "rk818_ldo6"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-disabled; - regulator-state-uv = <1000000>; - }; - }; - - rk818_ldo7_reg: regulator@10 { - regulator-name= "rk818_ldo7"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo8_reg: regulator@11 { - regulator-name= "rk818_ldo8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo9_reg: regulator@12 { - regulator-name= "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - rk818_ldo10_reg: regulator@13 { - regulator-name= "rk818_ldo10"; - regulator-state-mem { - regulator-state-disabled; - }; - }; - }; - - battery { - ocv_table = <3350 3677 3693 3719 3752 - 3770 3775 3778 3785 3796 - 3812 3839 3881 3907 3933 - 3958 3978 4033 4087 4123 - 4174 >; - design_capacity = <8650>; - design_qmax = <8800>; - max_overcharge = <100>; - max_input_currentmA = <3000>; - max_chrg_currentmA = <1800>; - max_charge_voltagemV = <4200>; - sleep_enter_current = <600>; - sleep_exit_current = <600>; - power_off_thresd = <3400>; - chrg_diff_voltagemV = <0>; - virtual_power = <1>; - support_usb_adp = <0>; - support_dc_adp = <1>; - dc_det_gpio = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>; - }; -}; - - -&ion_cma { - reg = <0x00000000 0x00000000>; /* 0MB */ -}; - -&rk3368_cif_sensor{ - status = "okay"; -}; - -&rockchip_suspend { - rockchip,ctrbits = < - (0 - | RKPM_SLP_ARMOFF - | RKPM_SLP_PMU_PLLS_PWRDN - | RKPM_SLP_PMU_PMUALIVE_32K - | RKPM_SLP_SFT_PLLS_DEEP - | RKPM_SLP_PMU_DIS_OSC - | RKPM_SLP_SFT_PD_NBSCUS - ) - >; - }; - -&dsihost0{ - status = "okay"; -}; -/* -&dwc_control_usb { - usb_uart { - status = "disabled"; - }; -}; -*/ diff --git a/arch/arm64/boot/dts/rk3368-thermal.dtsi b/arch/arm64/boot/dts/rk3368-thermal.dtsi deleted file mode 100644 index 617329585570..000000000000 --- a/arch/arm64/boot/dts/rk3368-thermal.dtsi +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Device Tree Source for RK3288 SoC thermal - * - * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include - -cpu_thermal: cpu_thermal { - polling-delay-passive = <1000>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&tsadc 0>; - linux,hwmon; - - trips { - cpu_alert0: cpu_alert0 { - temperature = <80000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - cpu_crit: cpu_crit { - temperature = <115000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; -/* - cooling-maps { - map0 { - trip = <&cpu_alert0>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; -*/ -}; - -gpu_thermal: gpu_thermal { - polling-delay-passive = <1000>; /* milliseconds */ - polling-delay = <5000>; /* milliseconds */ - - /* sensor ID */ - thermal-sensors = <&tsadc 1>; - linux,hwmon; - - trips { - gpu_alert0: gpu_alert0 { - temperature = <80000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "passive"; - }; - gpu_crit: gpu_crit { - temperature = <115000>; /* millicelsius */ - hysteresis = <2000>; /* millicelsius */ - type = "critical"; - }; - }; - -/* - cooling-maps { - map0 { - trip = <&gpu_alert0>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - }; - }; -*/ -}; diff --git a/arch/arm64/boot/dts/rk3368.dtsi b/arch/arm64/boot/dts/rk3368.dtsi deleted file mode 100644 index f4dc91a3e8cd..000000000000 --- a/arch/arm64/boot/dts/rk3368.dtsi +++ /dev/null @@ -1,2238 +0,0 @@ -#include -#include -#include -#include -#include -#include - -#include "rk3368-clocks.dtsi" -#include - -/ { - compatible = "rockchip,rk3368"; - - rockchip,sram = <&sram>; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - serial0 = &uart_bt; - serial1 = &uart_bb; - serial2 = &uart_dbg; - serial3 = &uart_gps; - serial4 = &uart_exp; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - lcdc = &lcdc; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - idle-states { - entry-method = "arm,psci"; - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <0x3fffffff>; - exit-latency-us = <0x40000000>; - min-residency-us = <0xffffffff>; - }; - }; - - little0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; - reg = <0x0 0x0>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - }; - little1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; - reg = <0x0 0x1>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - }; - little2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; - reg = <0x0 0x2>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - }; - little3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; - reg = <0x0 0x3>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - }; - big0: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; - reg = <0x0 0x100>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - }; - big1: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; - reg = <0x0 0x101>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - }; - big2: cpu@102 { - device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; - reg = <0x0 0x102>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - }; - big3: cpu@103 { - device_type = "cpu"; - compatible = "arm,cortex-a53", "arm,armv8"; - reg = <0x0 0x103>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; - }; - - cpu-map { - cluster0 { - core0 { - cpu = <&big0>; - }; - core1 { - cpu = <&big1>; - }; - core2 { - cpu = <&big2>; - }; - core3 { - cpu = <&big3>; - }; - }; - cluster1 { - core0 { - cpu = <&little0>; - }; - core1 { - cpu = <&little1>; - }; - core2 { - cpu = <&little2>; - }; - core3 { - cpu = <&little3>; - }; - }; - }; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - - gic: interrupt-controller@ffb70000 { - compatible = "arm,cortex-a15-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xffb71000 0 0x1000>, - <0x0 0xffb72000 0 0x1000>; - }; - - ddrpctl: syscon@ff610000 { - compatible = "rockchip,rk3368-ddrpctl", "syscon"; - reg = <0x0 0xff610000 0x0 0x400>; - }; - - pmu: syscon@ff730000 { - compatible = "rockchip,rk3368-pmu", "rockchip,pmu", "syscon"; - reg = <0x0 0xff730000 0x0 0x1000>; - }; - - pmugrf: syscon@ff738000 { - compatible = "rockchip,rk3368-pmugrf", "rockchip,pmugrf", "syscon"; - reg = <0x0 0xff738000 0x0 0x1000>; - }; - - sgrf: syscon@ff740000 { - compatible = "rockchip,rk3368-sgrf", "rockchip,sgrf", "syscon"; - reg = <0x0 0xff740000 0x0 0x1000>; - - }; - - cru: syscon@ff760000 { - compatible = "rockchip,rk3368-cru", "rockchip,cru", "syscon"; - reg = <0x0 0xff760000 0x0 0x1000>; - }; - - grf: syscon@ff770000 { - compatible = "rockchip,rk3368-grf", "rockchip,grf", "syscon"; - reg = <0x0 0xff770000 0x0 0x1000>; - }; - - msch: syscon@ffac0000 { - compatible = "rockchip,rk3368-msch", "rockchip,msch", "syscon"; - reg = <0x0 0xffac0000 0x0 0x3000>; - }; - - arm-pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = , - , - , - , - , - , - , - ; - }; - - cpu_axi_bus: cpu_axi_bus { - compatible = "rockchip,cpu_axi_bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - qos { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - dmac { - reg = <0x0 0xffa80000 0x0 0x20>; - }; - crypto { - reg = <0x0 0xffa80080 0x0 0x20>; - }; - tsp { - reg = <0x0 0xffa80280 0x0 0x20>; - }; - bus_cpup { - reg = <0x0 0xffa90000 0x0 0x20>; - }; - cci_r { - reg = <0x0 0xffaa0000 0x0 0x20>; - }; - cci_w { - reg = <0x0 0xffaa0080 0x0 0x20>; - }; - peri { - reg = <0x0 0xffab0000 0x0 0x20>; - rockchip,priority = <2 2>; - }; - iep { - reg = <0x0 0xffad0000 0x0 0x20>; - }; - isp_r0 { - reg = <0x0 0xffad0080 0x0 0x20>; - }; - isp_r1 { - reg = <0x0 0xffad0100 0x0 0x20>; - }; - isp_w0 { - reg = <0x0 0xffad0180 0x0 0x20>; - rockchip,priority = <2 2>; - }; - isp_w1 { - reg = <0x0 0xffad0200 0x0 0x20>; - rockchip,priority = <2 2>; - }; - vip { - reg = <0x0 0xffad0280 0x0 0x20>; - }; - vop { - reg = <0x0 0xffad0300 0x0 0x20>; - rockchip,priority = <2 2>; - }; - rga_r { - reg = <0x0 0xffad0380 0x0 0x20>; - }; - rga_w { - reg = <0x0 0xffad0400 0x0 0x20>; - }; - hevc_r { - reg = <0x0 0xffae0000 0x0 0x20>; - }; - vpu_r { - reg = <0x0 0xffae0100 0x0 0x20>; - }; - vpu_w { - reg = <0x0 0xffae0180 0x0 0x20>; - }; - gpu { - reg = <0x0 0xffaf0000 0x0 0x20>; - }; - }; - - msch { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - msch { - reg = <0x0 0xffac0000 0x0 0x3c>; - rockchip,read-latency = <0x34>; - }; - }; - }; - - efuse_256@ffb00000 { - compatible = "rockchip,rk3368-efuse-256"; - reg = <0x0 0xffb00000 0x0 0x8>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - clock-frequency = <24000000>; - }; - - timer@ff810000 { - compatible = "rockchip,timer"; - reg = <0x0 0xff810000 0x0 0x20>; - interrupts = ; - rockchip,broadcast = <1>; - }; - - timer@ff810020 { - compatible = "rockchip,timer"; - reg = <0x0 0xff810020 0x0 0x20>; - interrupts = ; - rockchip,percpu = <0>; - }; - - sram: sram@ff8c0000 { - compatible = "mmio-sram"; - reg = <0x0 0xff8c0000 0x0 0xf000>; /* 60K (reserved 4K for mailbox)*/ - map-exec; - }; - - watchdog: wdt@ff800000 { - compatible = "rockchip,watch dog"; - reg = <0x0 0xff800000 0x0 0x100>; - clocks = <&pclk_alive_pre>; - clock-names = "pclk_wdt"; - interrupts = ; - rockchip,irq = <1>; - rockchip,timeout = <60>; - rockchip,atboot = <1>; - rockchip,debug = <0>; - status = "disabled"; - }; - - amba { - #address-cells = <2>; - #size-cells = <2>; - compatible = "arm,amba-bus"; - interrupt-parent = <&gic>; - ranges; - - pdma0: pdma@ff600000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff600000 0x0 0x4000>; - clocks = <&clk_gates12 11>; - clock-names = "apb_pclk"; - interrupts = , - ; - #dma-cells = <1>; - - }; - - pdma1: pdma@ff250000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff250000 0x0 0x4000>; - clocks = <&clk_gates19 3>; - clock-names = "apb_pclk"; - interrupts = , - ; - #dma-cells = <1>; - }; - }; - - reset: reset@ff760300{ - compatible = "rockchip,reset"; - reg = <0x0 0xff760300 0x0 0x38>; - rockchip,reset-flag = ; - #reset-cells = <1>; - }; - - nandc0: nandc@ff400000 { - compatible = "rockchip,rk-nandc"; - reg = <0x0 0xff400000 0x0 0x4000>; - interrupts = ; - nandc_id = <0>; - clocks = <&clk_nandc0>, <&clk_gates20 9>, <&clk_gates20 11>; - clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc"; - }; - - nandc0reg: nandc0@ff400000 { - compatible = "rockchip,rk-nandc"; - reg = <0x0 0xff400000 0x0 0x4000>; - }; - - emmc: rksdmmc@ff0f0000 { - compatible = "rockchip,rk_mmc", "rockchip,rk3368-sdmmc"; - reg = <0x0 0xff0f0000 0x0 0x4000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&clk_emmc>, <&clk_gates21 2>, <&clk_gates20 10>; - clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc"; - rockchip,grf = <&grf>; - rockchip,cru = <&cru>; - num-slots = <1>; - fifo-depth = <0x100>; - bus-width = <8>; - tune_regsbase = <0x418>; - cru_regsbase = <0x320>; - cru_reset_offset = <3>; - }; - - sdmmc: rksdmmc@ff0c0000 { - compatible = "rockchip,rk_mmc", "rockchip,rk3368-sdmmc"; - reg = <0x0 0xff0c0000 0x0 0x4000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default", "idle", "udbg"; - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_dectn &sdmmc_bus4>; - pinctrl-1 = <&sdmmc_gpio>; - pinctrl-2 = <&uart2_xfer &cpu_jtag &mcu_jtag &sdmmc_dectn>; - cd-gpios = <&gpio2 GPIO_B3 GPIO_ACTIVE_HIGH>;/*CD GPIO*/ - clocks = <&clk_sdmmc0>, <&clk_gates21 0>, <&clk_gates20 10>; - clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc"; - rockchip,grf = <&grf>; - rockchip,cru = <&cru>; - num-slots = <1>; - fifo-depth = <0x100>; - bus-width = <4>; - tune_regsbase = <0x400>; - cru_regsbase = <0x320>; - cru_reset_offset = <0>; - }; - - sdio: rksdmmc@ff0d0000 { - compatible = "rockchip,rk_mmc", "rockchip,rk3368-sdmmc"; - reg = <0x0 0xff0d0000 0x0 0x4000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default","idle"; - pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_wrprt &sdio0_pwren &sdio0_bkpwr &sdio0_int &sdio0_bus4>; - pinctrl-1 = <&sdio0_gpio>; - clocks = <&clk_sdio0>, <&clk_gates21 1>, <&clk_gates20 10>; - clock-names = "clk_mmc", "hclk_mmc", "hpclk_mmc"; - rockchip,grf = <&grf>; - rockchip,cru = <&cru>; - num-slots = <1>; - fifo-depth = <0x100>; - bus-width = <4>; - tune_regsbase = <0x408>; - cru_regsbase = <0x320>; - cru_reset_offset = <1>; - }; - - spi0: spi@ff110000 { - compatible = "rockchip,rockchip-spi"; - reg = <0x0 0xff110000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0 &spi0_cs1>; - rockchip,spi-src-clk = <0>; - num-cs = <2>; - clocks =<&clk_spi0>, <&clk_gates19 4>; - clock-names = "spi", "pclk_spi0"; - //dmas = <&pdma1 11>, <&pdma1 12>; - //#dma-cells = <2>; - //dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi1: spi@ff120000 { - compatible = "rockchip,rockchip-spi"; - reg = <0x0 0xff120000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0 &spi1_cs1>; - rockchip,spi-src-clk = <1>; - num-cs = <2>; - clocks = <&clk_spi1>, <&clk_gates19 5>; - clock-names = "spi", "pclk_spi1"; - //dmas = <&pdma1 13>, <&pdma1 14>; - //#dma-cells = <2>; - //dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi2: spi@ff130000 { - compatible = "rockchip,rockchip-spi"; - reg = <0x0 0xff130000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>; - rockchip,spi-src-clk = <2>; - num-cs = <1>; - clocks = <&clk_spi2>, <&clk_gates19 6>; - clock-names = "spi", "pclk_spi2"; - //dmas = <&pdma1 15>, <&pdma1 16>; - //#dma-cells = <2>; - //dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart_bt: serial@ff180000 { - compatible = "rockchip,serial"; - reg = <0x0 0xff180000 0x0 0x100>; - interrupts = ; - clock-frequency = <24000000>; - clocks = <&clk_uart0>, <&clk_gates19 7>; - clock-names = "sclk_uart", "pclk_uart"; - reg-shift = <2>; - reg-io-width = <4>; - //dmas = <&pdma1 1>, <&pdma1 2>; - //#dma-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - status = "disabled"; - }; - - uart_bb: serial@ff190000 { - compatible = "rockchip,serial"; - reg = <0x0 0xff190000 0x0 0x100>; - interrupts = ; - clock-frequency = <24000000>; - clocks = <&clk_uart1>, <&clk_gates19 8>; - clock-names = "sclk_uart", "pclk_uart"; - reg-shift = <2>; - reg-io-width = <4>; - //dmas = <&pdma1 3>, <&pdma1 4>; - //#dma-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>; - status = "disabled"; - }; - - uart_dbg: serial@ff690000 { - compatible = "rockchip,serial"; - reg = <0x0 0xff690000 0x0 0x100>; - interrupts = ; - clock-frequency = <24000000>; - clocks = <&clk_uart2>, <&clk_gates13 5>; - clock-names = "sclk_uart", "pclk_uart"; - reg-shift = <2>; - reg-io-width = <4>; - //dmas = <&pdma0 4>, <&pdma0 5>; - //#dma-cells = <2>; - //pinctrl-names = "default"; - //pinctrl-0 = <&uart2_xfer>; - status = "disabled"; - }; - - uart_gps: serial@ff1b0000 { - compatible = "rockchip,serial"; - reg = <0x0 0xff1b0000 0x0 0x100>; - interrupts = ; - clock-frequency = <24000000>; - clocks = <&clk_uart3>, <&clk_gates19 9>; - clock-names = "sclk_uart", "pclk_uart"; - current-speed = <115200>; - reg-shift = <2>; - reg-io-width = <4>; - //dmas = <&pdma1 7>, <&pdma1 8>; - //#dma-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&uart3_xfer &uart3_cts &uart3_rts>; - status = "disabled"; - }; - - uart_exp: serial@ff1c0000 { - compatible = "rockchip,serial"; - reg = <0x0 0xff1c0000 0x0 0x100>; - interrupts = ; - clock-frequency = <24000000>; - clocks = <&clk_uart4>, <&clk_gates19 10>; - clock-names = "sclk_uart", "pclk_uart"; - reg-shift = <2>; - reg-io-width = <4>; - //dmas = <&pdma1 9>, <&pdma1 10>; - //#dma-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&uart4_xfer &uart4_cts &uart4_rts>; - status = "disabled"; - }; - - fiq-debugger { - compatible = "rockchip,fiq-debugger"; - rockchip,serial-id = <2>; - rockchip,signal-irq = <186>; - rockchip,wake-irq = <0>; - rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */ - rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */ - status = "disabled"; - }; - - mbox: mbox@ff6b0000 { - compatible = "rockchip,rk3368-mailbox"; - reg = <0x0 0xff6b0000 0x0 0x1000>, - <0x0 0xff8cf000 0x0 0x1000>; /* the end 4k of sram */ - interrupts = , - , - , - ; - clocks = <&clk_gates12 1>; - clock-names = "pclk_mailbox"; - #mbox-cells = <1>; - }; - - mbox_scpi: mbox-scpi { - compatible = "rockchip,mbox-scpi"; - mboxes = <&mbox 0 &mbox 1 &mbox 2>; - chan-nums = <3>; - }; - - ddr: ddr { - compatible = "rockchip,rk3368-ddr"; - status = "okay"; - rockchip,ddrpctl = <&ddrpctl>; - rockchip,grf = <&grf>; - rockchip,msch = <&msch>; - rockchip,ddr_timing = <&ddr_timing>; - }; - - rockchip_clocks_init: clocks-init{ - compatible = "rockchip,clocks-init"; - rockchip,clocks-init-parent = - <&i2s_pll &clk_gpll>, <&spdif_8ch_pll &clk_gpll>, - <&i2s_2ch_pll &clk_gpll>, <&usbphy_480m &usbotg_480m_out>, - <&clk_uart_pll &clk_gpll>, <&aclk_gpu &clk_cpll>, - <&clk_cs &clk_gpll>, <&clk_32k_mux &pvtm_clkout>; - rockchip,clocks-init-rate = - <&clk_gpll 576000000>, <&clk_core_b 792000000>, - <&clk_core_l 600000000>, <&clk_cpll 400000000>, - /*<&clk_npll 500000000>,*/ <&aclk_bus 300000000>, - <&hclk_bus 150000000>, <&pclk_bus 75000000>, - <&clk_crypto 150000000>, <&aclk_peri 300000000>, - <&hclk_peri 150000000>, <&pclk_peri 75000000>, - <&pclk_alive_pre 100000000>, <&pclk_pmu_pre 100000000>, - <&clk_cs 300000000>, <&clkin_trace 300000000>, - <&aclk_cci 600000000>, <&clk_mac 125000000>, - <&aclk_vio0 400000000>, <&hclk_vio 100000000>, - <&aclk_rga_pre 400000000>, <&clk_rga 400000000>, - <&clk_isp 400000000>, <&clk_edp 200000000>, - <&clk_gpu_core 400000000>, <&aclk_gpu_mem 400000000>, - <&aclk_gpu_cfg 400000000>, <&aclk_vepu 400000000>, - <&aclk_vdpu 400000000>, <&clk_hevc_core 300000000>, - <&clk_hevc_cabac 300000000>; -/* - rockchip,clocks-uboot-has-init = - <&aclk_vio0>; -*/ - }; - - rockchip_clocks_enable: clocks-enable { - compatible = "rockchip,clocks-enable"; - clocks = - /*PLL*/ - <&clk_apllb>, - <&clk_aplll>, - <&clk_dpll>, - <&clk_gpll>, - <&clk_cpll>, - - /*PD_CORE*/ - <&clk_cs>, - <&clkin_trace>, - <&aclk_cci>, - - /*PD_BUS*/ - <&aclk_bus>, - <&hclk_bus>, - <&pclk_bus>, - <&clk_gates12 12>,/*aclk_strc_sys*/ - <&clk_gates12 6>,/*aclk_intmem1*/ - <&clk_gates12 5>,/*aclk_intmem0*/ - <&clk_gates12 4>,/*aclk_intmem*/ - <&clk_gates13 9>,/*aclk_gic400*/ - <&clk_gates12 9>,/*hclk_rom*/ - - /*PD_ALIVE*/ - <&clk_gates22 12>,/*pclk_timer0*/ - <&clk_gates22 9>,/*pclk_alive_niu*/ - <&clk_gates22 8>,/*pclk_grf*/ - - /*PD_PMU*/ - <&clk_gates23 5>,/*pclk_pmugrf*/ - <&clk_gates23 3>,/*pclk_sgrf*/ - <&clk_gates23 2>,/*pclk_pmu_noc*/ - <&clk_gates23 1>,/*pclk_intmem1*/ - <&clk_gates23 0>,/*pclk_pmu*/ - - /*PD_PERI*/ - <&clk_gates19 2>,/*aclk_peri_axi_matrix*/ - <&clk_gates20 8>,/*aclk_peri_niu*/ - <&clk_gates21 4>,/*aclk_peri_mmu*/ - <&clk_gates19 0>,/*hclk_peri_axi_matrix*/ - <&clk_gates20 7>,/*hclk_peri_ahb_arbi*/ - <&clk_gates19 1>,/*pclk_peri_axi_matrix*/ - - <&clk_gates24 0>, /* g_clk_timer0 */ - <&clk_gates24 1>, /* g_clk_timer1 */ - - <&fclk_mcu>, - <&stclk_mcu>, - <&clk_gates7 0>;/*clk_jtag*/ - }; - - /* I2C_PMU */ - i2c0: i2c@ff650000 { - compatible = "rockchip,rk30-i2c"; - reg = <0x0 0xff650000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default", "gpio", "sleep"; - pinctrl-0 = <&i2c0_xfer>; - pinctrl-1 = <&i2c0_gpio>; - pinctrl-2 = <&i2c0_sleep>; - gpios = <&gpio0 GPIO_A6 GPIO_ACTIVE_LOW>, <&gpio0 GPIO_A7 GPIO_ACTIVE_LOW>; - clocks = <&clk_gates12 2>; - rockchip,check-idle = <1>; - status = "disabled"; - }; - - /* I2C_AUDIO */ - i2c1: i2c@ff660000 { - compatible = "rockchip,rk30-i2c"; - reg = <0x0 0xff660000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default", "gpio", "sleep"; - pinctrl-0 = <&i2c1_xfer>; - pinctrl-1 = <&i2c1_gpio>; - pinctrl-2 = <&i2c1_sleep>; - gpios = <&gpio2 GPIO_C5 GPIO_ACTIVE_LOW>, <&gpio2 GPIO_C6 GPIO_ACTIVE_LOW>; - clocks = <&clk_gates12 3>; - rockchip,check-idle = <1>; - status = "disabled"; - }; - - /* I2C_SENSOR */ - i2c2: i2c@ff140000 { - compatible = "rockchip,rk30-i2c"; - reg = <0x0 0xff140000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default", "gpio", "sleep"; - pinctrl-0 = <&i2c2_xfer>; - pinctrl-1 = <&i2c2_gpio>; - pinctrl-2 = <&i2c2_sleep>; - gpios = <&gpio3 GPIO_D7 GPIO_ACTIVE_LOW>, <&gpio0 GPIO_B1 GPIO_ACTIVE_LOW>; - clocks = <&clk_gates19 11>; - rockchip,check-idle = <1>; - status = "disabled"; - }; - - /* I2C_CAM */ - i2c3: i2c@ff150000 { - compatible = "rockchip,rk30-i2c"; - reg = <0x0 0xff150000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default", "gpio", "sleep"; - pinctrl-0 = <&i2c3_xfer>; - pinctrl-1 = <&i2c3_gpio>; - pinctrl-2 = <&i2c3_sleep>; - gpios = <&gpio1 GPIO_C1 GPIO_ACTIVE_LOW>, <&gpio1 GPIO_C0 GPIO_ACTIVE_LOW>; - clocks = <&clk_gates19 12>; - rockchip,check-idle = <1>; - status = "disabled"; - }; - - /* I2C_TP */ - i2c4: i2c@ff160000 { - compatible = "rockchip,rk30-i2c"; - reg = <0x0 0xff160000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default", "gpio", "sleep"; - pinctrl-0 = <&i2c4_xfer>; - pinctrl-1 = <&i2c4_gpio>; - pinctrl-2 = <&i2c4_sleep>; - gpios = <&gpio3 GPIO_D0 GPIO_ACTIVE_LOW>, <&gpio3 GPIO_D1 GPIO_ACTIVE_LOW>; - clocks = <&clk_gates19 13>; - rockchip,check-idle = <1>; - status = "disabled"; - }; - - /* I2C_HDMI */ - i2c5: i2c@ff170000 { - compatible = "rockchip,rk30-i2c"; - reg = <0x0 0xff170000 0x0 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default", "gpio", "sleep"; - pinctrl-0 = <&i2c5_xfer>; - pinctrl-1 = <&i2c5_gpio>; - pinctrl-2 = <&i2c5_sleep>; - gpios = <&gpio3 GPIO_D2 GPIO_ACTIVE_LOW>, <&gpio3 GPIO_D3 GPIO_ACTIVE_LOW>; - clocks = <&clk_gates19 14>; - rockchip,check-idle = <1>; - status = "disabled"; - }; - - fb: fb { - compatible = "rockchip,rk-fb"; - rockchip,disp-mode = ; - }; - - - rk_screen: rk_screen { - compatible = "rockchip,screen"; - }; - - dsihost0: mipi@ff960000{ - compatible = "rockchip,rk3368-dsi"; - rockchip,prop = <0>; - reg = <0x0 0xff960000 0x0 0x4000>, <0x0 0xff968000 0x0 0x4000>; - reg-names = "mipi_dsi_host" ,"mipi_dsi_phy"; - interrupts = ; - clocks = <&clk_gates4 14>, <&clk_gates22 10>, <&clk_gates17 3>, <&pd_mipidsi>; - clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "pclk_mipi_dsi_host", "pd_mipi_dsi"; - status = "disabled"; - }; - - lvds: lvds@ff968000 { - compatible = "rockchip,rk3368-lvds"; - rockchip,grf = <&grf>; - reg = <0x0 0xff968000 0x0 0x4000>, <0x0 0xff9600a0 0x0 0x20>; - reg-names = "mipi_lvds_phy", "mipi_lvds_ctl"; - clocks = <&clk_gates22 10>, <&clk_gates17 3>, <&pd_lvds>; - clock-names = "pclk_lvds", "pclk_lvds_ctl", "pd_lvds"; - status = "disabled"; - }; - - edp: edp@ff970000 { - compatible = "rockchip,rk32-edp"; - reg = <0x0 0xff970000 0x0 0x4000>; - rockchip,grf = <&grf>; - interrupts = ; - clocks = <&clk_edp>, <&clk_edp_24m>, <&clk_gates17 9>; - clock-names = "clk_edp", "clk_edp_24m", "pclk_edp"; - resets = <&reset RK3368_SRST_EDP_24M>, <&reset RK3368_SRST_EDP_P>; - reset-names = "edp_24m", "edp_apb"; - }; - - hdmi: hdmi@ff980000 { - compatible = "rockchip,rk3368-hdmi"; - reg = <0x0 0xff980000 0x0 0x20000>; - rockchip,grf = <&grf>; - interrupts = ; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&hdmii2c_xfer &hdmi_cec>; - pinctrl-1 = <&i2c5_gpio>; - clocks = <&clk_gates17 6>, <&clk_gates4 13>, <&clk_gates4 12>; - clock-names = "pclk_hdmi", "hdcp_clk_hdmi", "cec_clk_hdmi"; - status = "disabled"; - }; - - hdmi_hdcp2: hdmi_hdcp2@ff978000 { - compatible = "rockchip,rk3368-hdmi-hdcp2"; - reg = <0x0 0xff978000 0x0 0x2000>; - interrupts = ; - clocks = <&clk_gates17 10>, <&clk_gates17 12>, <&clk_gates17 11>, <&clk_hdcp>; - clock-names ="aclk_hdcp2", "hclk_hdcp2_mmu", "pclk_hdcp2", "hdcp2_clk_hdmi"; - status = "disabled"; - }; - - lcdc: lcdc@ff930000 { - compatible = "rockchip,rk3368-lcdc"; - rockchip,grf = <&grf>; - rockchip,pmugrf = <&pmugrf>; - rockchip,cru = <&cru>; - rockchip,prop = ; - rockchip,pwr18 = <0>; - rockchip,iommu-enabled = <1>; - reg = <0x0 0xff930000 0x0 0x10000>; - interrupts = ; - /*pinctrl-names = "default", "gpio"; - *pinctrl-0 = <&lcdc_lcdc>; - *pinctrl-1 = <&lcdc_gpio>; - */ - status = "disabled"; - clocks = <&clk_gates16 5>, <&dclk_vop0>, <&clk_gates16 6>, <&clk_npll>, <&pd_vop>; - clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "sclk_pll", "pd_lcdc"; - }; - - adc: adc@ff100000 { - compatible = "rockchip,saradc"; - reg = <0x0 0xff100000 0x0 0x100>; - interrupts = ; - #io-channel-cells = <1>; - io-channel-ranges; - rockchip,adc-vref = <1800>; - clock-frequency = <1000000>; - clocks = <&clk_saradc>, <&clk_gates19 15>; - clock-names = "saradc", "pclk_saradc"; - status = "disabled"; - }; - - rga@ff920000 { - compatible = "rockchip,rga2"; - dev_mode = <1>; - reg = <0x0 0xff920000 0x0 0x1000>; - interrupts = ; - clocks = <&clk_gates16 1>, <&clk_gates16 0>, <&clk_rga>; - clock-names = "hclk_rga", "aclk_rga", "clk_rga"; - }; - - i2s0: i2s0@ff898000 { - compatible = "rockchip-i2s"; - reg = <0x0 0xff898000 0x0 0x1000>; - i2s-id = <0>; - clocks = <&clk_i2s>, <&i2s_out>, <&clk_gates12 7>; - clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk"; - interrupts = ; - dmas = <&pdma0 0>, <&pdma0 1>; - #dma-cells = <2>; - dma-names = "tx", "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&i2s_mclk &i2s_sclk &i2s_lrckrx &i2s_lrcktx &i2s_sdi &i2s_sdo0 &i2s_sdo1 &i2s_sdo2 &i2s_sdo3>; - pinctrl-1 = <&i2s_gpio>; - }; - - i2s1: i2s1@ff890000 { - compatible = "rockchip-i2s"; - reg = <0x0 0xff890000 0x0 0x1000>; - i2s-id = <1>; - clocks = <&clk_i2s_2ch>, <&clk_gates12 8>; - clock-names = "i2s_clk", "i2s_hclk"; - interrupts = ; - dmas = <&pdma0 6>, <&pdma0 7>; - #dma-cells = <2>; - dma-names = "tx", "rx"; - }; - - spdif: spdif@ff880000 { - compatible = "rockchip-spdif"; - reg = <0x0 0xff880000 0x0 0x1000>; - clocks = <&clk_spidf_8ch>, <&clk_gates12 10>; - clock-names = "spdif_mclk", "spdif_hclk"; - interrupts = ; - dmas = <&pdma0 3>; - #dma-cells = <1>; - dma-names = "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spdif_tx>; - }; - - pwm0: pwm@ff680000 { - compatible = "rockchip,rk-pwm"; - reg = <0x0 0xff680000 0x0 0x10>; - #pwm-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - clocks = <&clk_gates13 6>; - clock-names = "pclk_pwm"; - status = "disabled"; - }; - - pwm1: pwm@ff680010 { - compatible = "rockchip,rk-pwm"; - reg = <0x0 0xff680010 0x0 0x10>; - #pwm-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm1_pin>; - clocks = <&clk_gates13 6>; - clock-names = "pclk_pwm"; - status = "disabled"; - }; - - pwm2: pwm@ff680020 { - compatible = "rockchip,rk-pwm"; - reg = <0x0 0xff680020 0x0 0x10>; - #pwm-cells = <2>; - //pinctrl-names = "default"; - //pinctrl-0 = <&pwm1_pin>; - clocks = <&clk_gates13 6>; - clock-names = "pclk_pwm"; - status = "disabled"; - }; - - pwm3: pwm@ff680030 { - compatible = "rockchip,rk-pwm"; - reg = <0x0 0xff680030 0x0 0x10>; - #pwm-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm3_pin>; - clocks = <&clk_gates13 6>; - clock-names = "pclk_pwm"; - status = "disabled"; - }; - - remotectl: pwm@ff680030 { - compatible = "rockchip,remotectl-pwm"; - reg = <0x0 0xff680030 0x0 0x50>; - #pwm-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm3_pin>; - clocks = <&clk_gates13 6>; - clock-names = "pclk_pwm"; - dmas = <&pdma0 2>; - #dma-cells = <2>; - dma-names = "rx"; - remote_pwm_id = <3>; - interrupts = ; - status = "disabled"; - }; - - voppwm: pwm@ff9301a0 { - compatible = "rockchip,vop-pwm"; - reg = <0x0 0xff9301a0 0x0 0x10>; - #pwm-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&vop_pwm_pin>; - clocks = <&clk_gates4 2>, <&clk_gates16 5>, <&clk_gates16 6>; - clock-names = "pclk_pwm", "aclk_lcdc", "hclk_lcdc"; - status = "disabled"; - }; - - pvtm { - compatible = "rockchip,rk3368-pvtm"; - rockchip,grf = <&grf>; - rockchip,pmugrf = <&pmugrf>; - rockchip,pvtm-clk-out = <1>; - }; - - cpufreq { - compatible = "rockchip,rk3368-cpufreq"; - rockchip,grf = <&grf>; - }; - - dvfs { - - vd_arm: vd_arm { - regulator_name = "vdd_arm"; - suspend_volt = <1000>; //mV - pd_core { - clk_core_b_dvfs_table: clk_core_b { - operating-points = < - /* KHz uV */ - 312000 1200000 - 504000 1200000 - 816000 1200000 - 1008000 1200000 - >; - status = "okay"; - cluster = <0>; - temp-limit-enable = <1>; - target-temp = <80>; - min_temp_limit = <216000>; - normal-temp-limit = < - /*delta-temp delta-freq*/ - 3 96000 - 6 144000 - 9 192000 - 15 384000 - >; - performance-temp-limit = < - /*temp freq*/ - 100 816000 - >; - lkg_adjust_volt_en = <1>; - channel = <0>; - def_table_lkg = <25>; - min_adjust_freq = <216000>; - lkg_adjust_volt_table = < - /*lkg(mA) volt(uV)*/ - 0 25000 - >; - pvtm_min_temp = <25>; - }; - clk_core_l_dvfs_table: clk_core_l { - operating-points = < - /* KHz uV */ - 312000 1200000 - 504000 1200000 - 816000 1200000 - 1008000 1200000 - >; - status = "okay"; - cluster = <1>; - temp-limit-enable = <1>; - target-temp = <80>; - min_temp_limit = <216000>; - normal-temp-limit = < - /*delta-temp delta-freq*/ - 3 96000 - 6 144000 - 9 192000 - 15 384000 - >; - performance-temp-limit = < - /*temp freq*/ - 100 816000 - >; - lkg_adjust_volt_en = <1>; - channel = <0>; - def_table_lkg = <25>; - min_adjust_freq = <216000>; - lkg_adjust_volt_table = < - /*lkg(mA) volt(uV)*/ - 0 25000 - >; - pvtm_min_temp = <25>; - }; - }; - }; - - vd_logic: vd_logic { - regulator_name = "vdd_logic"; - suspend_volt = <1000>; //mV - pd_ddr { - clk_ddr_dvfs_table: clk_ddr { - operating-points = < - /* KHz uV */ - 200000 1200000 - 300000 1200000 - 400000 1200000 - >; - bd-freq-table = < - /* bandwidth freq */ - 2700 792000 - 2600 600000 - 2280 456000 - 1560 396000 - 1020 324000 - 720 240000 - >; - high_load = <70>; - low_load = <60>; - auto_freq_interval = <20>; /* ms */ - down_rate_delay = <500>; /* ms */ - channel = <2>; - status = "disabled"; - }; - }; - - pd_gpu { - clk_gpu_dvfs_table: clk_gpu { - operating-points = < - /* KHz uV */ - 200000 1200000 - 300000 1200000 - 400000 1200000 - >; - channel = <1>; - status = "okay"; - regu-mode-table = < - /*freq mode*/ - 200000 4 - 0 3 - >; - regu-mode-en = <0>; - }; - }; - }; - }; - - ion { - compatible = "rockchip,ion"; - #address-cells = <1>; - #size-cells = <0>; - - ion_cma: rockchip,ion-heap@4 { /* CMA HEAP */ - compatible = "rockchip,ion-heap"; - rockchip,ion_heap = <4>; - reg = <0x00000000 0x00000000>; /* 0MB */ - }; - rockchip,ion-heap@0 { /* VMALLOC HEAP */ - compatible = "rockchip,ion-heap"; - rockchip,ion_heap = <0>; - }; - }; - - vpu: vpu_service { - compatible = "rockchip,vpu_sub"; - iommu_enabled = <1>; - interrupts = , - ; - interrupt-names = "irq_enc", "irq_dec"; - dev_mode = <0>; - name = "vpu_service"; - }; - - hevc: hevc_service { - compatible = "rockchip,hevc_sub"; - iommu_enabled = <1>; - interrupts = ; - interrupt-names = "irq_dec"; - dev_mode = <1>; - name = "hevc_service"; - }; - - vpu_combo: vpu_combo@ff9a0000 { - compatible = "rockchip,vpu_combo"; - reg = <0x0 0xff9a0000 0x0 0x800>; - rockchip,grf = <&grf>; - subcnt = <2>; - rockchip,sub = <&vpu>, <&hevc>; - clocks = <&aclk_vdpu>, <&hclk_vdpu>, <&clk_hevc_core>, <&clk_hevc_cabac>; - clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core", "clk_cabac"; - resets = <&reset RK3368_SRST_VIDEO_H>, <&reset RK3368_SRST_VIDEO_A>, - <&reset RK3368_SRST_VIDEO>; - reset-names = "video_h", "video_a", "video"; - mode_bit = <12>; - mode_ctrl = <0x418>; - name = "vpu_combo"; - status = "okay"; - }; - - iep: iep@ff900000 { - compatible = "rockchip,iep"; - iommu_enabled = <1>; - reg = <0x0 0xff900000 0x0 0x800>; - interrupts = ; - clocks = <&clk_gates16 2>, <&clk_gates16 3>; - clock-names = "aclk_iep", "hclk_iep"; - version = <2>; - status = "okay"; - }; - - gmac: eth@ff290000 { - compatible = "rockchip,rk3368-gmac"; - reg = <0x0 0xff290000 0x0 0x10000>; - rockchip,grf = <&grf>; - interrupts = ; /*irq=59*/ - interrupt-names = "macirq"; - - clocks = <&clk_mac>, <&clk_gates7 4>, - <&clk_gates7 5>, <&clk_gates7 6>, - <&clk_gates7 7>, <&clk_gates20 13>, - <&clk_gates20 14>; - clock-names = "clk_mac", "mac_clk_rx", - "mac_clk_tx", "clk_mac_ref", - "clk_mac_refout", "aclk_mac", - "pclk_mac"; - - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - status = "disabled"; - }; - - gpu { - compatible = "arm,rogue-G6110", "arm,rk3368-gpu"; - reg = <0x0 0xffa30000 0x0 0x10000>; - interrupts = ; - interrupt-names = "GPU"; - }; - - iep_mmu { - dbgname = "iep"; - compatible = "rockchip,iep_mmu"; - reg = <0x0 0xff900800 0x0 0x100>; - interrupts = ; - interrupt-names = "iep_mmu"; - }; - - vip_mmu { - dbgname = "vip"; - compatible = "rockchip,vip_mmu"; - reg = <0x0 0xff950800 0x0 0x100>; - interrupts = ; - interrupt-names = "vip_mmu"; - }; - - vop_mmu { - dbgname = "vop"; - compatible = "rockchip,vopb_mmu"; - reg = <0x0 0xff930300 0x0 0x100>; - interrupts = ; - interrupt-names = "vop_mmu"; - }; - - isp_mmu { - dbgname = "isp_mmu"; - compatible = "rockchip,isp_mmu"; - reg = <0x0 0xff914000 0x0 0x100>, - <0x0 0xff915000 0x0 0x100>; - interrupts = ; - interrupt-names = "isp_mmu"; - }; - - hdcp_mmu { - dbgname = "hdcp_mmu"; - compatible = "rockchip,hdcp_mmu"; - reg = <0x0 0xff940000 0x0 0x100>; - interrupts = ; - interrupt-names = "hdcp_mmu"; - }; - - hevc_mmu { - dbgname = "hevc"; - compatible = "rockchip,hevc_mmu"; - reg = <0x0 0xff9a0440 0x0 0x40>, /*need to fix*/ - <0x0 0xff9a0480 0x0 0x40>; - interrupts = ; /*need to fix*/ - interrupt-names = "hevc_mmu"; - }; - - vpu_mmu { - dbgname = "vpu"; - compatible = "rockchip,vpu_mmu"; - reg = <0x0 0xff9a0800 0x0 0x100>; /*need to fix*/ - interrupts = , /*need to fix*/ - ; - interrupt-names = "vepu_mmu", "vdpu_mmu"; - }; - - rockchip_suspend: rockchip_suspend { - rockchip,ctrbits = < - (0 - | RKPM_SLP_ARMOFF - | RKPM_SLP_PMU_PLLS_PWRDN - /*| RKPM_SLP_PMU_PMUALIVE_32K - | RKPM_SLP_SFT_PLLS_DEEP - | RKPM_SLP_PMU_DIS_OSC */ - | RKPM_SLP_SFT_PD_NBSCUS - ) - >; - }; - - isp: isp@ff910000{ - compatible = "rockchip,isp"; - reg = <0x0 0xff910000 0x0 0x10000>; - interrupts = ; - clocks = <&clk_gates16 0>, <&clk_gates16 14>, <&clk_isp>, <&clk_isp>, <&pclk_isp>, <&clk_vip>, <&clk_vip_pll>, <&clk_gates17 4>, <&clk_gates22 11>, <&pd_isp>, <&clk_gates16 9>; - clock-names = "aclk_isp", "hclk_isp", "clk_isp", "clk_isp_jpe", "pclkin_isp", "clk_cif_out", "clk_cif_pll", "hclk_mipiphy1", "pclk_dphyrx", "pd_isp", "clk_vio0_noc"; - pinctrl-names = "default", "isp_dvp8bit2", "isp_dvp10bit", "isp_dvp12bit", "isp_dvp8bit0", "isp_dvp8bit4", "isp_mipi_fl", "isp_mipi_fl_prefl","isp_flash_as_gpio","isp_flash_as_trigger_out"; - pinctrl-0 = <&cif_clkout>; - pinctrl-1 = <&cif_clkout &isp_dvp_d2d9>; - pinctrl-2 = <&cif_clkout &isp_dvp_d2d9 &isp_dvp_d0d1>; - pinctrl-3 = <&cif_clkout &isp_dvp_d2d9 &isp_dvp_d0d1 &isp_dvp_d10d11>; - pinctrl-4 = <&cif_clkout &isp_dvp_d0d7>; - pinctrl-5 = <&cif_clkout &isp_dvp_d4d11>; - pinctrl-6 = <&cif_clkout>; - pinctrl-7 = <&cif_clkout &isp_prelight>; - pinctrl-8 = <&isp_flash_trigger_as_gpio>; - pinctrl-9 = <&isp_flash_trigger>; - rockchip,isp,mipiphy = <2>; - rockchip,isp,cifphy = <1>; - rockchip,isp,mipiphy1,reg = <0xff964000 0x4000>; - rockchip,isp,csiphy,reg = <0xff96C000 0x4000>; - rockchip,grf = <&grf>; - rockchip,cru = <&cru>; - rockchip,gpios = <&gpio3 GPIO_C4 GPIO_ACTIVE_HIGH>; - rockchip,isp,iommu_enable = <1>; - status = "okay"; - }; - - cif: cif@ff950000 { - compatible = "rockchip,cif"; - reg = <0x0 0xff950000 0x0 0x10000>; - interrupts = ; - //clocks = <&pd_isp>,<&clk_gates15 14>,<&clk_gates15 15>,<&pclkin_vip>,<&clk_gates16 0>,<&clk_cif_out>; - clocks = <&clk_gates16 11>,<&clk_gates16 12>,<&pclkin_vip>,<&clk_vip>; - clock-names = "aclk_cif0","hclk_cif0","cif0_in","cif0_out"; - pinctrl-names = "cif_pin_all"; - pinctrl-0 = <&cif_clkout &isp_dvp_d2d9 &isp_dvp_d10d11>; - rockchip,grf = <&grf>; - rockchip,cru = <&cru>; - status = "okay"; - }; - -/* - thermal-zones { - #include "rk3368-thermal.dtsi" - }; -*/ - - tsadc: tsadc@ff280000 { - compatible = "rockchip,rk3368-tsadc"; - reg = <0x0 0xff280000 0x0 0x100>; - interrupts = ; - clocks = <&clk_tsadc>, <&clk_gates20 0>; - rockchip,grf = <&grf>; - rockchip,cru = <&cru>; - rockchip,pmu = <&pmu>; - clock-names = "tsadc", "apb_pclk"; - clock-frequency = <32000>; - resets = <&reset RK3368_SRST_TSADC_P>; - reset-names = "tsadc-apb"; - //pinctrl-names = "default"; - //pinctrl-0 = <&tsadc_int>; - #thermal-sensor-cells = <1>; - hw-shut-temp = <120000>; - status = "disabled"; - }; - - tsp: tsp@FF8B0000 { - compatible = "rockchip,rk3368-tsp"; - reg = <0x0 0xFF8B0000 0x0 0x10000>; - clocks = <&clk_tsp>, <&clk_gates13 10>, <&clk_gates13 7>; - clock-names = "clk_tsp", "hclk_tsp", "clk_hsadc0_tsp"; - interrupts = ; - interrupt-names = "irq_tsp"; - // pinctrl-names = "default"; - // pinctrl-0 = <&isp_hsadc>; - status = "okay"; - }; - - crypto: crypto@FF8A0000{ - compatible = "rockchip,rk3368-crypto"; - reg = <0x0 0xFF8A0000 0x0 0x10000>; - interrupts = ; - interrupt-names = "irq_crypto"; - clocks = <&clk_crypto>, <&clk_gates13 4>, <&clk_gates13 3>; - clock-names = "clk_crypto", "sclk_crypto", "mclk_crypto"; - status = "okay"; - }; - - dwc_control_usb: dwc-control-usb { - compatible = "rockchip,rk3368-dwc-control-usb"; - rockchip,grf = <&grf>; - interrupts = , , - , ; - interrupt-names = "otg_id", "otg_bvalid", - "otg_linestate", "host0_linestate"; - clocks = <&clk_gates20 6>, <&usbphy_480m>; - clock-names = "hclk_usb_peri", "usbphy_480m"; - //resets = <&reset RK3128_RST_USBPOR>; - //reset-names = "usbphy_por"; - usb_bc{ - compatible = "inno,phy"; - regbase = &dwc_control_usb; - rk_usb,bvalid = <0x4bc 23 1>; - rk_usb,iddig = <0x4bc 26 1>; - rk_usb,vdmsrcen = <0x718 12 1>; - rk_usb,vdpsrcen = <0x718 11 1>; - rk_usb,rdmpden = <0x718 10 1>; - rk_usb,idpsrcen = <0x718 9 1>; - rk_usb,idmsinken = <0x718 8 1>; - rk_usb,idpsinken = <0x718 7 1>; - rk_usb,dpattach = <0x4b8 31 1>; - rk_usb,cpdet = <0x4b8 30 1>; - rk_usb,dcpattach = <0x4b8 29 1>; - }; - }; - - usbphy: phy { - compatible = "rockchip,rk3368-usb-phy"; - rockchip,grf = <&grf>; - #address-cells = <1>; - #size-cells = <0>; - - usbphy0: usb-phy0 { - #phy-cells = <0>; - reg = <0x700>; - }; - - usbphy1: usb-phy1 { - #phy-cells = <0>; - reg = <0x728>; - }; - }; - - usb0: usb@ff580000 { - compatible = "rockchip,rk3368_usb20_otg"; - reg = <0x0 0xff580000 0x0 0x40000>; - interrupts = ; - clocks = <&clk_gates8 1>, <&clk_gates20 1>; - clock-names = "clk_usbphy0", "hclk_otg"; - resets = <&reset RK3368_SRST_USBOTG0_H>, <&reset RK3368_SRST_USBOTGPHY0>, - <&reset RK3368_SRST_USBOTGC0>; - reset-names = "otg_ahb", "otg_phy", "otg_controller"; - /*0 - Normal, 1 - Force Host, 2 - Force Device*/ - rockchip,usb-mode = <0>; - }; - - usb_ehci: usb@ff500000 { - compatible = "generic-ehci"; - reg = <0x0 0xff500000 0x0 0x20000>; - interrupts = ; - clocks = <&clk_gates8 1>, <&clk_gates20 3>; - clock-names = "clk_usbphy0", "hclk_ehci"; - phys = <&usbphy1>; - phy-names = "usb"; - //resets = <&reset RK3288_SOFT_RST_USBHOST0_H>, <&reset RK3288_SOFT_RST_USBHOST0PHY>, - // <&reset RK3288_SOFT_RST_USBHOST0C>, <&reset RK3288_SOFT_RST_USB_HOST0>; - //reset-names = "ehci_ahb", "ehci_phy", "ehci_controller", "ehci"; - }; - - usb_ohci: usb@ff520000 { - compatible = "generic-ohci"; - reg = <0x0 0xff520000 0x0 0x20000>; - interrupts = ; - clocks = <&clk_gates8 1>, <&clk_gates20 3>; - clock-names = "clk_usbphy0", "hclk_ohci"; - }; - - usb_ehci1: usb@ff5c0000 { - compatible = "rockchip,rk3288_rk_ehci1_host"; - reg = <0x0 0xff5c0000 0x0 0x40000>; - interrupts = ; -/* - clocks = <&ehci1phy_480m>, <&clk_gates7 8>, - <&ehci1phy_12m>, <&usbphy_480m>, - <&otgphy1_480m>, <&otgphy2_480m>; - clock-names = "ehci1phy_480m", "hclk_ehci1", - "ehci1phy_12m", "usbphy_480m", - "ehci1_usbphy1", "ehci1_usbphy2"; - resets = <&reset RK3368_SRST_EHCI1>, <&reset RK3368_SRST_EHCI1_AUX>, - <&reset RK3368_SRST_EHCI1PHY>; - reset-names = "ehci1_ahb", "ehci1_aux", "ehci1_phy"; -*/ - status = "disabled"; - }; - - pinctrl: pinctrl { - compatible = "rockchip,rk3368-pinctrl"; - rockchip,grf = <&grf>; - rockchip,pmugrf = <&pmugrf>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio0: gpio0@ff750000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff750000 0x0 0x100>; - interrupts = ; - clocks = <&clk_gates23 4>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio1@ff780000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff780000 0x0 0x100>; - interrupts = ; - clocks = <&clk_gates22 1>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio2@ff790000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff790000 0x0 0x100>; - interrupts = ; - clocks = <&clk_gates22 2>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio3@ff7a0000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff7a0000 0x0 0x100>; - interrupts = ; - clocks = <&clk_gates22 3>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - pcfg_pull_up: pcfg-pull-up { - bias-pull-up; - }; - - pcfg_pull_down: pcfg-pull-down { - bias-pull-down; - }; - - pcfg_pull_none: pcfg-pull-none { - bias-disable; - }; - - pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { - drive-strength = <8>; - }; - - pcfg_pull_none_drv_12ma: pcfg-pull-none-drv-12ma { - drive-strength = <12>; - }; - - pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { - bias-pull-up; - drive-strength = <8>; - }; - - pcfg_pull_none_drv_4ma: pcfg-pull-none-drv-4ma { - drive-strength = <4>; - }; - - pcfg_pull_up_drv_4ma: pcfg-pull-up-drv-4ma { - bias-pull-up; - drive-strength = <4>; - }; - - pcfg_output_high: pcfg-output-high { - output-high; - }; - - pcfg_output_low: pcfg-output-low { - output-low; - }; - - pcfg_input_high: pcfg-input-high { - bias-pull-up; - input-enable; - }; - - i2c0 { - i2c0_xfer: i2c0-xfer { - rockchip,pins = <0 GPIO_A6 RK_FUNC_1 &pcfg_pull_none>, - <0 GPIO_A7 RK_FUNC_1 &pcfg_pull_none>; - }; - i2c0_gpio: i2c0-gpio { - rockchip,pins = <0 GPIO_A6 RK_FUNC_GPIO &pcfg_pull_none>, - <0 GPIO_A7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - i2c0_sleep: i2c0-sleep { - rockchip,pins = <0 GPIO_A6 RK_FUNC_GPIO &pcfg_input_high>, - <0 GPIO_A7 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - i2c1 { - i2c1_xfer: i2c1-xfer { - rockchip,pins = <2 GPIO_C5 RK_FUNC_1 &pcfg_pull_none>, - <2 GPIO_C6 RK_FUNC_1 &pcfg_pull_none>; - }; - i2c1_gpio: i2c1-gpio { - rockchip,pins = <2 GPIO_C5 RK_FUNC_GPIO &pcfg_pull_none>, - <2 GPIO_C6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - i2c1_sleep: i2c1-sleep { - rockchip,pins = <2 GPIO_C5 RK_FUNC_GPIO &pcfg_input_high>, - <2 GPIO_C6 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - i2c2 { - i2c2_xfer: i2c2-xfer { - rockchip,pins = <3 GPIO_D7 RK_FUNC_2 &pcfg_pull_none>, - <0 GPIO_B1 RK_FUNC_2 &pcfg_pull_none>; - }; - i2c2_gpio: i2c2-gpio { - rockchip,pins = <3 GPIO_D7 RK_FUNC_GPIO &pcfg_pull_none>, - <0 GPIO_B1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - i2c2_sleep: i2c2-sleep { - rockchip,pins = <3 GPIO_D7 RK_FUNC_GPIO &pcfg_input_high>, - <0 GPIO_B1 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - i2c3 { - i2c3_xfer: i2c3-xfer { - rockchip,pins = <1 GPIO_C0 RK_FUNC_1 &pcfg_pull_none>, - <1 GPIO_C1 RK_FUNC_1 &pcfg_pull_none>; - }; - i2c3_gpio: i2c3-gpio { - rockchip,pins = <1 GPIO_C0 RK_FUNC_GPIO &pcfg_pull_none>, - <1 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - i2c3_sleep: i2c3-sleep { - rockchip,pins = <1 GPIO_C0 RK_FUNC_GPIO &pcfg_input_high>, - <1 GPIO_C1 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - i2c4 { - i2c4_xfer: i2c4-xfer { - rockchip,pins = <3 GPIO_D0 RK_FUNC_2 &pcfg_pull_none>, - <3 GPIO_D1 RK_FUNC_2 &pcfg_pull_none>; - }; - i2c4_gpio: i2c4-gpio { - rockchip,pins = <3 GPIO_D0 RK_FUNC_GPIO &pcfg_pull_none>, - <3 GPIO_D1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - i2c4_sleep: i2c4-sleep { - rockchip,pins = <3 GPIO_D0 RK_FUNC_GPIO &pcfg_input_high>, - <3 GPIO_D1 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - i2c5 { - i2c5_xfer: i2c5-xfer { - rockchip,pins = <3 GPIO_D2 RK_FUNC_2 &pcfg_pull_none>, - <3 GPIO_D3 RK_FUNC_2 &pcfg_pull_none>; - }; - i2c5_gpio: i2c5-gpio { - rockchip,pins = <3 GPIO_D2 RK_FUNC_GPIO &pcfg_pull_none>, - <3 GPIO_D3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - i2c5_sleep: i2c5-sleep { - rockchip,pins = <3 GPIO_D2 RK_FUNC_GPIO &pcfg_input_high>, - <3 GPIO_D3 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - uart0 { - uart0_xfer: uart0-xfer { - rockchip,pins = <2 GPIO_D0 RK_FUNC_1 &pcfg_pull_up>, - <2 GPIO_D1 RK_FUNC_1 &pcfg_pull_none>; - }; - - uart0_cts: uart0-cts { - rockchip,pins = <2 GPIO_D2 RK_FUNC_1 &pcfg_pull_none>; - }; - - uart0_rts: uart0-rts { - rockchip,pins = <2 GPIO_D3 RK_FUNC_1 &pcfg_pull_none>; - }; - - uart0_rts_gpio: uart0-rts-gpio { - rockchip,pins = <2 GPIO_D3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - uart1 { - uart1_xfer: uart1-xfer { - rockchip,pins = <0 GPIO_C4 RK_FUNC_3 &pcfg_pull_up>, - <0 GPIO_C5 RK_FUNC_3 &pcfg_pull_none>; - }; - - uart1_cts: uart1-cts { - rockchip,pins = <0 GPIO_C6 RK_FUNC_3 &pcfg_pull_none>; - }; - - uart1_rts: uart1-rts { - rockchip,pins = <0 GPIO_C7 RK_FUNC_3 &pcfg_pull_none>; - }; - }; - - uart2 { - uart2_xfer: uart2-xfer { - rockchip,pins = <2 GPIO_A6 RK_FUNC_2 &pcfg_pull_up>, - <2 GPIO_A5 RK_FUNC_2 &pcfg_pull_none>; - }; - }; - - uart3 { - uart3_xfer: uart3-xfer { - rockchip,pins = <3 GPIO_D5 RK_FUNC_2 &pcfg_pull_up>, - <3 GPIO_D6 RK_FUNC_2 &pcfg_pull_none>; - }; - - uart3_cts: uart3-cts { - rockchip,pins = <3 GPIO_C0 RK_FUNC_2 &pcfg_pull_none>; - }; - - uart3_rts: uart3-rts { - rockchip,pins = <3 GPIO_C1 RK_FUNC_2 &pcfg_pull_none>; - }; - }; - - uart4 { - uart4_xfer: uart4-xfer { - rockchip,pins = <0 GPIO_D3 RK_FUNC_3 &pcfg_pull_up>, - <0 GPIO_D2 RK_FUNC_3 &pcfg_pull_none>; - }; - - uart4_cts: uart4-cts { - rockchip,pins = <0 GPIO_D0 RK_FUNC_3 &pcfg_pull_none>; - }; - - uart4_rts: uart4-rts { - rockchip,pins = <0 GPIO_D1 RK_FUNC_3 &pcfg_pull_none>; - }; - }; - - spi0 { - spi0_clk: spi0-clk { - rockchip,pins = <1 GPIO_D5 RK_FUNC_2 &pcfg_pull_up>; - }; - spi0_cs0: spi0-cs0 { - rockchip,pins = <1 GPIO_D0 RK_FUNC_3 &pcfg_pull_up>; - }; - spi0_tx: spi0-tx { - rockchip,pins = <1 GPIO_C7 RK_FUNC_3 &pcfg_pull_up>; - }; - spi0_rx: spi0-rx { - rockchip,pins = <1 GPIO_C6 RK_FUNC_3 &pcfg_pull_up>; - }; - spi0_cs1: spi0-cs1 { - rockchip,pins = <1 GPIO_D1 RK_FUNC_3 &pcfg_pull_up>; - }; - }; - - spi1 { - spi1_clk: spi1-clk { - rockchip,pins = <1 GPIO_B6 RK_FUNC_2 &pcfg_pull_up>; - }; - spi1_cs0: spi1-cs0 { - rockchip,pins = <1 GPIO_B7 RK_FUNC_2 &pcfg_pull_up>; - }; - spi1_rx: spi1-rx { - rockchip,pins = <1 GPIO_C0 RK_FUNC_2 &pcfg_pull_up>; - }; - spi1_tx: spi1-tx { - rockchip,pins = <1 GPIO_C1 RK_FUNC_2 &pcfg_pull_up>; - }; - spi1_cs1: spi1-cs1 { - rockchip,pins = <3 GPIO_D4 RK_FUNC_2 &pcfg_pull_up>; - }; - }; - - spi2 { - spi2_clk: spi2-clk { - rockchip,pins = <0 GPIO_B4 RK_FUNC_2 &pcfg_pull_up>; - }; - spi2_cs0: spi2-cs0 { - rockchip,pins = <0 GPIO_B5 RK_FUNC_2 &pcfg_pull_up>; - }; - spi2_rx: spi2-rx { - rockchip,pins = <0 GPIO_B2 RK_FUNC_2 &pcfg_pull_up>; - }; - spi2_tx: spi2-tx { - rockchip,pins = <0 GPIO_B3 RK_FUNC_2 &pcfg_pull_up>; - }; - }; - - i2s { - i2s_mclk: i2s-mclk { - rockchip,pins = <2 GPIO_C4 RK_FUNC_1 &pcfg_pull_none>; - }; - - i2s_sclk:i2s-sclk { - rockchip,pins = <2 GPIO_B4 RK_FUNC_1 &pcfg_pull_none>; - }; - - i2s_lrckrx:i2s-lrckrx { - rockchip,pins = <2 GPIO_B5 RK_FUNC_1 &pcfg_pull_none>; - }; - - i2s_lrcktx:i2s-lrcktx { - rockchip,pins = <2 GPIO_B6 RK_FUNC_1 &pcfg_pull_none>; - }; - - i2s_sdi:i2s-sdi { - rockchip,pins = <2 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>; - }; - - i2s_sdo0:i2s-sdo0 { - rockchip,pins = <2 GPIO_C0 RK_FUNC_1 &pcfg_pull_none>; - }; - - i2s_sdo1:i2s-sdo1 { - rockchip,pins = <2 GPIO_C1 RK_FUNC_1 &pcfg_pull_none>; - }; - - i2s_sdo2:i2s-sdo2 { - rockchip,pins = <2 GPIO_C2 RK_FUNC_1 &pcfg_pull_none>; - }; - - i2s_sdo3:i2s-sdo3 { - rockchip,pins = <2 GPIO_C3 RK_FUNC_1 &pcfg_pull_none>; - }; - - i2s_gpio: i2s-gpio { - rockchip,pins = <2 GPIO_C4 RK_FUNC_GPIO &pcfg_pull_none>, - <2 GPIO_B4 RK_FUNC_GPIO &pcfg_pull_none>, - <2 GPIO_B5 RK_FUNC_GPIO &pcfg_pull_none>, - <2 GPIO_B6 RK_FUNC_GPIO &pcfg_pull_none>, - <2 GPIO_B7 RK_FUNC_GPIO &pcfg_pull_none>, - <2 GPIO_C0 RK_FUNC_GPIO &pcfg_pull_none>, - <2 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_none>, - <2 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_none>, - <2 GPIO_C3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - spdif { - spdif_tx: spdif-tx { - rockchip,pins = <2 GPIO_C7 RK_FUNC_1 &pcfg_pull_none>; - }; - }; - - sdmmc { - sdmmc_clk: sdmmc-clk { - rockchip,pins = <2 GPIO_B1 RK_FUNC_1 &pcfg_pull_none_drv_4ma>; - }; - - sdmmc_cmd: sdmmc-cmd { - rockchip,pins = <2 GPIO_B2 RK_FUNC_1 &pcfg_pull_up_drv_4ma>; - }; - - sdmmc_dectn: sdmmc-dectn { - rockchip,pins = <2 GPIO_B3 RK_FUNC_1 &pcfg_pull_up_drv_4ma>; - }; - - sdmmc_bus1: sdmmc-bus1 { - rockchip,pins = <2 GPIO_A5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>; - }; - - sdmmc_bus4: sdmmc-bus4 { - rockchip,pins = <2 GPIO_A5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>, - <2 GPIO_A6 RK_FUNC_1 &pcfg_pull_up_drv_4ma>, - <2 GPIO_A7 RK_FUNC_1 &pcfg_pull_up_drv_4ma>, - <2 GPIO_B0 RK_FUNC_1 &pcfg_pull_up_drv_4ma>; - }; - - sdmmc_gpio: sdmmc-gpio { - rockchip,pins = <2 GPIO_B1 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CLK - <2 GPIO_B2 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CMD - <2 GPIO_B3 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DET - <2 GPIO_A5 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DO - <2 GPIO_A6 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D1 - <2 GPIO_A7 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D2 - <2 GPIO_B0 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>;//D3 - }; - }; - - sdio0 { - sdio0_bus1: sdio0-bus1 { - rockchip,pins = <2 GPIO_D4 RK_FUNC_1 &pcfg_pull_up_drv_4ma>; - }; - - sdio0_bus4: sdio0-bus4 { - rockchip,pins = <2 GPIO_D4 RK_FUNC_1 &pcfg_pull_up_drv_4ma>, - <2 GPIO_D5 RK_FUNC_1 &pcfg_pull_up_drv_4ma>, - <2 GPIO_D6 RK_FUNC_1 &pcfg_pull_up_drv_4ma>, - <2 GPIO_D7 RK_FUNC_1 &pcfg_pull_up_drv_4ma>; - }; - - sdio0_cmd: sdio0-cmd { - rockchip,pins = <3 GPIO_A0 RK_FUNC_1 &pcfg_pull_up_drv_4ma>; - }; - - sdio0_clk: sdio0-clk { - rockchip,pins = <3 GPIO_A1 RK_FUNC_1 &pcfg_pull_none_drv_4ma>; - }; - - sdio0_dectn: sdio0-dectn { - rockchip,pins = <3 GPIO_A2 RK_FUNC_1 &pcfg_pull_up>; - }; - - sdio0_wrprt: sdio0-wrprt { - rockchip,pins = <3 GPIO_A3 RK_FUNC_1 &pcfg_pull_up>; - }; - - sdio0_pwren: sdio0-pwren { - rockchip,pins = <3 GPIO_A4 RK_FUNC_1 &pcfg_pull_up>; - }; - - sdio0_bkpwr: sdio0-bkpwr { - rockchip,pins = <3 GPIO_A5 RK_FUNC_1 &pcfg_pull_up>; - }; - - sdio0_int: sdio0-int { - rockchip,pins = <3 GPIO_A6 RK_FUNC_1 &pcfg_pull_up>; - }; - - sdio0_gpio: sdio0-gpio { - rockchip,pins = <3 GPIO_A0 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CMD - <3 GPIO_A1 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//CLK - <3 GPIO_A2 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DET - <3 GPIO_A3 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//wrprt - <3 GPIO_A4 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//PWREN - <3 GPIO_A5 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//BKPWR - <3 GPIO_A6 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//INTN - <2 GPIO_D4 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//DO - <2 GPIO_D5 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D1 - <2 GPIO_D6 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>,//D2 - <2 GPIO_D7 RK_FUNC_GPIO &pcfg_pull_up_drv_4ma>;//D3 - }; - }; - - emmc { - emmc_clk: emmc-clk { - rockchip,pins = <2 GPIO_A4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>; - }; - - emmc_cmd: emmc-cmd { - rockchip,pins = <1 GPIO_D2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>; - }; - - emmc_pwren: emmc-pwren { - rockchip,pins = <1 GPIO_D3 RK_FUNC_2 &pcfg_pull_none>; - }; - - emmc_rstnout: emmc_rstnout { - rockchip,pins = <2 GPIO_A3 RK_FUNC_2 &pcfg_pull_none>; - }; - - emmc_bus1: emmc-bus1 { - rockchip,pins = <1 GPIO_C2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;//DO - }; - - emmc_bus4: emmc-bus4 { - rockchip,pins = <1 GPIO_C2 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,//DO - <1 GPIO_C3 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,//D1 - <1 GPIO_C4 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,//D2 - <1 GPIO_C5 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;//D3 - }; - }; - - pwm0 { - pwm0_pin: pwm0-pin { - rockchip,pins = <3 GPIO_B0 RK_FUNC_2 &pcfg_pull_none>; - }; - - vop_pwm_pin:vop-pwm { - rockchip,pins = <3 GPIO_B0 RK_FUNC_3 &pcfg_pull_none>; - }; - }; - - pwm1 { - pwm1_pin: pwm1-pin { - rockchip,pins = <0 GPIO_B0 RK_FUNC_2 &pcfg_pull_none>; - }; - }; - - pwm3 { - pwm3_pin: pwm3-pin { - rockchip,pins = <3 GPIO_D6 RK_FUNC_3 &pcfg_pull_none>; - }; - }; - - lcdc { - lcdc_lcdc: lcdc-lcdc { - rockchip,pins = - <0 GPIO_B6 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D10 - <0 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D11 - <0 GPIO_C0 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D12 - <0 GPIO_C1 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D13 - <0 GPIO_C2 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D14 - <0 GPIO_C3 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D15 - <0 GPIO_C4 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D16 - <0 GPIO_C5 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D17 - <0 GPIO_C6 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D18 - <0 GPIO_C7 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D19 - <0 GPIO_D0 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D20 - <0 GPIO_D1 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D21 - <0 GPIO_D2 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D22 - <0 GPIO_D3 RK_FUNC_1 &pcfg_pull_none>,//LCDC_D23 - <0 GPIO_D7 RK_FUNC_1 &pcfg_pull_none>,//DCLK - <0 GPIO_D6 RK_FUNC_1 &pcfg_pull_none>,//DEN - <0 GPIO_D4 RK_FUNC_1 &pcfg_pull_none>,//HSYNC - <0 GPIO_D5 RK_FUNC_1 &pcfg_pull_none>;//VSYN - }; - - lcdc_gpio: lcdc-gpio { - rockchip,pins = - <0 GPIO_B6 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D10 - <0 GPIO_B7 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D11 - <0 GPIO_C0 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D12 - <0 GPIO_C1 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D13 - <0 GPIO_C2 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D14 - <0 GPIO_C3 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D15 - <0 GPIO_C4 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D16 - <0 GPIO_C5 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D17 - <0 GPIO_C6 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D18 - <0 GPIO_C7 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D19 - <0 GPIO_D0 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D20 - <0 GPIO_D1 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D21 - <0 GPIO_D2 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D22 - <0 GPIO_D3 RK_FUNC_GPIO &pcfg_pull_none>,//LCDC_D23 - <0 GPIO_D7 RK_FUNC_GPIO &pcfg_pull_none>,//DCLK - <0 GPIO_D6 RK_FUNC_GPIO &pcfg_pull_none>,//DEN - <0 GPIO_D4 RK_FUNC_GPIO &pcfg_pull_none>,//HSYNC - <0 GPIO_D5 RK_FUNC_GPIO &pcfg_pull_none>;//VSYN - }; - }; - - isp { - cif_clkout: cif-clkout { - rockchip,pins = <1 GPIO_B3 RK_FUNC_1 &pcfg_pull_none>;//cif_clkout - }; - - isp_dvp_d2d9: isp-dvp-d2d9 { - rockchip,pins = <1 GPIO_A0 RK_FUNC_1 &pcfg_pull_none>,//cif_data2 - <1 GPIO_A1 RK_FUNC_1 &pcfg_pull_none>,//cif_data3 - <1 GPIO_A2 RK_FUNC_1 &pcfg_pull_none>,//cif_data4 - <1 GPIO_A3 RK_FUNC_1 &pcfg_pull_none>,//cif_data5 - <1 GPIO_A4 RK_FUNC_1 &pcfg_pull_none>,//cif_data6 - <1 GPIO_A5 RK_FUNC_1 &pcfg_pull_none>,//cif_data7 - <1 GPIO_A6 RK_FUNC_1 &pcfg_pull_none>,//cif_data8 - <1 GPIO_A7 RK_FUNC_1 &pcfg_pull_none>,//cif_data9 - <1 GPIO_B0 RK_FUNC_1 &pcfg_pull_none>,//cif_sync - <1 GPIO_B1 RK_FUNC_1 &pcfg_pull_none>,//cif_href - <1 GPIO_B2 RK_FUNC_1 &pcfg_pull_none>,//cif_clkin - <1 GPIO_B3 RK_FUNC_1 &pcfg_pull_none>;//cif_clkout - }; - - isp_dvp_d0d1: isp-dvp-d0d1 { - rockchip,pins = <1 GPIO_B4 RK_FUNC_1 &pcfg_pull_none>,//cif_data0 - <1 GPIO_B5 RK_FUNC_1 &pcfg_pull_none>;//cif_data1 - }; - - isp_dvp_d10d11:isp_d10d11 { - rockchip,pins = <1 GPIO_B6 RK_FUNC_1 &pcfg_pull_none>,//cif_data10 - <1 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>;//cif_data11 - }; - - isp_dvp_d0d7: isp-dvp-d0d7 { - rockchip,pins = <1 GPIO_B4 RK_FUNC_1 &pcfg_pull_none>,//cif_data0 - <1 GPIO_B5 RK_FUNC_1 &pcfg_pull_none>,//cif_data1 - <1 GPIO_A0 RK_FUNC_1 &pcfg_pull_none>,//cif_data2 - <1 GPIO_A1 RK_FUNC_1 &pcfg_pull_none>,//cif_data3 - <1 GPIO_A2 RK_FUNC_1 &pcfg_pull_none>,//cif_data4 - <1 GPIO_A3 RK_FUNC_1 &pcfg_pull_none>,//cif_data5 - <1 GPIO_A4 RK_FUNC_1 &pcfg_pull_none>,//cif_data6 - <1 GPIO_A5 RK_FUNC_1 &pcfg_pull_none>;//cif_data7 - }; - - isp_dvp_d4d11: isp-dvp-d4d11 { - rockchip,pins = - <1 GPIO_A2 RK_FUNC_1 &pcfg_pull_none>,//cif_data4 - <1 GPIO_A3 RK_FUNC_1 &pcfg_pull_none>,//cif_data5 - <1 GPIO_A4 RK_FUNC_1 &pcfg_pull_none>,//cif_data6 - <1 GPIO_A5 RK_FUNC_1 &pcfg_pull_none>,//cif_data7 - <1 GPIO_A6 RK_FUNC_1 &pcfg_pull_none>,//cif_data8 - <1 GPIO_A7 RK_FUNC_1 &pcfg_pull_none>,//cif_data9 - <1 GPIO_B6 RK_FUNC_1 &pcfg_pull_none>,//cif_data10 - <1 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>;//cif_data11 - }; - - isp_shutter: isp-shutter { - rockchip,pins = <3 GPIO_C3 RK_FUNC_2 &pcfg_pull_none>, //SHUTTEREN - <3 GPIO_C6 RK_FUNC_2 &pcfg_pull_none>;//SHUTTERTRIG - }; - - isp_flash_trigger: isp-flash-trigger { - rockchip,pins = <3 GPIO_C4 RK_FUNC_2 &pcfg_pull_none>; //ISP_FLASHTRIGOU - }; - - isp_prelight: isp-prelight { - rockchip,pins = <3 GPIO_C5 RK_FUNC_2 &pcfg_pull_none>;//ISP_PRELIGHTTRIG - }; - - isp_flash_trigger_as_gpio: isp_flash_trigger_as_gpio { - rockchip,pins = <3 GPIO_C4 RK_FUNC_GPIO &pcfg_pull_none>;//ISP_FLASHTRIGOU - }; - }; - - gps { - gps_mag: gps-mag { - rockchip,pins = <3 GPIO_B6 RK_FUNC_2 &pcfg_pull_none>; - }; - - gps_sig: gps-sig { - rockchip,pins = <3 GPIO_B7 RK_FUNC_2 &pcfg_pull_none>; - - }; - - gps_rfclk: gps-rfclk { - rockchip,pins = <3 GPIO_C0 RK_FUNC_3 &pcfg_pull_none>; - }; - }; - - gmac { - rgmii_pins: rgmii-pins { - rockchip,pins = <3 GPIO_C6 RK_FUNC_1 &pcfg_pull_none>,//MAC_CLK - <3 GPIO_D0 RK_FUNC_1 &pcfg_pull_none>,//MDIO - <3 GPIO_C3 RK_FUNC_1 &pcfg_pull_none>,//MDC - <3 GPIO_B0 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,//TXD0 - <3 GPIO_B1 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,//TXD1 - <3 GPIO_B2 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,//TXD2 - <3 GPIO_B6 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,//TXD3 - <3 GPIO_D4 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,//TXCLK - <3 GPIO_B5 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,//TXEN - <3 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>,//RXD0 - <3 GPIO_C0 RK_FUNC_1 &pcfg_pull_none>,//RXD1 - <3 GPIO_C1 RK_FUNC_1 &pcfg_pull_none>,//RXD2 - <3 GPIO_C2 RK_FUNC_1 &pcfg_pull_none>,//RXD3 - <3 GPIO_D1 RK_FUNC_1 &pcfg_pull_none>,//RXCLK - <3 GPIO_C4 RK_FUNC_1 &pcfg_pull_none>;//RXDV - }; - - rmii_pins: rmii-pins { - rockchip,pins = <3 GPIO_C6 RK_FUNC_1 &pcfg_pull_none>,//MAC_CLK - <3 GPIO_D0 RK_FUNC_1 &pcfg_pull_none>,//MDIO - <3 GPIO_C3 RK_FUNC_1 &pcfg_pull_none>,//MDC - <3 GPIO_B0 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,//TXD0 - <3 GPIO_B1 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,//TXD1 - <3 GPIO_B5 RK_FUNC_1 &pcfg_pull_none_drv_12ma>,//TXEN - <3 GPIO_B7 RK_FUNC_1 &pcfg_pull_none>,//RXD0 - <3 GPIO_C0 RK_FUNC_1 &pcfg_pull_none>,//RXD1 - <3 GPIO_C4 RK_FUNC_1 &pcfg_pull_none>,//RXDV - <3 GPIO_C5 RK_FUNC_1 &pcfg_pull_none>;//RXER - }; - }; - - tsadc_pin { - tsadc_int: tsadc-int { - rockchip,pins = <0 GPIO_A3 RK_FUNC_1 &pcfg_pull_none>; - }; - tsadc_gpio: tsadc-gpio { - rockchip,pins = <0 GPIO_A3 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - hdmi_pin { - hdmi_cec: hdmi-cec { - rockchip,pins = <3 GPIO_C7 RK_FUNC_1 &pcfg_pull_none>; - }; - }; - - hdmi_i2c { - hdmii2c_xfer: hdmii2c-xfer { - rockchip,pins = <3 GPIO_D2 RK_FUNC_1 &pcfg_pull_none>, - <3 GPIO_D3 RK_FUNC_1 &pcfg_pull_none>; - }; - }; - - cpu_jtag { - cpu_jtag: cpu-jtag { - rockchip,pins = <2 GPIO_A7 RK_FUNC_2 &pcfg_pull_up>, - <2 GPIO_B0 RK_FUNC_2 &pcfg_pull_up>; - }; - }; - - mcu_jtag { - mcu_jtag: mcu-jtag { - rockchip,pins = <2 GPIO_B2 RK_FUNC_2 &pcfg_pull_up>, - <2 GPIO_B1 RK_FUNC_2 &pcfg_pull_up>; - }; - }; - }; - - reboot { - compatible = "rockchip,rk3368-reboot"; - rockchip,cru = <&cru>; - rockchip,pmugrf = <&pmugrf>; - }; -}; diff --git a/arch/arm64/boot/dts/rk3368_dram_default_timing.dtsi b/arch/arm64/boot/dts/rk3368_dram_default_timing.dtsi deleted file mode 100644 index 49db2b2b6252..000000000000 --- a/arch/arm64/boot/dts/rk3368_dram_default_timing.dtsi +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2014-2015 ROCKCHIP, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include -#include - -/ { - ddr_timing: ddr_timing { - compatible = "rockchip,ddr-timing"; - dram_spd_bin = ; - sr_idle = <1>; - pd_idle = <0x20>; - dram_dll_disb_freq = <300>; - phy_dll_disb_freq = <400>; - dram_odt_disb_freq = <333>; - phy_odt_disb_freq = <333>; - ddr3_drv = ; - ddr3_odt = ; - lpddr3_drv = ; - lpddr3_odt = ; - lpddr2_drv = ;/*lpddr2 not supported odt*/ - phy_clk_drv = ; - phy_cmd_drv = ; - phy_dqs_drv = ; - phy_odt = ; - }; -}; -- 2.34.1