From 0febc4657b0edbf16b55ca5365d2b6aab45be7c5 Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Sun, 3 Oct 2010 18:59:45 +0000 Subject: [PATCH] Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do so and also change X86 for consistency. Investigating if this can be improved a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115469 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetELFWriterInfo.h | 3 +- lib/Target/ARM/ARMELFWriterInfo.cpp | 3 +- lib/Target/ARM/ARMSubtarget.h | 23 --------- lib/Target/ARM/ARMTargetMachine.cpp | 21 ++++++-- lib/Target/ARM/ARMTargetMachine.h | 19 ++++---- lib/Target/TargetELFWriterInfo.cpp | 5 +- lib/Target/X86/X86ELFWriterInfo.cpp | 4 +- lib/Target/X86/X86ELFWriterInfo.h | 2 +- lib/Target/X86/X86Subtarget.h | 14 ------ lib/Target/X86/X86TargetMachine.cpp | 23 +++++++-- lib/Target/X86/X86TargetMachine.h | 58 ++++++++++++++++++----- 11 files changed, 98 insertions(+), 77 deletions(-) diff --git a/include/llvm/Target/TargetELFWriterInfo.h b/include/llvm/Target/TargetELFWriterInfo.h index 7cb693155c2..b97f3e2f4d0 100644 --- a/include/llvm/Target/TargetELFWriterInfo.h +++ b/include/llvm/Target/TargetELFWriterInfo.h @@ -28,7 +28,6 @@ namespace llvm { // EMachine - This field is the target specific value to emit as the // e_machine member of the ELF header. unsigned short EMachine; - TargetMachine &TM; bool is64Bit, isLittleEndian; public: @@ -62,7 +61,7 @@ namespace llvm { ELFDATA2MSB = 2 // Big-endian object file }; - explicit TargetELFWriterInfo(TargetMachine &tm); + explicit TargetELFWriterInfo(bool is64Bit_, bool isLittleEndian_); virtual ~TargetELFWriterInfo(); unsigned short getEMachine() const { return EMachine; } diff --git a/lib/Target/ARM/ARMELFWriterInfo.cpp b/lib/Target/ARM/ARMELFWriterInfo.cpp index 1183e7efe12..85b690fd7aa 100644 --- a/lib/Target/ARM/ARMELFWriterInfo.cpp +++ b/lib/Target/ARM/ARMELFWriterInfo.cpp @@ -25,7 +25,8 @@ using namespace llvm; //===----------------------------------------------------------------------===// ARMELFWriterInfo::ARMELFWriterInfo(TargetMachine &TM) - : TargetELFWriterInfo(TM) { + : TargetELFWriterInfo(TM.getTargetData()->getPointerSizeInBits() == 64, + TM.getTargetData()->isLittleEndian()) { // silently OK construction } diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h index 1188c6dedd9..a946d3d3c88 100644 --- a/lib/Target/ARM/ARMSubtarget.h +++ b/lib/Target/ARM/ARMSubtarget.h @@ -213,29 +213,6 @@ protected: /// GVIsIndirectSymbol - true if the GV will be accessed via an indirect /// symbol. bool GVIsIndirectSymbol(const GlobalValue *GV, Reloc::Model RelocM) const; - - /// getDataLayout() - returns the ARM/Thumb specific TargetLayout string - std::string getDataLayout() const { - if (isThumb()) { - if (isAPCS_ABI()) { - return std::string("e-p:32:32-f64:32:64-i64:32:64-" - "i16:16:32-i8:8:32-i1:8:32-" - "v128:32:128-v64:32:64-a:0:32-n32"); - } else { - return std::string("e-p:32:32-f64:64:64-i64:64:64-" - "i16:16:32-i8:8:32-i1:8:32-" - "v128:64:128-v64:64:64-a:0:32-n32"); - } - } else { - if (isAPCS_ABI()) { - return std::string("e-p:32:32-f64:32:64-i64:32:64-" - "v128:32:128-v64:32:64-n32"); - } else { - return std::string("e-p:32:32-f64:64:64-i64:64:64-" - "v128:64:128-v64:64:64-n32"); - } - } - } }; } // End llvm namespace diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index 8d9bc5315c6..81279d257c0 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -91,17 +91,20 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, Subtarget(TT, FS, isThumb), FrameInfo(Subtarget), JITInfo(), - InstrItins(Subtarget.getInstrItineraryData()), - DataLayout(Subtarget.getDataLayout()), - ELFWriterInfo(*this) + InstrItins(Subtarget.getInstrItineraryData()) { DefRelocModel = getRelocationModel(); } ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT, const std::string &FS) - : ARMBaseTargetMachine(T, TT, FS, false), - InstrInfo(Subtarget), + : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget), + DataLayout(Subtarget.isAPCS_ABI() ? + std::string("e-p:32:32-f64:32:64-i64:32:64-" + "v128:32:128-v64:32:64-n32") : + std::string("e-p:32:32-f64:64:64-i64:64:64-" + "v128:64:128-v64:64:64-n32")), + ELFWriterInfo(*this), TLInfo(*this), TSInfo(*this) { if (!Subtarget.hasARMOps()) @@ -115,6 +118,14 @@ ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT, InstrInfo(Subtarget.hasThumb2() ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget)) : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))), + DataLayout(Subtarget.isAPCS_ABI() ? + std::string("e-p:32:32-f64:32:64-i64:32:64-" + "i16:16:32-i8:8:32-i1:8:32-" + "v128:32:128-v64:32:64-a:0:32-n32") : + std::string("e-p:32:32-f64:64:64-i64:64:64-" + "i16:16:32-i8:8:32-i1:8:32-" + "v128:64:128-v64:64:64-a:0:32-n32")), + ELFWriterInfo(*this), TLInfo(*this), TSInfo(*this) { } diff --git a/lib/Target/ARM/ARMTargetMachine.h b/lib/Target/ARM/ARMTargetMachine.h index 923c609e7b2..62f14a5a7fc 100644 --- a/lib/Target/ARM/ARMTargetMachine.h +++ b/lib/Target/ARM/ARMTargetMachine.h @@ -40,19 +40,10 @@ private: InstrItineraryData InstrItins; Reloc::Model DefRelocModel; // Reloc model before it's overridden. -protected: - const TargetData DataLayout; // Calculates type size & alignment - ARMELFWriterInfo ELFWriterInfo; - public: ARMBaseTargetMachine(const Target &T, const std::string &TT, const std::string &FS, bool isThumb); - virtual const TargetData *getTargetData() const { return &DataLayout; } - virtual const ARMELFWriterInfo *getELFWriterInfo() const { - return Subtarget.isTargetELF() ? &ELFWriterInfo : 0; - } - virtual const ARMFrameInfo *getFrameInfo() const { return &FrameInfo; } virtual ARMJITInfo *getJITInfo() { return &JITInfo; } virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; } @@ -74,6 +65,8 @@ public: /// class ARMTargetMachine : public ARMBaseTargetMachine { ARMInstrInfo InstrInfo; + const TargetData DataLayout; // Calculates type size & alignment + ARMELFWriterInfo ELFWriterInfo; ARMTargetLowering TLInfo; ARMSelectionDAGInfo TSInfo; public: @@ -94,6 +87,9 @@ public: virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; } virtual const TargetData *getTargetData() const { return &DataLayout; } + virtual const ARMELFWriterInfo *getELFWriterInfo() const { + return Subtarget.isTargetELF() ? &ELFWriterInfo : 0; + } }; /// ThumbTargetMachine - Thumb target machine. @@ -103,6 +99,8 @@ public: class ThumbTargetMachine : public ARMBaseTargetMachine { // Either Thumb1InstrInfo or Thumb2InstrInfo. OwningPtr InstrInfo; + const TargetData DataLayout; // Calculates type size & alignment + ARMELFWriterInfo ELFWriterInfo; ARMTargetLowering TLInfo; ARMSelectionDAGInfo TSInfo; public: @@ -127,6 +125,9 @@ public: return InstrInfo.get(); } virtual const TargetData *getTargetData() const { return &DataLayout; } + virtual const ARMELFWriterInfo *getELFWriterInfo() const { + return Subtarget.isTargetELF() ? &ELFWriterInfo : 0; + } }; } // end namespace llvm diff --git a/lib/Target/TargetELFWriterInfo.cpp b/lib/Target/TargetELFWriterInfo.cpp index 3631b350134..a661ee9c0c6 100644 --- a/lib/Target/TargetELFWriterInfo.cpp +++ b/lib/Target/TargetELFWriterInfo.cpp @@ -17,9 +17,8 @@ #include "llvm/Target/TargetMachine.h" using namespace llvm; -TargetELFWriterInfo::TargetELFWriterInfo(TargetMachine &tm) : TM(tm) { - is64Bit = TM.getTargetData()->getPointerSizeInBits() == 64; - isLittleEndian = TM.getTargetData()->isLittleEndian(); +TargetELFWriterInfo::TargetELFWriterInfo(bool is64Bit_, bool isLittleEndian_) : + is64Bit(is64Bit_), isLittleEndian(isLittleEndian_) { } TargetELFWriterInfo::~TargetELFWriterInfo() {} diff --git a/lib/Target/X86/X86ELFWriterInfo.cpp b/lib/Target/X86/X86ELFWriterInfo.cpp index f84995dcf34..3b721b4fe0e 100644 --- a/lib/Target/X86/X86ELFWriterInfo.cpp +++ b/lib/Target/X86/X86ELFWriterInfo.cpp @@ -24,8 +24,8 @@ using namespace llvm; // Implementation of the X86ELFWriterInfo class //===----------------------------------------------------------------------===// -X86ELFWriterInfo::X86ELFWriterInfo(TargetMachine &TM) - : TargetELFWriterInfo(TM) { +X86ELFWriterInfo::X86ELFWriterInfo(bool is64Bit_, bool isLittleEndian_) + : TargetELFWriterInfo(is64Bit_, isLittleEndian_) { EMachine = is64Bit ? EM_X86_64 : EM_386; } diff --git a/lib/Target/X86/X86ELFWriterInfo.h b/lib/Target/X86/X86ELFWriterInfo.h index 342e6e627d2..7d37d956ae3 100644 --- a/lib/Target/X86/X86ELFWriterInfo.h +++ b/lib/Target/X86/X86ELFWriterInfo.h @@ -38,7 +38,7 @@ namespace llvm { }; public: - X86ELFWriterInfo(TargetMachine &TM); + X86ELFWriterInfo(bool is64Bit_, bool isLittleEndian_); virtual ~X86ELFWriterInfo(); /// getRelocationType - Returns the target specific ELF Relocation type. diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h index c8232bfe051..2e7312470b6 100644 --- a/lib/Target/X86/X86Subtarget.h +++ b/lib/Target/X86/X86Subtarget.h @@ -190,20 +190,6 @@ public: return !Is64Bit && (isTargetMingw() || isTargetWindows()); } - std::string getDataLayout() const { - const char *p; - if (is64Bit()) - p = "e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-n8:16:32:64"; - else if (isTargetDarwin()) - p = "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-n8:16:32"; - else if (isTargetCygMing() || isTargetWindows()) - p = "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-n8:16:32"; - else - p = "e-p:32:32-f64:32:64-i64:32:64-f80:32:32-n8:16:32"; - - return std::string(p); - } - bool isPICStyleSet() const { return PICStyle != PICStyles::None; } bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; } bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; } diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index ce8636eb72b..4e435eecb1e 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -89,13 +89,28 @@ extern "C" void LLVMInitializeX86Target() { X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT, const std::string &FS) - : X86TargetMachine(T, TT, FS, false) { + : X86TargetMachine(T, TT, FS, false), + DataLayout(getSubtargetImpl()->isTargetDarwin() ? + "e-p:32:32-f64:32:64-i64:32:64-f80:128:128-n8:16:32" : + (getSubtargetImpl()->isTargetCygMing() || + getSubtargetImpl()->isTargetWindows()) ? + "e-p:32:32-f64:64:64-i64:64:64-f80:32:32-n8:16:32" : + "e-p:32:32-f64:32:64-i64:32:64-f80:32:32-n8:16:32"), + InstrInfo(*this), + TSInfo(*this), + TLInfo(*this), + JITInfo(*this) { } X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT, const std::string &FS) - : X86TargetMachine(T, TT, FS, true) { + : X86TargetMachine(T, TT, FS, true), + DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-n8:16:32:64"), + InstrInfo(*this), + TSInfo(*this), + TLInfo(*this), + JITInfo(*this) { } /// X86TargetMachine ctor - Create an X86 target. @@ -104,13 +119,11 @@ X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT, const std::string &FS, bool is64Bit) : LLVMTargetMachine(T, TT), Subtarget(TT, FS, is64Bit), - DataLayout(Subtarget.getDataLayout()), FrameInfo(TargetFrameInfo::StackGrowsDown, Subtarget.getStackAlignment(), (Subtarget.isTargetWin64() ? -40 : (Subtarget.is64Bit() ? -8 : -4))), - InstrInfo(*this), JITInfo(*this), TLInfo(*this), TSInfo(*this), - ELFWriterInfo(*this) { + ELFWriterInfo(is64Bit, true) { DefRelocModel = getRelocationModel(); // If no relocation model was picked, default as appropriate for the target. diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h index f9fb424e2d2..2b4b3262d16 100644 --- a/lib/Target/X86/X86TargetMachine.h +++ b/lib/Target/X86/X86TargetMachine.h @@ -31,12 +31,7 @@ class formatted_raw_ostream; class X86TargetMachine : public LLVMTargetMachine { X86Subtarget Subtarget; - const TargetData DataLayout; // Calculates type size & alignment TargetFrameInfo FrameInfo; - X86InstrInfo InstrInfo; - X86JITInfo JITInfo; - X86TargetLowering TLInfo; - X86SelectionDAGInfo TSInfo; X86ELFWriterInfo ELFWriterInfo; Reloc::Model DefRelocModel; // Reloc model before it's overridden. @@ -49,20 +44,23 @@ public: X86TargetMachine(const Target &T, const std::string &TT, const std::string &FS, bool is64Bit); - virtual const X86InstrInfo *getInstrInfo() const { return &InstrInfo; } + virtual const X86InstrInfo *getInstrInfo() const { + llvm_unreachable("getInstrInfo not implemented"); + } virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; } - virtual X86JITInfo *getJITInfo() { return &JITInfo; } + virtual X86JITInfo *getJITInfo() { + llvm_unreachable("getJITInfo not implemented"); + } virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; } - virtual const X86TargetLowering *getTargetLowering() const { - return &TLInfo; + virtual const X86TargetLowering *getTargetLowering() const { + llvm_unreachable("getTargetLowering not implemented"); } virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const { - return &TSInfo; + llvm_unreachable("getSelectionDAGInfo not implemented"); } virtual const X86RegisterInfo *getRegisterInfo() const { - return &InstrInfo.getRegisterInfo(); + return &getInstrInfo()->getRegisterInfo(); } - virtual const TargetData *getTargetData() const { return &DataLayout; } virtual const X86ELFWriterInfo *getELFWriterInfo() const { return Subtarget.isTargetELF() ? &ELFWriterInfo : 0; } @@ -79,17 +77,53 @@ public: /// X86_32TargetMachine - X86 32-bit target machine. /// class X86_32TargetMachine : public X86TargetMachine { + const TargetData DataLayout; // Calculates type size & alignment + X86InstrInfo InstrInfo; + X86SelectionDAGInfo TSInfo; + X86TargetLowering TLInfo; + X86JITInfo JITInfo; public: X86_32TargetMachine(const Target &T, const std::string &M, const std::string &FS); + virtual const TargetData *getTargetData() const { return &DataLayout; } + virtual const X86TargetLowering *getTargetLowering() const { + return &TLInfo; + } + virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const { + return &TSInfo; + } + virtual const X86InstrInfo *getInstrInfo() const { + return &InstrInfo; + } + virtual X86JITInfo *getJITInfo() { + return &JITInfo; + } }; /// X86_64TargetMachine - X86 64-bit target machine. /// class X86_64TargetMachine : public X86TargetMachine { + const TargetData DataLayout; // Calculates type size & alignment + X86InstrInfo InstrInfo; + X86SelectionDAGInfo TSInfo; + X86TargetLowering TLInfo; + X86JITInfo JITInfo; public: X86_64TargetMachine(const Target &T, const std::string &TT, const std::string &FS); + virtual const TargetData *getTargetData() const { return &DataLayout; } + virtual const X86TargetLowering *getTargetLowering() const { + return &TLInfo; + } + virtual const X86SelectionDAGInfo *getSelectionDAGInfo() const { + return &TSInfo; + } + virtual const X86InstrInfo *getInstrInfo() const { + return &InstrInfo; + } + virtual X86JITInfo *getJITInfo() { + return &JITInfo; + } }; } // End llvm namespace -- 2.34.1