From 0fec975a183002d9bf59a4c224c048ef9dfd0ba2 Mon Sep 17 00:00:00 2001
From: Nate Begeman <natebegeman@mac.com>
Date: Thu, 14 Feb 2008 07:25:46 +0000
Subject: [PATCH] Move some useful operands up into the all-targets .td

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47115 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/CellSPU/SPUOperands.td | 3 ---
 lib/Target/Target.td              | 3 +++
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/Target/CellSPU/SPUOperands.td b/lib/Target/CellSPU/SPUOperands.td
index 2a3551d4f64..79d1a7a348a 100644
--- a/lib/Target/CellSPU/SPUOperands.td
+++ b/lib/Target/CellSPU/SPUOperands.td
@@ -538,9 +538,6 @@ def rotNeg7imm_i16 : Operand<i16> {
   let PrintMethod = "printROTNeg7Imm";
 }
 
-// Floating point immediate operands
-def f32imm : Operand<f32>;
-
 def target : Operand<OtherVT> {
   let PrintMethod = "printBranchOperand";
 }
diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index a2669dca4ae..f8fa719ad05 100644
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -277,6 +277,9 @@ def i16imm : Operand<i16>;
 def i32imm : Operand<i32>;
 def i64imm : Operand<i64>;
 
+def f32imm : Operand<f32>;
+def f64imm : Operand<f64>;
+
 /// zero_reg definition - Special node to stand for the zero register.
 ///
 def zero_reg;
-- 
2.34.1