From 10a6b7ab656ddce1acfa1216311d2564edaecbe3 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Mon, 28 Apr 2008 18:19:43 +0000 Subject: [PATCH] Add a comment to CreateRegForValue that clarifies the handling of aggregate types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50366 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 46b0cf576f4..93de6523983 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -369,6 +369,10 @@ FunctionLoweringInfo::FunctionLoweringInfo(TargetLowering &tli, /// CreateRegForValue - Allocate the appropriate number of virtual registers of /// the correctly promoted or expanded types. Assign these registers /// consecutive vreg numbers and return the first assigned number. +/// +/// In the case that the given value has struct or array type, this function +/// will assign registers for each member or element. +/// unsigned FunctionLoweringInfo::CreateRegForValue(const Value *V) { SmallVector ValueVTs; ComputeValueVTs(TLI, V->getType(), ValueVTs); -- 2.34.1