From 112e8dd4556c5e99628549cdb809679268cee94c Mon Sep 17 00:00:00 2001 From: xxx Date: Wed, 9 May 2012 20:40:08 -0700 Subject: [PATCH] clock date :gpu support round rate --- arch/arm/mach-rk30/board-rk30-sdk.c | 2 +- arch/arm/mach-rk30/clock_data.c | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) mode change 100644 => 100755 arch/arm/mach-rk30/board-rk30-sdk.c mode change 100755 => 100644 arch/arm/mach-rk30/clock_data.c diff --git a/arch/arm/mach-rk30/board-rk30-sdk.c b/arch/arm/mach-rk30/board-rk30-sdk.c old mode 100644 new mode 100755 index c295625b592f..615c63d66532 --- a/arch/arm/mach-rk30/board-rk30-sdk.c +++ b/arch/arm/mach-rk30/board-rk30-sdk.c @@ -1442,7 +1442,7 @@ static struct dvfs_arm_table dvfs_cpu_logic_table[] = { }; static struct cpufreq_frequency_table dvfs_gpu_table[] = { {.frequency = 266 * 1000, .index = 1000 * 1000}, - {.frequency = 400 * 1000, .index = 1350 * 1000}, + {.frequency = 400 * 1000, .index = 1300 * 1000}, {.frequency = CPUFREQ_TABLE_END}, }; diff --git a/arch/arm/mach-rk30/clock_data.c b/arch/arm/mach-rk30/clock_data.c old mode 100755 new mode 100644 index 8d37b035b03a..b14cb0929072 --- a/arch/arm/mach-rk30/clock_data.c +++ b/arch/arm/mach-rk30/clock_data.c @@ -1059,12 +1059,17 @@ static struct clk general_pll_clk = { .pll= &gpll_data }; /********************************clocks***********************************/ +static int ddr_clk_set_rate(struct clk *c, unsigned long rate) +{ + return 0; +} static struct clk *clk_ddr_parents[2] = {&ddr_pll_clk, &general_pll_clk}; static struct clk clk_ddr = { .name = "ddr", .parent = &ddr_pll_clk, .recalc = clksel_recalc_shift, + .set_rate = ddr_clk_set_rate, .clksel_con = CRU_CLKSELS_CON(26), //CRU_DIV_SET(0x3,0,4), //CRU_SRC_SET(1,8), @@ -2251,6 +2256,7 @@ static struct clk clk_gpu = { .name = "gpu", .mode = gate_mode, .recalc = clksel_recalc_div, + .round_rate = clk_freediv_round_autosel_parents_rate, .set_rate = clkset_rate_freediv_autosel_parents, .clksel_con = CRU_CLKSELS_CON(33), .gate_idx = CLK_GATE_GPU_SRC, -- 2.34.1