From 11cefd926a1be9e6cd52b4e189a99081a385d57f Mon Sep 17 00:00:00 2001 From: Nate Begeman Date: Sat, 16 Jul 2005 02:00:20 +0000 Subject: [PATCH] Teach the register allocator that movaps is also a move instruction git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22451 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrInfo.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 957360b2013..2fec723b25b 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -28,7 +28,7 @@ bool X86InstrInfo::isMoveInstr(const MachineInstr& MI, unsigned& destReg) const { MachineOpCode oc = MI.getOpcode(); if (oc == X86::MOV8rr || oc == X86::MOV16rr || oc == X86::MOV32rr || - oc == X86::FpMOV || oc == X86::MOVAPDrr) { + oc == X86::FpMOV || oc == X86::MOVAPDrr || oc == X86::MOVAPSrr) { assert(MI.getNumOperands() == 2 && MI.getOperand(0).isRegister() && MI.getOperand(1).isRegister() && -- 2.34.1