From 1206f1968b0886ab41739aebe113dd4813f3fc46 Mon Sep 17 00:00:00 2001 From: Zoran Jovanovic Date: Wed, 13 Nov 2013 13:15:03 +0000 Subject: [PATCH] Support for microMIPS trap instruction with immediate operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194569 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MicroMipsInstrFormats.td | 12 ++++++++++++ lib/Target/Mips/MicroMipsInstrInfo.td | 7 +++++++ lib/Target/Mips/MipsInstrFormats.td | 2 +- lib/Target/Mips/MipsInstrInfo.td | 14 +++++++------- test/MC/Disassembler/Mips/micromips.txt | 18 ++++++++++++++++++ test/MC/Disassembler/Mips/micromips_le.txt | 18 ++++++++++++++++++ test/MC/Mips/micromips-trap-instructions.s | 18 ++++++++++++++++++ 7 files changed, 81 insertions(+), 8 deletions(-) diff --git a/lib/Target/Mips/MicroMipsInstrFormats.td b/lib/Target/Mips/MicroMipsInstrFormats.td index 8b7fb8159e9..86470306297 100644 --- a/lib/Target/Mips/MicroMipsInstrFormats.td +++ b/lib/Target/Mips/MicroMipsInstrFormats.td @@ -290,3 +290,15 @@ class TEQ_FM_MM funct> : MMArch { let Inst{11-6} = funct; let Inst{5-0} = 0x3c; } + +class TEQI_FM_MM funct> : MMArch { + bits<5> rs; + bits<16> imm16; + + bits<32> Inst; + + let Inst{31-26} = 0x10; + let Inst{25-21} = funct; + let Inst{20-16} = rs; + let Inst{15-0} = imm16; +} diff --git a/lib/Target/Mips/MicroMipsInstrInfo.td b/lib/Target/Mips/MicroMipsInstrInfo.td index 67fa78c6ca0..d9507fa88eb 100644 --- a/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/lib/Target/Mips/MicroMipsInstrInfo.td @@ -209,4 +209,11 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { def TLT_MM : MMRel, TEQ_FT<"tlt", GPR32Opnd>, TEQ_FM_MM<0x20>; def TLTU_MM : MMRel, TEQ_FT<"tltu", GPR32Opnd>, TEQ_FM_MM<0x28>; def TNE_MM : MMRel, TEQ_FT<"tne", GPR32Opnd>, TEQ_FM_MM<0x30>; + + def TEQI_MM : MMRel, TEQI_FT<"teqi", GPR32Opnd>, TEQI_FM_MM<0x0e>; + def TGEI_MM : MMRel, TEQI_FT<"tgei", GPR32Opnd>, TEQI_FM_MM<0x09>; + def TGEIU_MM : MMRel, TEQI_FT<"tgeiu", GPR32Opnd>, TEQI_FM_MM<0x0b>; + def TLTI_MM : MMRel, TEQI_FT<"tlti", GPR32Opnd>, TEQI_FM_MM<0x08>; + def TLTIU_MM : MMRel, TEQI_FT<"tltiu", GPR32Opnd>, TEQI_FM_MM<0x0a>; + def TNEI_MM : MMRel, TEQI_FT<"tnei", GPR32Opnd>, TEQI_FM_MM<0x0c>; } diff --git a/lib/Target/Mips/MipsInstrFormats.td b/lib/Target/Mips/MipsInstrFormats.td index 8dbbab228e8..737a018c67a 100644 --- a/lib/Target/Mips/MipsInstrFormats.td +++ b/lib/Target/Mips/MipsInstrFormats.td @@ -468,7 +468,7 @@ class TEQ_FM funct> : StdArch { let Inst{5-0} = funct; } -class TEQI_FM funct> { +class TEQI_FM funct> : StdArch { bits<5> rs; bits<16> imm16; diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 87810bfc44d..02efb3d13f4 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -663,7 +663,7 @@ class TEQ_FT : class TEQI_FT : InstSE<(outs), (ins RO:$rs, uimm16:$imm16), - !strconcat(opstr, "\t$rs, $imm16"), [], NoItinerary, FrmOther>; + !strconcat(opstr, "\t$rs, $imm16"), [], NoItinerary, FrmOther, opstr>; // Mul, Div class Mult DefRegs> : @@ -971,12 +971,12 @@ def TLT : MMRel, TEQ_FT<"tlt", GPR32Opnd>, TEQ_FM<0x32>; def TLTU : MMRel, TEQ_FT<"tltu", GPR32Opnd>, TEQ_FM<0x33>; def TNE : MMRel, TEQ_FT<"tne", GPR32Opnd>, TEQ_FM<0x36>; -def TEQI : TEQI_FT<"teqi", GPR32Opnd>, TEQI_FM<0xc>; -def TGEI : TEQI_FT<"tgei", GPR32Opnd>, TEQI_FM<0x8>; -def TGEIU : TEQI_FT<"tgeiu", GPR32Opnd>, TEQI_FM<0x9>; -def TLTI : TEQI_FT<"tlti", GPR32Opnd>, TEQI_FM<0xa>; -def TTLTIU : TEQI_FT<"tltiu", GPR32Opnd>, TEQI_FM<0xb>; -def TNEI : TEQI_FT<"tnei", GPR32Opnd>, TEQI_FM<0xe>; +def TEQI : MMRel, TEQI_FT<"teqi", GPR32Opnd>, TEQI_FM<0xc>; +def TGEI : MMRel, TEQI_FT<"tgei", GPR32Opnd>, TEQI_FM<0x8>; +def TGEIU : MMRel, TEQI_FT<"tgeiu", GPR32Opnd>, TEQI_FM<0x9>; +def TLTI : MMRel, TEQI_FT<"tlti", GPR32Opnd>, TEQI_FM<0xa>; +def TTLTIU : MMRel, TEQI_FT<"tltiu", GPR32Opnd>, TEQI_FM<0xb>; +def TNEI : MMRel, TEQI_FT<"tnei", GPR32Opnd>, TEQI_FM<0xe>; def BREAK : BRK_FT<"break">, BRK_FM<0xd>; def SYSCALL : SYS_FT<"syscall">, SYS_FM<0xc>; diff --git a/test/MC/Disassembler/Mips/micromips.txt b/test/MC/Disassembler/Mips/micromips.txt index e005e671786..b2d0cc02fc7 100644 --- a/test/MC/Disassembler/Mips/micromips.txt +++ b/test/MC/Disassembler/Mips/micromips.txt @@ -267,3 +267,21 @@ # CHECK: tne $8, $9, 0 0x01 0x28 0x0c 0x3c + +# CHECK: teqi $9, 17767 +0x41,0xc9,0x45,0x67 + +# CHECK: tgei $9, 17767 +0x41 0x29 0x45 0x67 + +# CHECK: tgeiu $9, 17767 +0x41 0x69 0x45 0x67 + +# CHECK: tlti $9, 17767 +0x41 0x09 0x45 0x67 + +# CHECK: tltiu $9, 17767 +0x41 0x49 0x45 0x67 + +# CHECK: tnei $9, 17767 +0x41 0x89 0x45 0x67 diff --git a/test/MC/Disassembler/Mips/micromips_le.txt b/test/MC/Disassembler/Mips/micromips_le.txt index 0110cbd1166..5b2fe30dd06 100644 --- a/test/MC/Disassembler/Mips/micromips_le.txt +++ b/test/MC/Disassembler/Mips/micromips_le.txt @@ -267,3 +267,21 @@ # CHECK: tne $8, $9, 0 0x28 0x01 0x3c 0x0c + +# CHECK: teqi $9, 17767 +0xc9 0x41 0x67 0x45 + +# CHECK: tgei $9, 17767 +0x29 0x41 0x67 0x45 + +# CHECK: tgeiu $9, 17767 +0x69 0x41 0x67 0x45 + +# CHECK: tlti $9, 17767 +0x09 0x41 0x67 0x45 + +# CHECK: tltiu $9, 17767 +0x49 0x41 0x67 0x45 + +# CHECK: tnei $9, 17767 +0x89 0x41 0x67 0x45 diff --git a/test/MC/Mips/micromips-trap-instructions.s b/test/MC/Mips/micromips-trap-instructions.s index a98e02c627a..d26b1b20486 100644 --- a/test/MC/Mips/micromips-trap-instructions.s +++ b/test/MC/Mips/micromips-trap-instructions.s @@ -15,6 +15,12 @@ # CHECK-EL: tlt $8, $9, 0 # encoding: [0x28,0x01,0x3c,0x08] # CHECK-EL: tltu $8, $9, 0 # encoding: [0x28,0x01,0x3c,0x0a] # CHECK-EL: tne $8, $9, 0 # encoding: [0x28,0x01,0x3c,0x0c] +# CHECK-EL: teqi $9, 17767 # encoding: [0xc9,0x41,0x67,0x45] +# CHECK-EL: tgei $9, 17767 # encoding: [0x29,0x41,0x67,0x45] +# CHECK-EL: tgeiu $9, 17767 # encoding: [0x69,0x41,0x67,0x45] +# CHECK-EL: tlti $9, 17767 # encoding: [0x09,0x41,0x67,0x45] +# CHECK-EL: tltiu $9, 17767 # encoding: [0x49,0x41,0x67,0x45] +# CHECK-EL: tnei $9, 17767 # encoding: [0x89,0x41,0x67,0x45] #------------------------------------------------------------------------------ # Big endian #------------------------------------------------------------------------------ @@ -24,9 +30,21 @@ # CHECK-EB: tlt $8, $9, 0 # encoding: [0x01,0x28,0x08,0x3c] # CHECK-EB: tltu $8, $9, 0 # encoding: [0x01,0x28,0x0a,0x3c] # CHECK-EB: tne $8, $9, 0 # encoding: [0x01,0x28,0x0c,0x3c] +# CHECK-EB: teqi $9, 17767 # encoding: [0x41,0xc9,0x45,0x67] +# CHECK-EB: tgei $9, 17767 # encoding: [0x41,0x29,0x45,0x67] +# CHECK-EB: tgeiu $9, 17767 # encoding: [0x41,0x69,0x45,0x67] +# CHECK-EB: tlti $9, 17767 # encoding: [0x41,0x09,0x45,0x67] +# CHECK-EB: tltiu $9, 17767 # encoding: [0x41,0x49,0x45,0x67] +# CHECK-EB: tnei $9, 17767 # encoding: [0x41,0x89,0x45,0x67] teq $8, $9, 0 tge $8, $9, 0 tgeu $8, $9, 0 tlt $8, $9, 0 tltu $8, $9, 0 tne $8, $9, 0 + teqi $9, 17767 + tgei $9, 17767 + tgeiu $9, 17767 + tlti $9, 17767 + tltiu $9, 17767 + tnei $9, 17767 -- 2.34.1