From 1512642973f8b86e8375d93f6b30a2930e68d224 Mon Sep 17 00:00:00 2001 From: Duncan Sands Date: Tue, 8 Jul 2008 09:33:14 +0000 Subject: [PATCH] Pacify gcc-4.3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53227 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsISelLowering.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 323af2afc77..0b534859167 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -824,11 +824,12 @@ getRegForInlineAsmConstraint(const std::string &Constraint, MVT VT) const case 'r': return std::make_pair(0U, Mips::CPURegsRegisterClass); case 'f': - if (VT == MVT::f32) + if (VT == MVT::f32) { if (Subtarget->isSingleFloat()) return std::make_pair(0U, Mips::FGR32RegisterClass); else return std::make_pair(0U, Mips::AFGR32RegisterClass); + } if (VT == MVT::f64) if ((!Subtarget->isSingleFloat()) && (!Subtarget->isFP64bit())) return std::make_pair(0U, Mips::AFGR64RegisterClass); @@ -859,7 +860,7 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint, Mips::T8, 0); case 'f': - if (VT == MVT::f32) + if (VT == MVT::f32) { if (Subtarget->isSingleFloat()) return make_vector(Mips::F2, Mips::F3, Mips::F4, Mips::F5, Mips::F6, Mips::F7, Mips::F8, Mips::F9, Mips::F10, Mips::F11, @@ -870,6 +871,7 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint, return make_vector(Mips::F2, Mips::F4, Mips::F6, Mips::F8, Mips::F10, Mips::F20, Mips::F22, Mips::F24, Mips::F26, Mips::F28, Mips::F30, 0); + } if (VT == MVT::f64) if ((!Subtarget->isSingleFloat()) && (!Subtarget->isFP64bit())) -- 2.34.1