From 16d597a20d405d8cb13f89f15b8c1fed20428808 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 21 Feb 2006 23:51:58 +0000 Subject: [PATCH] expose the set of values types holdable in a regclass to clients git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26307 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/MRegisterInfo.h | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/include/llvm/Target/MRegisterInfo.h b/include/llvm/Target/MRegisterInfo.h index 99d2929a018..2f6d1308cbe 100644 --- a/include/llvm/Target/MRegisterInfo.h +++ b/include/llvm/Target/MRegisterInfo.h @@ -44,8 +44,9 @@ public: typedef const unsigned* iterator; typedef const unsigned* const_iterator; + typedef const MVT::ValueType* vt_iterator; private: - const MVT::ValueType* VTs; + const vt_iterator VTs; const unsigned RegSize, Alignment; // Size & Alignment of register in bytes const iterator RegsBegin, RegsEnd; public: @@ -84,6 +85,21 @@ public: return false; } + /// vt_begin - Loop over all of the value types that can be represented by + /// values in this register class. + vt_iterator vt_begin() const { + return VTs; + } + + /// vt_begin - Loop over all of the value types that can be represented by + /// values in this register class. + vt_iterator vt_end() const { + vt_iterator I = VTs; + while (*I != MVT::Other) ++I; + return I; + } + + /// allocation_order_begin/end - These methods define a range of registers /// which specify the registers in this class that are valid to register /// allocate, and the preferred order to allocate them in. For example, -- 2.34.1