From 19949158f702d472801960f2c7ccc3f94e225542 Mon Sep 17 00:00:00 2001 From: Wu Liang feng Date: Wed, 23 Mar 2016 16:25:57 +0800 Subject: [PATCH] usb: dwc3: rockchip: Add device tree binding Rockchip USB3.0 core wrapper consist of USB3.0 IP from Synopsys (SNPS) and HS, SS PHY's control and configuration registers. Change-Id: I116b66c3b417cfecc968414db9912813a0ef2c5d Signed-off-by: Wu Liang feng --- .../devicetree/bindings/usb/dwc3-rockchip.txt | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/dwc3-rockchip.txt diff --git a/Documentation/devicetree/bindings/usb/dwc3-rockchip.txt b/Documentation/devicetree/bindings/usb/dwc3-rockchip.txt new file mode 100644 index 000000000000..870a164558a5 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/dwc3-rockchip.txt @@ -0,0 +1,50 @@ +Rockchip SuperSpeed DWC3 USB SoC controller + +Required properties: +- compatible: should contain "rockchip,dwc3" +- clocks: A list of phandle + clock-specifier pairs for the + clocks listed in clock-names +- clock-names: Should contain the following: + "clk_usb3otg0_ref" Controller reference clk + "clk_usb3otg0_suspend"Controller suspend clk, can use 24 MHz or 32 KHz + "aclk_usb3" Master/Core clock, have to be >= 62.5 MHz for SS operation + + +Optional clocks: + "aclk_usb3otg0" Aclk for specific usb controller clock. + "aclk_usb3_rksoc_axi_perf" USB AXI perf clock. Not present on all platforms. + "aclk_usb3_noc" USB noc clock. Not present on all platforms. + "aclk_usb3_grf" USB grf clock. Not present on all platforms. + +Required child node: +A child node must exist to represent the core DWC3 IP block. The name of +the node is not important. The content of the node is defined in dwc3.txt. + +Phy documentation is provided in the following places: + +Example device nodes: + + usbdrd3_0: usb@fe800000 { + compatible = "rockchip,dwc3"; + clocks = <&cru SCLK_USB3OTG0_REF>, <&cru SCLK_USB3OTG0_SUSPEND>, + <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_RKSOC_AXI_PERF>, + <&cru ACLK_USB3>, <&cru ACLK_USB3_NOC>, + <&cru ACLK_USB3_GRF>; + clock-names = "clk_usb3otg0_ref", "clk_usb3otg0_suspend", + "aclk_usb3otg0", "aclk_usb3_rksoc_axi_perf", + "aclk_usb3", "aclk_usb3_noc", + "aclk_usb3_grf"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + usbdrd_dwc3_0: dwc3 { + compatible = "snps,dwc3"; + reg = <0x0 0xfe800000 0x0 0x100000>; + interrupts = ; + dr_mode = "otg"; + tx-fifo-resize; + status = "disabled"; + }; + }; + -- 2.34.1