From 19c26002e1f8245583120a6215c317c3ba9a14aa Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Tue, 28 Feb 2017 15:51:28 +0800 Subject: [PATCH] ARM64: dts: rockchip: rk3399: change the pll init freq set npll init freq 600M set gpll init freq 800M Change-Id: I110cc4b4051504dd875712bce9e473f74d8578b4 Signed-off-by: Elaine Zhang --- arch/arm64/boot/dts/rockchip/rk3399-vop-clk-set.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-vop-clk-set.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-vop-clk-set.dtsi index 0ca60fb589ce..499ff820e7eb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-vop-clk-set.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-vop-clk-set.dtsi @@ -111,8 +111,8 @@ <&cru PCLK_ALIVE>, <&cru ACLK_GMAC>, <&cru SCLK_CS>, <&cru SCLK_CCI_TRACE>, <&cru ARMCLKL>, <&cru ARMCLKB>, - <&cru PLL_GPLL>, <&cru ACLK_GPU>, - <&cru PLL_NPLL>, <&cru ACLK_PERIHP>, + <&cru PLL_NPLL>, <&cru ACLK_GPU>, + <&cru PLL_GPLL>, <&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>, <&cru PCLK_PERIHP>, <&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>, <&cru PCLK_PERILP0>, <&cru HCLK_PERILP1>, @@ -150,7 +150,7 @@ <50000000>, <100000000>, <75000000>, <75000000>, <816000000>, <816000000>, - <1200000000>, <200000000>, + <600000000>, <200000000>, <800000000>, <150000000>, <75000000>, <37500000>, <100000000>, <100000000>, -- 2.34.1