From 1b5232a93767eac1424c67fb86580deef97e21e0 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 2 Apr 2006 06:19:46 +0000 Subject: [PATCH] relax assertion git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27358 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 9a2c9a19fb6..392b4892975 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -935,7 +935,10 @@ void TargetLowering::computeMaskedBitsForTargetNode(const SDOperand Op, uint64_t &KnownZero, uint64_t &KnownOne, unsigned Depth) const { - assert(Op.getOpcode() >= ISD::BUILTIN_OP_END && + assert((Op.getOpcode() >= ISD::BUILTIN_OP_END || + Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || + Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || + Op.getOpcode() == ISD::INTRINSIC_VOID) && "Should use MaskedValueIsZero if you don't know whether Op" " is a target node!"); KnownZero = 0; -- 2.34.1