From 1b8f13ca4cbf3fbd532419f8c31618c81adffa3a Mon Sep 17 00:00:00 2001 From: =?utf8?q?=E9=99=88=E4=BA=AE?= Date: Wed, 18 Jun 2014 05:15:42 -0700 Subject: [PATCH] ddr_freq: fix Division by zero in kernel --- arch/arm/mach-rockchip/ddr_freq.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/ddr_freq.c b/arch/arm/mach-rockchip/ddr_freq.c index a68c703b6807..2cf82297e646 100644 --- a/arch/arm/mach-rockchip/ddr_freq.c +++ b/arch/arm/mach-rockchip/ddr_freq.c @@ -282,6 +282,8 @@ void ddr_bandwidth_get(struct ddr_bw_info *ddr_bw_ch0, struct ddr_bw_info *ddr_b ddr_bw_val[j][i] = grf_readl(RK3288_GRF_SOC_STATUS11+i*4+j*16); } } + if (!ddr_bw_val[0][ddrbw_time_num]) + goto end; if (ddr_bw_ch0) { ddr_freq = readl_relaxed(RK_DDR_VIRT + 0xc0); @@ -320,7 +322,7 @@ void ddr_bandwidth_get(struct ddr_bw_info *ddr_bw_ch0, struct ddr_bw_info *ddr_b ddr_bw_ch0->vio1 = ddr_bw_ch0->vio1*ddr_freq/ddr_bw_val[0][ddrbw_time_num]; ddr_bw_ch0->vio2 = ddr_bw_ch0->vio2*ddr_freq/ddr_bw_val[0][ddrbw_time_num]; } - +end: ddr_monitor_start(); } -- 2.34.1