From 1f58741aabd00545468f4ecf29db3dba8e0bd6ac Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Thu, 2 Sep 2010 02:30:46 +0000 Subject: [PATCH] Clang's -ccc-host-triple was ignoring the arch specifier on my triple, I don't need to implement this quite yet - and not for ConstantInt anyhow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112798 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMFastISel.cpp | 25 +++---------------------- 1 file changed, 3 insertions(+), 22 deletions(-) diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 866b14fab3a..ee4a664dd31 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -323,28 +323,9 @@ unsigned ARMFastISel::FastEmitInst_extractsubreg(MVT RetVT, } unsigned ARMFastISel::TargetMaterializeConstant(const Constant *C) { - const ConstantInt *CI = dyn_cast(C); - if (!CI) return 0; - - unsigned Opc; - bool Signed = true; - EVT VT = TLI.getValueType(CI->getType(), true); - - switch (VT.getSimpleVT().SimpleTy) { - default: return 0; - case MVT::i1: Signed = false; // FALLTHROUGH to handle as i8. - case MVT::i8: - case MVT::i16: - case MVT::i32: - Opc = isThumb ? ARM::t2MOVi32imm : ARM::MOVi32imm; break; - } - - unsigned Reg = createResultReg(TLI.getRegClassFor(VT)); - AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), - Reg) - .addImm(Signed ? (uint64_t) CI->getSExtValue() : - CI->getZExtValue())); - return Reg; + // TODO: Implement this for floating point constants and integer constants + // if we care about non-v6 architectures. + return 0; } bool ARMFastISel::isTypeLegal(const Type *Ty, EVT &VT) { -- 2.34.1