From 23f1cd311f52f8c008c7e5e28edff81c0e820c74 Mon Sep 17 00:00:00 2001 From: Colin LeMahieu Date: Mon, 29 Dec 2014 21:18:02 +0000 Subject: [PATCH] [Hexagon] Fixing 224952 where an addressing mode update was missed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224955 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Hexagon/HexagonInstrInfo.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/Hexagon/HexagonInstrInfo.td b/lib/Target/Hexagon/HexagonInstrInfo.td index f16cfe14322..565aed7062a 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.td +++ b/lib/Target/Hexagon/HexagonInstrInfo.td @@ -4124,7 +4124,7 @@ def : Pat<(store (i1 -1), ADDRriS11_2:$addr), // Map from memb(Rs) = Pd -> Rt = mux(Pd, #0, #1); store Rt. def : Pat<(store (i1 PredRegs:$src1), ADDRriS11_2:$addr), - (S2_storerb_io ADDRriS11_2:$addr, 0, (i32 (C2_muxii (i1 PredRegs:$src1), 1, 0)) )>; + (S2_storerb_io AddrFI:$addr, 0, (i32 (C2_muxii (i1 PredRegs:$src1), 1, 0)) )>; // Map Rdd = anyext(Rs) -> Rdd = A2_sxtw(Rs). // Hexagon_TODO: We can probably use combine but that will cost 2 instructions. -- 2.34.1