From 24cd3c4711333ca1e07cbdb34475bccfeb762bb6 Mon Sep 17 00:00:00 2001 From: Daniel Dunbar Date: Thu, 16 Jul 2009 22:08:25 +0000 Subject: [PATCH] Fix inverted preprocessor conditional. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76111 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/VirtRegRewriter.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/CodeGen/VirtRegRewriter.cpp b/lib/CodeGen/VirtRegRewriter.cpp index a859d80e1b7..61ea80b3d9d 100644 --- a/lib/CodeGen/VirtRegRewriter.cpp +++ b/lib/CodeGen/VirtRegRewriter.cpp @@ -491,7 +491,7 @@ static void ReMaterialize(MachineBasicBlock &MBB, const TargetRegisterInfo *TRI, VirtRegMap &VRM) { MachineInstr *ReMatDefMI = VRM.getReMaterializedMI(Reg); -#ifdef NDEBUG +#ifndef NDEBUG const TargetInstrDesc &TID = ReMatDefMI->getDesc(); assert(TID.getNumDefs() != 1 && "Don't know how to remat instructions that define > 1 values!"); -- 2.34.1