From 24e03ef0f55cdae815bbcefbe2d7a23e4e013904 Mon Sep 17 00:00:00 2001 From: "lw@rock-chips.com" Date: Wed, 30 Nov 2011 11:50:18 +0800 Subject: [PATCH] a22:modify board-rk29-a22.c --- arch/arm/mach-rk29/board-rk29-a22.c | 300 ++++++++++++++++++++++++++-- 1 file changed, 281 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-rk29/board-rk29-a22.c b/arch/arm/mach-rk29/board-rk29-a22.c index edca398ba3cf..36d1fe2f5fae 100755 --- a/arch/arm/mach-rk29/board-rk29-a22.c +++ b/arch/arm/mach-rk29/board-rk29-a22.c @@ -23,7 +23,7 @@ #include #include #include -//#include +#include #include #include @@ -80,8 +80,7 @@ #endif #include "../../../drivers/misc/gps/rk29_gps.h" - - +#include "../../../drivers/tty/serial/sc8800.h" #ifdef CONFIG_VIDEO_RK29 /*---------------- Camera Sensor Configuration Begin ------------------------*/ #define CONFIG_SENSOR_0 RK29_CAM_SENSOR_MT9T111 /* back camera sensor */ @@ -120,10 +119,10 @@ #else #define SDRAM_SIZE SZ_512M #endif -#define PMEM_GPU_SIZE SZ_64M +#define PMEM_GPU_SIZE SZ_16M #define PMEM_UI_SIZE SZ_32M #define PMEM_VPU_SIZE SZ_64M -#define PMEM_CAM_SIZE PMEM_CAM_NECESSARY //0x01300000 +#define PMEM_CAM_SIZE PMEM_CAM_NECESSARY #ifdef CONFIG_VIDEO_RK29_WORK_IPP #define MEM_CAMIPP_SIZE SZ_4M #else @@ -162,6 +161,8 @@ #define WLAN_SECTION_SIZE_3 (PREALLOC_WLAN_BUF_NUM * 1024) #define WLAN_SKB_BUF_NUM 16 +#define UNLOCK_SECURITY_KEY ~(0x1<<5) +#define LOCK_SECURITY_KEY 0x00 static struct sk_buff *wlan_static_skb[WLAN_SKB_BUF_NUM]; @@ -409,7 +410,7 @@ static struct android_pmem_platform_data android_pmem_pdata = { .name = "pmem", .start = PMEM_UI_BASE, .size = PMEM_UI_SIZE, - .no_allocator = 0, + .no_allocator = 1, .cached = 1, }; @@ -643,11 +644,16 @@ int wm831x_pre_init(struct wm831x *parm) //ILIM = 900ma ret = wm831x_reg_read(parm, WM831X_POWER_STATE) & 0xffff; wm831x_reg_write(parm, WM831X_POWER_STATE, (ret&0xfff8) | 0x04); - + //BATT_FET_ENA = 1 - wm831x_set_bits(parm, WM831X_RESET_CONTROL,0x1000,0x1000); - ret = wm831x_reg_read(parm, WM831X_RESET_CONTROL) & 0xffff; - printk("%s:WM831X_RESET_CONTROL=0x%x\n",__FUNCTION__,ret); + wm831x_reg_write(parm,WM831X_SECURITY_KEY,0x9716); // unlock security key + wm831x_set_bits(parm, WM831X_RESET_CONTROL,0x1000,0x1000); + ret = wm831x_reg_read(parm, WM831X_RESET_CONTROL) & 0xffff&UNLOCK_SECURITY_KEY;// enternal reset active in sleep + printk("%s:WM831X_RESET_CONTROL=0x%x\n",__FUNCTION__,ret); + wm831x_reg_write(parm, WM831X_RESET_CONTROL, ret); + + + wm831x_reg_write(parm,WM831X_SECURITY_KEY,LOCK_SECURITY_KEY); // lock securit #if 0 wm831x_set_bits(parm, WM831X_LDO_ENABLE, (1 << 3), 0); @@ -1397,7 +1403,11 @@ static void gpio_set_request(void) gpio_request(RK29_PIN6_PA5, NULL); gpio_request(RK29_PIN6_PA6, NULL); + gpio_request(RK29_PIN2_PA5, NULL); + gpio_request(RK29_PIN2_PA4, NULL); gpio_request(RK29_PIN2_PB0, NULL); + gpio_request(RK29_PIN2_PB1, NULL); + gpio_request(RK29_PIN2_PB2, NULL); gpio_request(RK29_PIN2_PB3, NULL); gpio_request(RK29_PIN1_PA4, NULL); @@ -1423,7 +1433,11 @@ static void gpio_set_free(void) gpio_free(RK29_PIN6_PA5); gpio_free(RK29_PIN6_PA6); + gpio_free(RK29_PIN2_PA5); + gpio_free(RK29_PIN2_PA4); gpio_free(RK29_PIN2_PB0); + gpio_free(RK29_PIN2_PB1); + gpio_free(RK29_PIN2_PB2); gpio_free(RK29_PIN2_PB3); gpio_free(RK29_PIN1_PA4); @@ -1449,7 +1463,11 @@ static void rk29_keygpio_suspend(void) gpio_pull_updown(RK29_PIN6_PA5, 0); gpio_pull_updown(RK29_PIN6_PA6, 0);//key pullup/pulldown disable + gpio_pull_updown(RK29_PIN2_PA4, 0); + gpio_pull_updown(RK29_PIN2_PA5, 0); gpio_pull_updown(RK29_PIN2_PB0, 0); + gpio_pull_updown(RK29_PIN2_PB1, 0); + gpio_pull_updown(RK29_PIN2_PB2, 0); gpio_pull_updown(RK29_PIN2_PB3, 0); } @@ -1463,7 +1481,11 @@ static void rk29_keygpio_resume(void) gpio_pull_updown(RK29_PIN6_PA5, 1); gpio_pull_updown(RK29_PIN6_PA6, 1);//key pullup/pulldown enable + gpio_pull_updown(RK29_PIN2_PA4, 1); + gpio_pull_updown(RK29_PIN2_PA5, 1); gpio_pull_updown(RK29_PIN2_PB0, 1); + gpio_pull_updown(RK29_PIN2_PB1, 1); + gpio_pull_updown(RK29_PIN2_PB2, 1); gpio_pull_updown(RK29_PIN2_PB3, 1); } @@ -2327,6 +2349,236 @@ struct platform_device rk2818_device_mtk23d = { /***************************************************************************************** * SDMMC devices *****************************************************************************************/ +#if !defined(CONFIG_SDMMC_RK29_OLD) +static void rk29_sdmmc_gpio_open(int device_id, int on) +{ + switch(device_id) + { + case 0://mmc0 + { + #ifdef CONFIG_SDMMC0_RK29 + if(on) + { + gpio_direction_output(RK29_PIN1_PD0,GPIO_HIGH);//set mmc0-clk to high + gpio_direction_output(RK29_PIN1_PD1,GPIO_HIGH);//set mmc0-cmd to high. + gpio_direction_output(RK29_PIN1_PD2,GPIO_HIGH);//set mmc0-data0 to high. + gpio_direction_output(RK29_PIN1_PD3,GPIO_HIGH);//set mmc0-data1 to high. + gpio_direction_output(RK29_PIN1_PD4,GPIO_HIGH);//set mmc0-data2 to high. + gpio_direction_output(RK29_PIN1_PD5,GPIO_HIGH);//set mmc0-data3 to high. + + mdelay(30); + } + else + { + rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_GPIO1_D0); + gpio_request(RK29_PIN1_PD0, "mmc0-clk"); + gpio_direction_output(RK29_PIN1_PD0,GPIO_LOW);//set mmc0-clk to low. + + rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_GPIO1_D1); + gpio_request(RK29_PIN1_PD1, "mmc0-cmd"); + gpio_direction_output(RK29_PIN1_PD1,GPIO_LOW);//set mmc0-cmd to low. + + rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_GPIO1D2); + gpio_request(RK29_PIN1_PD2, "mmc0-data0"); + gpio_direction_output(RK29_PIN1_PD2,GPIO_LOW);//set mmc0-data0 to low. + + rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_GPIO1D3); + gpio_request(RK29_PIN1_PD3, "mmc0-data1"); + gpio_direction_output(RK29_PIN1_PD3,GPIO_LOW);//set mmc0-data1 to low. + + rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_GPIO1D4); + gpio_request(RK29_PIN1_PD4, "mmc0-data2"); + gpio_direction_output(RK29_PIN1_PD4,GPIO_LOW);//set mmc0-data2 to low. + + rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_GPIO1D5); + gpio_request(RK29_PIN1_PD5, "mmc0-data3"); + gpio_direction_output(RK29_PIN1_PD5,GPIO_LOW);//set mmc0-data3 to low. + + mdelay(30); + } + #endif + } + break; + + case 1://mmc1 + { + #ifdef CONFIG_SDMMC1_RK29 + if(on) + { + gpio_direction_output(RK29_PIN1_PC7,GPIO_HIGH);//set mmc1-clk to high + gpio_direction_output(RK29_PIN1_PC2,GPIO_HIGH);//set mmc1-cmd to high. + gpio_direction_output(RK29_PIN1_PC3,GPIO_HIGH);//set mmc1-data0 to high. + gpio_direction_output(RK29_PIN1_PC4,GPIO_HIGH);//set mmc1-data1 to high. + gpio_direction_output(RK29_PIN1_PC5,GPIO_HIGH);//set mmc1-data2 to high. + gpio_direction_output(RK29_PIN1_PC6,GPIO_HIGH);//set mmc1-data3 to high. + mdelay(100); + } + else + { + rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_GPIO1C7); + gpio_request(RK29_PIN1_PC7, "mmc1-clk"); + gpio_direction_output(RK29_PIN1_PC7,GPIO_LOW);//set mmc1-clk to low. + + rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_GPIO1C2); + gpio_request(RK29_PIN1_PC2, "mmc1-cmd"); + gpio_direction_output(RK29_PIN1_PC2,GPIO_LOW);//set mmc1-cmd to low. + + rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_GPIO1C3); + gpio_request(RK29_PIN1_PC3, "mmc1-data0"); + gpio_direction_output(RK29_PIN1_PC3,GPIO_LOW);//set mmc1-data0 to low. + + mdelay(100); + } + #endif + } + break; + + case 2: //mmc2 + break; + + default: + break; + } +} + + +static void rk29_sdmmc_set_iomux_mmc0(unsigned int bus_width) +{ + switch (bus_width) + { + + case 1://SDMMC_CTYPE_4BIT: + { + rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_SDMMC0_DATA1); + rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_SDMMC0_DATA2); + rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_SDMMC0_DATA3); + } + break; + + case 0x10000://SDMMC_CTYPE_8BIT: + break; + case 0xFFFF: //gpio_reset + { + rk29_mux_api_set(GPIO5D5_SDMMC0PWREN_NAME, GPIO5H_GPIO5D5); + gpio_request(RK29_PIN5_PD5,"sdmmc-power"); + gpio_direction_output(RK29_PIN5_PD5,GPIO_HIGH); //power-off + + rk29_sdmmc_gpio_open(0, 0); + + gpio_direction_output(RK29_PIN5_PD5,GPIO_LOW); //power-on + + rk29_sdmmc_gpio_open(0, 1); + } + break; + + default: //case 0://SDMMC_CTYPE_1BIT: + { + rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_SDMMC0_CMD); + rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_SDMMC0_CLKOUT); + rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_SDMMC0_DATA0); + + rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_GPIO1D3); + gpio_request(RK29_PIN1_PD3, "mmc0-data1"); + gpio_direction_output(RK29_PIN1_PD3,GPIO_HIGH); + + rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_GPIO1D4); + gpio_request(RK29_PIN1_PD4, "mmc0-data2"); + gpio_direction_output(RK29_PIN1_PD4,GPIO_HIGH); + + rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_GPIO1D5); + gpio_request(RK29_PIN1_PD5, "mmc0-data3"); + gpio_direction_output(RK29_PIN1_PD5,GPIO_HIGH); + } + break; + } +} + +static void rk29_sdmmc_set_iomux_mmc1(unsigned int bus_width) +{ +#if 0 + switch (bus_width) + { + + case 1://SDMMC_CTYPE_4BIT: + { + rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD); + rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT); + rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0); + rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1); + rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2); + rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3); + } + break; + + case 0x10000://SDMMC_CTYPE_8BIT: + break; + case 0xFFFF: + { + rk29_sdmmc_gpio_open(1, 0); + rk29_sdmmc_gpio_open(1, 1); + } + break; + + default: //case 0://SDMMC_CTYPE_1BIT: + { + rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD); + rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT); + rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0); + + rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_GPIO1C4); + gpio_request(RK29_PIN1_PC4, "mmc1-data1"); + gpio_direction_output(RK29_PIN1_PC4,GPIO_HIGH); + + rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_GPIO1C5); + gpio_request(RK29_PIN1_PC5, "mmc1-data2"); + gpio_direction_output(RK29_PIN1_PC5,GPIO_HIGH); + + rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_GPIO1C6); + gpio_request(RK29_PIN1_PC6, "mmc1-data3"); + gpio_direction_output(RK29_PIN1_PC6,GPIO_HIGH); + + } + break; + } +#else + rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD); + rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT); + rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0); + rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1); + rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2); + rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3); + +#endif +} + +static void rk29_sdmmc_set_iomux_mmc2(unsigned int bus_width) +{ + ;// +} + +static void rk29_sdmmc_set_iomux(int device_id, unsigned int bus_width) +{ + switch(device_id) + { + case 0: + #ifdef CONFIG_SDMMC0_RK29 + rk29_sdmmc_set_iomux_mmc0(bus_width); + #endif + break; + case 1: + #ifdef CONFIG_SDMMC1_RK29 + rk29_sdmmc_set_iomux_mmc1(bus_width); + #endif + break; + case 2: + rk29_sdmmc_set_iomux_mmc2(bus_width); + break; + default: + break; + } +} +#endif + #ifdef CONFIG_SDMMC0_RK29 static int rk29_sdmmc0_cfg_gpio(void) { @@ -2361,6 +2613,9 @@ struct rk29_sdmmc_platform_data default_sdmmc0_data = { .use_dma = 1, #else .use_dma = 0, +#endif +#if !defined(CONFIG_SDMMC_RK29_OLD) + .set_iomux = rk29_sdmmc_set_iomux, #endif .detect_irq = INVALID_GPIO, .enable_sd_wakeup = 0, @@ -2395,6 +2650,9 @@ struct rk29_sdmmc_platform_data default_sdmmc1_data = { MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED), .io_init = rk29_sdmmc1_cfg_gpio, .dma_name = "sdio", +#if !defined(CONFIG_SDMMC_RK29_OLD) + .set_iomux = rk29_sdmmc_set_iomux, +#endif #ifdef CONFIG_SDMMC1_USE_DMA .use_dma = 1, #else @@ -2536,7 +2794,7 @@ int __init rk29sdk_init_wifi_mem(void) { int i; int j; -#if 0 + for (i = 0 ; i < WLAN_SKB_BUF_NUM ; i++) { wlan_static_skb[i] = dev_alloc_skb( ((i < (WLAN_SKB_BUF_NUM / 2)) ? 4096 : 8192)); @@ -2565,7 +2823,7 @@ int __init rk29sdk_init_wifi_mem(void) pr_err("Failed to skb_alloc for WLAN\n"); for (j = 0 ; j < i ; j++) dev_kfree_skb(wlan_static_skb[j]); -#endif + return -ENOMEM; } @@ -3194,8 +3452,12 @@ static int rk29xx_virtual_keys_init(void) static void __init rk29_gic_init_irq(void) { - //gic_dist_init(0, (void __iomem *)RK29_GICPERI_BASE, 32); - //gic_cpu_init(0, (void __iomem *)RK29_GICCPU_BASE); +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38)) + gic_init(0, 32, (void __iomem *)RK29_GICPERI_BASE, (void __iomem *)RK29_GICCPU_BASE); +#else + gic_dist_init(0, (void __iomem *)RK29_GICPERI_BASE, 32); + gic_cpu_init(0, (void __iomem *)RK29_GICCPU_BASE); +#endif } static void __init machine_rk29_init_irq(void) @@ -3273,17 +3535,14 @@ static void __init machine_rk29_board_init(void) static void __init machine_rk29_fixup(struct machine_desc *desc, struct tag *tags, char **cmdline, struct meminfo *mi) { -#if 0 mi->nr_banks = 1; mi->bank[0].start = RK29_SDRAM_PHYS; - mi->bank[0].node = PHYS_TO_NID(RK29_SDRAM_PHYS); mi->bank[0].size = LINUX_SIZE; #if SDRAM_SIZE > SZ_512M mi->nr_banks = 2; mi->bank[1].start = RK29_SDRAM_PHYS + SZ_512M; mi->bank[1].size = SDRAM_SIZE - SZ_512M; #endif -#endif } static void __init machine_rk29_mapio(void) @@ -3298,8 +3557,11 @@ static void __init machine_rk29_mapio(void) MACHINE_START(RK29, "RK29board") /* UART for LL DEBUG */ - //.phys_io = RK29_UART1_PHYS & 0xfff00000, - //.io_pg_offst = ((RK29_UART1_BASE) >> 18) & 0xfffc, +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37)) + /* UART for LL DEBUG */ + .phys_io = RK29_UART1_PHYS & 0xfff00000, + .io_pg_offst = ((RK29_UART1_BASE) >> 18) & 0xfffc, +#endif .boot_params = RK29_SDRAM_PHYS + 0x88000, .fixup = machine_rk29_fixup, .map_io = machine_rk29_mapio, -- 2.34.1