From 2608441164fde82b7fc0dd050ca0c46be0df23f8 Mon Sep 17 00:00:00 2001 From: David Daney Date: Thu, 20 Aug 2009 12:35:53 -0700 Subject: [PATCH] MIPS: Octeon: Check all CCAs in cvmx_write_csr. The current code only checks CCA of 0 when deciding if a dummy read is needed. Since the kernel can (and does) use other CCAs we need to mask out the CCA bits from the address. Since the address constant now fits in 16 bits, there is an added benefit that smaller code is generated. Signed-off-by: David Daney Signed-off-by: Ralf Baechle --- arch/mips/include/asm/octeon/cvmx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h index e31e3fe14f8a..9d9381e2e3d8 100644 --- a/arch/mips/include/asm/octeon/cvmx.h +++ b/arch/mips/include/asm/octeon/cvmx.h @@ -271,7 +271,7 @@ static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val) * what RSL read we do, so we choose CVMX_MIO_BOOT_BIST_STAT * because it is fast and harmless. */ - if ((csr_addr >> 40) == (0x800118)) + if (((csr_addr >> 40) & 0x7ffff) == (0x118)) cvmx_read64(CVMX_MIO_BOOT_BIST_STAT); } -- 2.34.1